xref: /freebsd/sys/dev/usb/net/if_smsc.c (revision ce6a89e27cd190313be39bb479880aeda4778436)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012
5  *	Ben Gray <bgray@freebsd.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 /*
33  * SMSC LAN9xxx devices (http://www.smsc.com/)
34  *
35  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
36  * support USB 2.0 and 10/100 Mbps Ethernet.
37  *
38  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
39  * The driver only covers the Ethernet part, the standard USB hub driver
40  * supports the hub part.
41  *
42  * This driver is closely modelled on the Linux driver written and copyrighted
43  * by SMSC.
44  *
45  *
46  *
47  *
48  * H/W TCP & UDP Checksum Offloading
49  * ---------------------------------
50  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
51  * feature can be dynamically enabled/disabled.
52  *
53  * RX checksuming is performed across bytes after the IPv4 header to the end of
54  * the Ethernet frame, this means if the frame is padded with non-zero values
55  * the H/W checksum will be incorrect, however the rx code compensates for this.
56  *
57  * TX checksuming is more complicated, the device requires a special header to
58  * be prefixed onto the start of the frame which indicates the start and end
59  * positions of the UDP or TCP frame.  This requires the driver to manually
60  * go through the packet data and decode the headers prior to sending.
61  * On Linux they generally provide cues to the location of the csum and the
62  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
63  * hence this is not as optimal and therefore h/w tX checksum is currently not
64  * implemented.
65  *
66  */
67 #include <sys/stdint.h>
68 #include <sys/stddef.h>
69 #include <sys/param.h>
70 #include <sys/queue.h>
71 #include <sys/types.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/bus.h>
75 #include <sys/module.h>
76 #include <sys/lock.h>
77 #include <sys/mutex.h>
78 #include <sys/condvar.h>
79 #include <sys/socket.h>
80 #include <sys/sysctl.h>
81 #include <sys/sx.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/priv.h>
86 #include <sys/random.h>
87 
88 #include <net/if.h>
89 #include <net/if_var.h>
90 #include <net/if_media.h>
91 
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
94 
95 #include <netinet/in.h>
96 #include <netinet/ip.h>
97 
98 #include "opt_platform.h"
99 
100 #ifdef FDT
101 #include <dev/fdt/fdt_common.h>
102 #include <dev/ofw/ofw_bus.h>
103 #include <dev/ofw/ofw_bus_subr.h>
104 #include <dev/usb/usb_fdt_support.h>
105 #endif
106 
107 #include <dev/usb/usb.h>
108 #include <dev/usb/usbdi.h>
109 #include <dev/usb/usbdi_util.h>
110 #include "usbdevs.h"
111 
112 #define	USB_DEBUG_VAR smsc_debug
113 #include <dev/usb/usb_debug.h>
114 #include <dev/usb/usb_process.h>
115 
116 #include <dev/usb/net/usb_ethernet.h>
117 
118 #include <dev/usb/net/if_smscreg.h>
119 
120 #include "miibus_if.h"
121 
122 #ifdef USB_DEBUG
123 static int smsc_debug = 0;
124 
125 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
126     "USB smsc");
127 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0,
128     "Debug level");
129 #endif
130 
131 /*
132  * Various supported device vendors/products.
133  */
134 static const struct usb_device_id smsc_devs[] = {
135 #define	SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
136 	SMSC_DEV(LAN89530_ETH, 0),
137 	SMSC_DEV(LAN9500_ETH, 0),
138 	SMSC_DEV(LAN9500_ETH_2, 0),
139 	SMSC_DEV(LAN9500A_ETH, 0),
140 	SMSC_DEV(LAN9500A_ETH_2, 0),
141 	SMSC_DEV(LAN9505_ETH, 0),
142 	SMSC_DEV(LAN9505A_ETH, 0),
143 	SMSC_DEV(LAN9514_ETH, 0),
144 	SMSC_DEV(LAN9514_ETH_2, 0),
145 	SMSC_DEV(LAN9530_ETH, 0),
146 	SMSC_DEV(LAN9730_ETH, 0),
147 	SMSC_DEV(LAN9500_SAL10, 0),
148 	SMSC_DEV(LAN9505_SAL10, 0),
149 	SMSC_DEV(LAN9500A_SAL10, 0),
150 	SMSC_DEV(LAN9505A_SAL10, 0),
151 	SMSC_DEV(LAN9514_SAL10, 0),
152 	SMSC_DEV(LAN9500A_HAL, 0),
153 	SMSC_DEV(LAN9505A_HAL, 0),
154 #undef SMSC_DEV
155 };
156 
157 
158 #ifdef USB_DEBUG
159 #define smsc_dbg_printf(sc, fmt, args...) \
160 	do { \
161 		if (smsc_debug > 0) \
162 			device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
163 	} while(0)
164 #else
165 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0)
166 #endif
167 
168 #define smsc_warn_printf(sc, fmt, args...) \
169 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
170 
171 #define smsc_err_printf(sc, fmt, args...) \
172 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
173 
174 
175 #define ETHER_IS_VALID(addr) \
176 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
177 
178 static device_probe_t smsc_probe;
179 static device_attach_t smsc_attach;
180 static device_detach_t smsc_detach;
181 
182 static usb_callback_t smsc_bulk_read_callback;
183 static usb_callback_t smsc_bulk_write_callback;
184 
185 static miibus_readreg_t smsc_miibus_readreg;
186 static miibus_writereg_t smsc_miibus_writereg;
187 static miibus_statchg_t smsc_miibus_statchg;
188 
189 static int smsc_attach_post_sub(struct usb_ether *ue);
190 static uether_fn_t smsc_attach_post;
191 static uether_fn_t smsc_init;
192 static uether_fn_t smsc_stop;
193 static uether_fn_t smsc_start;
194 static uether_fn_t smsc_tick;
195 static uether_fn_t smsc_setmulti;
196 static uether_fn_t smsc_setpromisc;
197 
198 static int	smsc_ifmedia_upd(struct ifnet *);
199 static void	smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
200 
201 static int smsc_chip_init(struct smsc_softc *sc);
202 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
203 
204 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = {
205 
206 	[SMSC_BULK_DT_WR] = {
207 		.type = UE_BULK,
208 		.endpoint = UE_ADDR_ANY,
209 		.direction = UE_DIR_OUT,
210 		.frames = 16,
211 		.bufsize = 16 * (MCLBYTES + 16),
212 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
213 		.callback = smsc_bulk_write_callback,
214 		.timeout = 10000,	/* 10 seconds */
215 	},
216 
217 	[SMSC_BULK_DT_RD] = {
218 		.type = UE_BULK,
219 		.endpoint = UE_ADDR_ANY,
220 		.direction = UE_DIR_IN,
221 		.bufsize = 20480,	/* bytes */
222 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
223 		.callback = smsc_bulk_read_callback,
224 		.timeout = 0,	/* no timeout */
225 	},
226 
227 	/* The SMSC chip supports an interrupt endpoints, however they aren't
228 	 * needed as we poll on the MII status.
229 	 */
230 };
231 
232 static const struct usb_ether_methods smsc_ue_methods = {
233 	.ue_attach_post = smsc_attach_post,
234 	.ue_attach_post_sub = smsc_attach_post_sub,
235 	.ue_start = smsc_start,
236 	.ue_ioctl = smsc_ioctl,
237 	.ue_init = smsc_init,
238 	.ue_stop = smsc_stop,
239 	.ue_tick = smsc_tick,
240 	.ue_setmulti = smsc_setmulti,
241 	.ue_setpromisc = smsc_setpromisc,
242 	.ue_mii_upd = smsc_ifmedia_upd,
243 	.ue_mii_sts = smsc_ifmedia_sts,
244 };
245 
246 /**
247  *	smsc_read_reg - Reads a 32-bit register on the device
248  *	@sc: driver soft context
249  *	@off: offset of the register
250  *	@data: pointer a value that will be populated with the register value
251  *
252  *	LOCKING:
253  *	The device lock must be held before calling this function.
254  *
255  *	RETURNS:
256  *	0 on success, a USB_ERR_?? error code on failure.
257  */
258 static int
259 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
260 {
261 	struct usb_device_request req;
262 	uint32_t buf;
263 	usb_error_t err;
264 
265 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
266 
267 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
268 	req.bRequest = SMSC_UR_READ_REG;
269 	USETW(req.wValue, 0);
270 	USETW(req.wIndex, off);
271 	USETW(req.wLength, 4);
272 
273 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
274 	if (err != 0)
275 		smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
276 
277 	*data = le32toh(buf);
278 
279 	return (err);
280 }
281 
282 /**
283  *	smsc_write_reg - Writes a 32-bit register on the device
284  *	@sc: driver soft context
285  *	@off: offset of the register
286  *	@data: the 32-bit value to write into the register
287  *
288  *	LOCKING:
289  *	The device lock must be held before calling this function.
290  *
291  *	RETURNS:
292  *	0 on success, a USB_ERR_?? error code on failure.
293  */
294 static int
295 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
296 {
297 	struct usb_device_request req;
298 	uint32_t buf;
299 	usb_error_t err;
300 
301 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
302 
303 	buf = htole32(data);
304 
305 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
306 	req.bRequest = SMSC_UR_WRITE_REG;
307 	USETW(req.wValue, 0);
308 	USETW(req.wIndex, off);
309 	USETW(req.wLength, 4);
310 
311 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
312 	if (err != 0)
313 		smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
314 
315 	return (err);
316 }
317 
318 /**
319  *	smsc_wait_for_bits - Polls on a register value until bits are cleared
320  *	@sc: soft context
321  *	@reg: offset of the register
322  *	@bits: if the bits are clear the function returns
323  *
324  *	LOCKING:
325  *	The device lock must be held before calling this function.
326  *
327  *	RETURNS:
328  *	0 on success, or a USB_ERR_?? error code on failure.
329  */
330 static int
331 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
332 {
333 	usb_ticks_t start_ticks;
334 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
335 	uint32_t val;
336 	int err;
337 
338 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
339 
340 	start_ticks = (usb_ticks_t)ticks;
341 	do {
342 		if ((err = smsc_read_reg(sc, reg, &val)) != 0)
343 			return (err);
344 		if (!(val & bits))
345 			return (0);
346 
347 		uether_pause(&sc->sc_ue, hz / 100);
348 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
349 
350 	return (USB_ERR_TIMEOUT);
351 }
352 
353 /**
354  *	smsc_eeprom_read - Reads the attached EEPROM
355  *	@sc: soft context
356  *	@off: the eeprom address offset
357  *	@buf: stores the bytes
358  *	@buflen: the number of bytes to read
359  *
360  *	Simply reads bytes from an attached eeprom.
361  *
362  *	LOCKING:
363  *	The function takes and releases the device lock if it is not already held.
364  *
365  *	RETURNS:
366  *	0 on success, or a USB_ERR_?? error code on failure.
367  */
368 static int
369 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen)
370 {
371 	usb_ticks_t start_ticks;
372 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
373 	int err;
374 	int locked;
375 	uint32_t val;
376 	uint16_t i;
377 
378 	locked = mtx_owned(&sc->sc_mtx);
379 	if (!locked)
380 		SMSC_LOCK(sc);
381 
382 	err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY);
383 	if (err != 0) {
384 		smsc_warn_printf(sc, "eeprom busy, failed to read data\n");
385 		goto done;
386 	}
387 
388 	/* start reading the bytes, one at a time */
389 	for (i = 0; i < buflen; i++) {
390 
391 		val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i));
392 		if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0)
393 			goto done;
394 
395 		start_ticks = (usb_ticks_t)ticks;
396 		do {
397 			if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0)
398 				goto done;
399 			if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT))
400 				break;
401 
402 			uether_pause(&sc->sc_ue, hz / 100);
403 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
404 
405 		if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) {
406 			smsc_warn_printf(sc, "eeprom command failed\n");
407 			err = USB_ERR_IOERROR;
408 			break;
409 		}
410 
411 		if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0)
412 			goto done;
413 
414 		buf[i] = (val & 0xff);
415 	}
416 
417 done:
418 	if (!locked)
419 		SMSC_UNLOCK(sc);
420 
421 	return (err);
422 }
423 
424 /**
425  *	smsc_miibus_readreg - Reads a MII/MDIO register
426  *	@dev: usb ether device
427  *	@phy: the number of phy reading from
428  *	@reg: the register address
429  *
430  *	Attempts to read a phy register over the MII bus.
431  *
432  *	LOCKING:
433  *	Takes and releases the device mutex lock if not already held.
434  *
435  *	RETURNS:
436  *	Returns the 16-bits read from the MII register, if this function fails 0
437  *	is returned.
438  */
439 static int
440 smsc_miibus_readreg(device_t dev, int phy, int reg)
441 {
442 	struct smsc_softc *sc = device_get_softc(dev);
443 	int locked;
444 	uint32_t addr;
445 	uint32_t val = 0;
446 
447 	locked = mtx_owned(&sc->sc_mtx);
448 	if (!locked)
449 		SMSC_LOCK(sc);
450 
451 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
452 		smsc_warn_printf(sc, "MII is busy\n");
453 		goto done;
454 	}
455 
456 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY;
457 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
458 
459 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
460 		smsc_warn_printf(sc, "MII read timeout\n");
461 
462 	smsc_read_reg(sc, SMSC_MII_DATA, &val);
463 	val = le32toh(val);
464 
465 done:
466 	if (!locked)
467 		SMSC_UNLOCK(sc);
468 
469 	return (val & 0xFFFF);
470 }
471 
472 /**
473  *	smsc_miibus_writereg - Writes a MII/MDIO register
474  *	@dev: usb ether device
475  *	@phy: the number of phy writing to
476  *	@reg: the register address
477  *	@val: the value to write
478  *
479  *	Attempts to write a phy register over the MII bus.
480  *
481  *	LOCKING:
482  *	Takes and releases the device mutex lock if not already held.
483  *
484  *	RETURNS:
485  *	Always returns 0 regardless of success or failure.
486  */
487 static int
488 smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
489 {
490 	struct smsc_softc *sc = device_get_softc(dev);
491 	int locked;
492 	uint32_t addr;
493 
494 	if (sc->sc_phyno != phy)
495 		return (0);
496 
497 	locked = mtx_owned(&sc->sc_mtx);
498 	if (!locked)
499 		SMSC_LOCK(sc);
500 
501 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
502 		smsc_warn_printf(sc, "MII is busy\n");
503 		goto done;
504 	}
505 
506 	val = htole32(val);
507 	smsc_write_reg(sc, SMSC_MII_DATA, val);
508 
509 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY;
510 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
511 
512 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
513 		smsc_warn_printf(sc, "MII write timeout\n");
514 
515 done:
516 	if (!locked)
517 		SMSC_UNLOCK(sc);
518 	return (0);
519 }
520 
521 
522 
523 /**
524  *	smsc_miibus_statchg - Called to detect phy status change
525  *	@dev: usb ether device
526  *
527  *	This function is called periodically by the system to poll for status
528  *	changes of the link.
529  *
530  *	LOCKING:
531  *	Takes and releases the device mutex lock if not already held.
532  */
533 static void
534 smsc_miibus_statchg(device_t dev)
535 {
536 	struct smsc_softc *sc = device_get_softc(dev);
537 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
538 	struct ifnet *ifp;
539 	int locked;
540 	int err;
541 	uint32_t flow;
542 	uint32_t afc_cfg;
543 
544 	locked = mtx_owned(&sc->sc_mtx);
545 	if (!locked)
546 		SMSC_LOCK(sc);
547 
548 	ifp = uether_getifp(&sc->sc_ue);
549 	if (mii == NULL || ifp == NULL ||
550 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
551 		goto done;
552 
553 	/* Use the MII status to determine link status */
554 	sc->sc_flags &= ~SMSC_FLAG_LINK;
555 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
556 	    (IFM_ACTIVE | IFM_AVALID)) {
557 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
558 			case IFM_10_T:
559 			case IFM_100_TX:
560 				sc->sc_flags |= SMSC_FLAG_LINK;
561 				break;
562 			case IFM_1000_T:
563 				/* Gigabit ethernet not supported by chipset */
564 				break;
565 			default:
566 				break;
567 		}
568 	}
569 
570 	/* Lost link, do nothing. */
571 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
572 		smsc_dbg_printf(sc, "link flag not set\n");
573 		goto done;
574 	}
575 
576 	err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
577 	if (err) {
578 		smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err);
579 		goto done;
580 	}
581 
582 	/* Enable/disable full duplex operation and TX/RX pause */
583 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
584 		smsc_dbg_printf(sc, "full duplex operation\n");
585 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
586 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
587 
588 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
589 			flow = 0xffff0002;
590 		else
591 			flow = 0;
592 
593 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
594 			afc_cfg |= 0xf;
595 		else
596 			afc_cfg &= ~0xf;
597 
598 	} else {
599 		smsc_dbg_printf(sc, "half duplex operation\n");
600 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
601 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
602 
603 		flow = 0;
604 		afc_cfg |= 0xf;
605 	}
606 
607 	err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
608 	err += smsc_write_reg(sc, SMSC_FLOW, flow);
609 	err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
610 	if (err)
611 		smsc_warn_printf(sc, "media change failed, error %d\n", err);
612 
613 done:
614 	if (!locked)
615 		SMSC_UNLOCK(sc);
616 }
617 
618 /**
619  *	smsc_ifmedia_upd - Set media options
620  *	@ifp: interface pointer
621  *
622  *	Basically boilerplate code that simply calls the mii functions to set the
623  *	media options.
624  *
625  *	LOCKING:
626  *	The device lock must be held before this function is called.
627  *
628  *	RETURNS:
629  *	Returns 0 on success or a negative error code.
630  */
631 static int
632 smsc_ifmedia_upd(struct ifnet *ifp)
633 {
634 	struct smsc_softc *sc = ifp->if_softc;
635 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
636 	struct mii_softc *miisc;
637 	int err;
638 
639 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
640 
641 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
642 		PHY_RESET(miisc);
643 	err = mii_mediachg(mii);
644 	return (err);
645 }
646 
647 /**
648  *	smsc_ifmedia_sts - Report current media status
649  *	@ifp: inet interface pointer
650  *	@ifmr: interface media request
651  *
652  *	Basically boilerplate code that simply calls the mii functions to get the
653  *	media status.
654  *
655  *	LOCKING:
656  *	Internally takes and releases the device lock.
657  */
658 static void
659 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
660 {
661 	struct smsc_softc *sc = ifp->if_softc;
662 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
663 
664 	SMSC_LOCK(sc);
665 	mii_pollstat(mii);
666 	ifmr->ifm_active = mii->mii_media_active;
667 	ifmr->ifm_status = mii->mii_media_status;
668 	SMSC_UNLOCK(sc);
669 }
670 
671 /**
672  *	smsc_hash - Calculate the hash of a mac address
673  *	@addr: The mac address to calculate the hash on
674  *
675  *	This function is used when configuring a range of m'cast mac addresses to
676  *	filter on.  The hash of the mac address is put in the device's mac hash
677  *	table.
678  *
679  *	RETURNS:
680  *	Returns a value from 0-63 value which is the hash of the mac address.
681  */
682 static inline uint32_t
683 smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
684 {
685 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
686 }
687 
688 static u_int
689 smsc_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
690 {
691 	uint32_t hash, *hashtbl = arg;
692 
693 	hash = smsc_hash(LLADDR(sdl));
694 	hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
695 
696 	return (1);
697 }
698 
699 
700 /**
701  *	smsc_setmulti - Setup multicast
702  *	@ue: usb ethernet device context
703  *
704  *	Tells the device to either accept frames with a multicast mac address, a
705  *	select group of m'cast mac addresses or just the devices mac address.
706  *
707  *	LOCKING:
708  *	Should be called with the SMSC lock held.
709  */
710 static void
711 smsc_setmulti(struct usb_ether *ue)
712 {
713 	struct smsc_softc *sc = uether_getsc(ue);
714 	struct ifnet *ifp = uether_getifp(ue);
715 	uint32_t hashtbl[2] = { 0, 0 };
716 
717 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
718 
719 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
720 		smsc_dbg_printf(sc, "receive all multicast enabled\n");
721 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
722 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
723 
724 	} else {
725 		if (if_foreach_llmaddr(ifp, smsc_hash_maddr, &hashtbl) > 0) {
726 			/* We are filtering on a set of address so calculate
727 			 * hashes of each of the address and set the
728 			 * corresponding bits in the register.
729 			 */
730 			sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
731 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
732 		} else {
733 			/* Only receive packets with destination set to
734 			 * our mac address
735 			 */
736 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT);
737 		}
738 
739 		/* Debug */
740 		if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT)
741 			smsc_dbg_printf(sc, "receive select group of macs\n");
742 		else
743 			smsc_dbg_printf(sc, "receive own packets only\n");
744 	}
745 
746 	/* Write the hash table and mac control registers */
747 	smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
748 	smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
749 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
750 }
751 
752 
753 /**
754  *	smsc_setpromisc - Enables/disables promiscuous mode
755  *	@ue: usb ethernet device context
756  *
757  *	LOCKING:
758  *	Should be called with the SMSC lock held.
759  */
760 static void
761 smsc_setpromisc(struct usb_ether *ue)
762 {
763 	struct smsc_softc *sc = uether_getsc(ue);
764 	struct ifnet *ifp = uether_getifp(ue);
765 
766 	smsc_dbg_printf(sc, "promiscuous mode %sabled\n",
767 	                (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
768 
769 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
770 
771 	if (ifp->if_flags & IFF_PROMISC)
772 		sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
773 	else
774 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
775 
776 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
777 }
778 
779 
780 /**
781  *	smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming
782  *	@sc: driver soft context
783  *
784  *	LOCKING:
785  *	Should be called with the SMSC lock held.
786  *
787  *	RETURNS:
788  *	Returns 0 on success or a negative error code.
789  */
790 static int smsc_sethwcsum(struct smsc_softc *sc)
791 {
792 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
793 	uint32_t val;
794 	int err;
795 
796 	if (!ifp)
797 		return (-EIO);
798 
799 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
800 
801 	err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
802 	if (err != 0) {
803 		smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err);
804 		return (err);
805 	}
806 
807 	/* Enable/disable the Rx checksum */
808 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM)
809 		val |= SMSC_COE_CTRL_RX_EN;
810 	else
811 		val &= ~SMSC_COE_CTRL_RX_EN;
812 
813 	/* Enable/disable the Tx checksum (currently not supported) */
814 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM)
815 		val |= SMSC_COE_CTRL_TX_EN;
816 	else
817 		val &= ~SMSC_COE_CTRL_TX_EN;
818 
819 	err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
820 	if (err != 0) {
821 		smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err);
822 		return (err);
823 	}
824 
825 	return (0);
826 }
827 
828 /**
829  *	smsc_setmacaddress - Sets the mac address in the device
830  *	@sc: driver soft context
831  *	@addr: pointer to array contain at least 6 bytes of the mac
832  *
833  *	Writes the MAC address into the device, usually the MAC is programmed with
834  *	values from the EEPROM.
835  *
836  *	LOCKING:
837  *	Should be called with the SMSC lock held.
838  *
839  *	RETURNS:
840  *	Returns 0 on success or a negative error code.
841  */
842 static int
843 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
844 {
845 	int err;
846 	uint32_t val;
847 
848 	smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
849 	                addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
850 
851 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
852 
853 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
854 	if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
855 		goto done;
856 
857 	val = (addr[5] << 8) | addr[4];
858 	err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
859 
860 done:
861 	return (err);
862 }
863 
864 /**
865  *	smsc_reset - Reset the SMSC chip
866  *	@sc: device soft context
867  *
868  *	LOCKING:
869  *	Should be called with the SMSC lock held.
870  */
871 static void
872 smsc_reset(struct smsc_softc *sc)
873 {
874 	struct usb_config_descriptor *cd;
875 	usb_error_t err;
876 
877 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
878 
879 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
880 	                          cd->bConfigurationValue);
881 	if (err)
882 		smsc_warn_printf(sc, "reset failed (ignored)\n");
883 
884 	/* Wait a little while for the chip to get its brains in order. */
885 	uether_pause(&sc->sc_ue, hz / 100);
886 
887 	/* Reinitialize controller to achieve full reset. */
888 	smsc_chip_init(sc);
889 }
890 
891 
892 /**
893  *	smsc_init - Initialises the LAN95xx chip
894  *	@ue: USB ether interface
895  *
896  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
897  *	initialise the interface and the rx/tx pipes.
898  *
899  *	LOCKING:
900  *	Should be called with the SMSC lock held.
901  */
902 static void
903 smsc_init(struct usb_ether *ue)
904 {
905 	struct smsc_softc *sc = uether_getsc(ue);
906 	struct ifnet *ifp = uether_getifp(ue);
907 
908 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
909 
910 	if (smsc_setmacaddress(sc, IF_LLADDR(ifp)))
911 		smsc_dbg_printf(sc, "setting MAC address failed\n");
912 
913 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
914 		return;
915 
916 	/* Cancel pending I/O */
917 	smsc_stop(ue);
918 
919 	/* Reset the ethernet interface. */
920 	smsc_reset(sc);
921 
922 	/* Load the multicast filter. */
923 	smsc_setmulti(ue);
924 
925 	/* TCP/UDP checksum offload engines. */
926 	smsc_sethwcsum(sc);
927 
928 	usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]);
929 
930 	/* Indicate we are up and running. */
931 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
932 
933 	/* Switch to selected media. */
934 	smsc_ifmedia_upd(ifp);
935 	smsc_start(ue);
936 }
937 
938 /**
939  *	smsc_bulk_read_callback - Read callback used to process the USB URB
940  *	@xfer: the USB transfer
941  *	@error:
942  *
943  *	Reads the URB data which can contain one or more ethernet frames, the
944  *	frames are copyed into a mbuf and given to the system.
945  *
946  *	LOCKING:
947  *	No locking required, doesn't access internal driver settings.
948  */
949 static void
950 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
951 {
952 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
953 	struct usb_ether *ue = &sc->sc_ue;
954 	struct ifnet *ifp = uether_getifp(ue);
955 	struct mbuf *m;
956 	struct usb_page_cache *pc;
957 	uint32_t rxhdr;
958 	uint16_t pktlen;
959 	int off;
960 	int actlen;
961 
962 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
963 	smsc_dbg_printf(sc, "rx : actlen %d\n", actlen);
964 
965 	switch (USB_GET_STATE(xfer)) {
966 	case USB_ST_TRANSFERRED:
967 
968 		/* There is always a zero length frame after bringing the IF up */
969 		if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN))
970 			goto tr_setup;
971 
972 		/* There maybe multiple packets in the USB frame, each will have a
973 		 * header and each needs to have it's own mbuf allocated and populated
974 		 * for it.
975 		 */
976 		pc = usbd_xfer_get_frame(xfer, 0);
977 		off = 0;
978 
979 		while (off < actlen) {
980 
981 			/* The frame header is always aligned on a 4 byte boundary */
982 			off = ((off + 0x3) & ~0x3);
983 
984 			usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr));
985 			off += (sizeof(rxhdr) + ETHER_ALIGN);
986 			rxhdr = le32toh(rxhdr);
987 
988 			pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
989 
990 			smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : "
991 			                "off %d\n", rxhdr, pktlen, actlen, off);
992 
993 
994 			if (rxhdr & SMSC_RX_STAT_ERROR) {
995 				smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
996 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
997 				if (rxhdr & SMSC_RX_STAT_COLLISION)
998 					if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
999 			} else {
1000 
1001 				/* Check if the ethernet frame is too big or too small */
1002 				if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off)))
1003 					goto tr_setup;
1004 
1005 				/* Create a new mbuf to store the packet in */
1006 				m = uether_newbuf();
1007 				if (m == NULL) {
1008 					smsc_warn_printf(sc, "failed to create new mbuf\n");
1009 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1010 					goto tr_setup;
1011 				}
1012 
1013 				usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen);
1014 
1015 				/* Check if RX TCP/UDP checksumming is being offloaded */
1016 				if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
1017 
1018 					struct ether_header *eh;
1019 
1020 					eh = mtod(m, struct ether_header *);
1021 
1022 					/* Remove the extra 2 bytes of the csum */
1023 					pktlen -= 2;
1024 
1025 					/* The checksum appears to be simplistically calculated
1026 					 * over the udp/tcp header and data up to the end of the
1027 					 * eth frame.  Which means if the eth frame is padded
1028 					 * the csum calculation is incorrectly performed over
1029 					 * the padding bytes as well. Therefore to be safe we
1030 					 * ignore the H/W csum on frames less than or equal to
1031 					 * 64 bytes.
1032 					 *
1033 					 * Ignore H/W csum for non-IPv4 packets.
1034 					 */
1035 					if ((be16toh(eh->ether_type) == ETHERTYPE_IP) &&
1036 					    (pktlen > ETHER_MIN_LEN)) {
1037 						struct ip *ip;
1038 
1039 						ip = (struct ip *)(eh + 1);
1040 						if ((ip->ip_v == IPVERSION) &&
1041 						    ((ip->ip_p == IPPROTO_TCP) ||
1042 						     (ip->ip_p == IPPROTO_UDP))) {
1043 							/* Indicate the UDP/TCP csum has been calculated */
1044 							m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1045 
1046 							/* Copy the TCP/UDP checksum from the last 2 bytes
1047 							 * of the transfer and put in the csum_data field.
1048 							 */
1049 							usbd_copy_out(pc, (off + pktlen),
1050 							              &m->m_pkthdr.csum_data, 2);
1051 
1052 							/* The data is copied in network order, but the
1053 							 * csum algorithm in the kernel expects it to be
1054 							 * in host network order.
1055 							 */
1056 							m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data);
1057 
1058 							smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n",
1059 							                m->m_pkthdr.csum_data);
1060 						}
1061 					}
1062 
1063 					/* Need to adjust the offset as well or we'll be off
1064 					 * by 2 because the csum is removed from the packet
1065 					 * length.
1066 					 */
1067 					off += 2;
1068 				}
1069 
1070 				/* Finally enqueue the mbuf on the receive queue */
1071 				/* Remove 4 trailing bytes */
1072 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1073 					m_freem(m);
1074 					goto tr_setup;
1075 				}
1076 				uether_rxmbuf(ue, m, pktlen - 4);
1077 			}
1078 
1079 			/* Update the offset to move to the next potential packet */
1080 			off += pktlen;
1081 		}
1082 
1083 		/* FALLTHROUGH */
1084 
1085 	case USB_ST_SETUP:
1086 tr_setup:
1087 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1088 		usbd_transfer_submit(xfer);
1089 		uether_rxflush(ue);
1090 		return;
1091 
1092 	default:
1093 		if (error != USB_ERR_CANCELLED) {
1094 			smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error));
1095 			usbd_xfer_set_stall(xfer);
1096 			goto tr_setup;
1097 		}
1098 		return;
1099 	}
1100 }
1101 
1102 /**
1103  *	smsc_bulk_write_callback - Write callback used to send ethernet frame(s)
1104  *	@xfer: the USB transfer
1105  *	@error: error code if the transfers is in an errored state
1106  *
1107  *	The main write function that pulls ethernet frames off the queue and sends
1108  *	them out.
1109  *
1110  *	LOCKING:
1111  *
1112  */
1113 static void
1114 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1115 {
1116 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
1117 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1118 	struct usb_page_cache *pc;
1119 	struct mbuf *m;
1120 	uint32_t txhdr;
1121 	uint32_t frm_len = 0;
1122 	int nframes;
1123 
1124 	switch (USB_GET_STATE(xfer)) {
1125 	case USB_ST_TRANSFERRED:
1126 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1127 		/* FALLTHROUGH */
1128 
1129 	case USB_ST_SETUP:
1130 tr_setup:
1131 		if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 ||
1132 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1133 			/* Don't send anything if there is no link or controller is busy. */
1134 			return;
1135 		}
1136 
1137 		for (nframes = 0; nframes < 16 &&
1138 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1139 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1140 			if (m == NULL)
1141 				break;
1142 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1143 			    nframes);
1144 			frm_len = 0;
1145 			pc = usbd_xfer_get_frame(xfer, nframes);
1146 
1147 			/* Each frame is prefixed with two 32-bit values describing the
1148 			 * length of the packet and buffer.
1149 			 */
1150 			txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1151 					SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1152 			txhdr = htole32(txhdr);
1153 			usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
1154 
1155 			txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1156 			txhdr = htole32(txhdr);
1157 			usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
1158 
1159 			frm_len += 8;
1160 
1161 			/* Next copy in the actual packet */
1162 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1163 			frm_len += m->m_pkthdr.len;
1164 
1165 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1166 
1167 			/* If there's a BPF listener, bounce a copy of this frame to him */
1168 			BPF_MTAP(ifp, m);
1169 
1170 			m_freem(m);
1171 
1172 			/* Set frame length. */
1173 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1174 		}
1175 		if (nframes != 0) {
1176 			usbd_xfer_set_frames(xfer, nframes);
1177 			usbd_transfer_submit(xfer);
1178 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1179 		}
1180 		return;
1181 
1182 	default:
1183 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1184 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1185 
1186 		if (error != USB_ERR_CANCELLED) {
1187 			smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error));
1188 			usbd_xfer_set_stall(xfer);
1189 			goto tr_setup;
1190 		}
1191 		return;
1192 	}
1193 }
1194 
1195 /**
1196  *	smsc_tick - Called periodically to monitor the state of the LAN95xx chip
1197  *	@ue: USB ether interface
1198  *
1199  *	Simply calls the mii status functions to check the state of the link.
1200  *
1201  *	LOCKING:
1202  *	Should be called with the SMSC lock held.
1203  */
1204 static void
1205 smsc_tick(struct usb_ether *ue)
1206 {
1207 	struct smsc_softc *sc = uether_getsc(ue);
1208 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
1209 
1210 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1211 
1212 	mii_tick(mii);
1213 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
1214 		smsc_miibus_statchg(ue->ue_dev);
1215 		if ((sc->sc_flags & SMSC_FLAG_LINK) != 0)
1216 			smsc_start(ue);
1217 	}
1218 }
1219 
1220 /**
1221  *	smsc_start - Starts communication with the LAN95xx chip
1222  *	@ue: USB ether interface
1223  *
1224  *
1225  *
1226  */
1227 static void
1228 smsc_start(struct usb_ether *ue)
1229 {
1230 	struct smsc_softc *sc = uether_getsc(ue);
1231 
1232 	/*
1233 	 * start the USB transfers, if not already started:
1234 	 */
1235 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]);
1236 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]);
1237 }
1238 
1239 /**
1240  *	smsc_stop - Stops communication with the LAN95xx chip
1241  *	@ue: USB ether interface
1242  *
1243  *
1244  *
1245  */
1246 static void
1247 smsc_stop(struct usb_ether *ue)
1248 {
1249 	struct smsc_softc *sc = uether_getsc(ue);
1250 	struct ifnet *ifp = uether_getifp(ue);
1251 
1252 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1253 
1254 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1255 	sc->sc_flags &= ~SMSC_FLAG_LINK;
1256 
1257 	/*
1258 	 * stop all the transfers, if not already stopped:
1259 	 */
1260 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]);
1261 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]);
1262 }
1263 
1264 /**
1265  *	smsc_phy_init - Initialises the in-built SMSC phy
1266  *	@sc: driver soft context
1267  *
1268  *	Resets the PHY part of the chip and then initialises it to default
1269  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
1270  *	from the PHY are also enabled, however we don't monitor the interrupt
1271  *	endpoints for the moment.
1272  *
1273  *	RETURNS:
1274  *	Returns 0 on success or EIO if failed to reset the PHY.
1275  */
1276 static int
1277 smsc_phy_init(struct smsc_softc *sc)
1278 {
1279 	int bmcr;
1280 	usb_ticks_t start_ticks;
1281 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
1282 
1283 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1284 
1285 	/* Reset phy and wait for reset to complete */
1286 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);
1287 
1288 	start_ticks = ticks;
1289 	do {
1290 		uether_pause(&sc->sc_ue, hz / 100);
1291 		bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1292 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
1293 
1294 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
1295 		smsc_err_printf(sc, "PHY reset timed-out");
1296 		return (EIO);
1297 	}
1298 
1299 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
1300 	                     ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |  /* all modes */
1301 	                     ANAR_CSMA |
1302 	                     ANAR_FC |
1303 	                     ANAR_PAUSE_ASYM);
1304 
1305 	/* Setup the phy to interrupt when the link goes down or autoneg completes */
1306 	smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT);
1307 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK,
1308 	                     (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN));
1309 
1310 	/* Restart auto-negotation */
1311 	bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1312 	bmcr |= BMCR_STARTNEG;
1313 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
1314 
1315 	return (0);
1316 }
1317 
1318 
1319 /**
1320  *	smsc_chip_init - Initialises the chip after power on
1321  *	@sc: driver soft context
1322  *
1323  *	This initialisation sequence is modelled on the procedure in the Linux
1324  *	driver.
1325  *
1326  *	RETURNS:
1327  *	Returns 0 on success or an error code on failure.
1328  */
1329 static int
1330 smsc_chip_init(struct smsc_softc *sc)
1331 {
1332 	int err;
1333 	int locked;
1334 	uint32_t reg_val;
1335 	int burst_cap;
1336 
1337 	locked = mtx_owned(&sc->sc_mtx);
1338 	if (!locked)
1339 		SMSC_LOCK(sc);
1340 
1341 	/* Enter H/W config mode */
1342 	smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
1343 
1344 	if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) {
1345 		smsc_warn_printf(sc, "timed-out waiting for reset to complete\n");
1346 		goto init_failed;
1347 	}
1348 
1349 	/* Reset the PHY */
1350 	smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
1351 
1352 	if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) {
1353 		smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n");
1354 		goto init_failed;
1355 	}
1356 
1357 	/* Set the mac address */
1358 	if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
1359 		smsc_warn_printf(sc, "failed to set the MAC address\n");
1360 		goto init_failed;
1361 	}
1362 
1363 	/* Don't know what the HW_CFG_BIR bit is, but following the reset sequence
1364 	 * as used in the Linux driver.
1365 	 */
1366 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) != 0) {
1367 		smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
1368 		goto init_failed;
1369 	}
1370 	reg_val |= SMSC_HW_CFG_BIR;
1371 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1372 
1373 	/* There is a so called 'turbo mode' that the linux driver supports, it
1374 	 * seems to allow you to jam multiple frames per Rx transaction.  By default
1375 	 * this driver supports that and therefore allows multiple frames per URB.
1376 	 *
1377 	 * The xfer buffer size needs to reflect this as well, therefore based on
1378 	 * the calculations in the Linux driver the RX bufsize is set to 18944,
1379 	 *     bufsz = (16 * 1024 + 5 * 512)
1380 	 *
1381 	 * Burst capability is the number of URBs that can be in a burst of data/
1382 	 * ethernet frames.
1383 	 */
1384 	if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH)
1385 		burst_cap = 37;
1386 	else
1387 		burst_cap = 128;
1388 
1389 	smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
1390 
1391 	/* Set the default bulk in delay (magic value from Linux driver) */
1392 	smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
1393 
1394 
1395 
1396 	/*
1397 	 * Initialise the RX interface
1398 	 */
1399 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) < 0) {
1400 		smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err);
1401 		goto init_failed;
1402 	}
1403 
1404 	/* Adjust the packet offset in the buffer (designed to try and align IP
1405 	 * header on 4 byte boundary)
1406 	 */
1407 	reg_val &= ~SMSC_HW_CFG_RXDOFF;
1408 	reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF;
1409 
1410 	/* The following setings are used for 'turbo mode', a.k.a multiple frames
1411 	 * per Rx transaction (again info taken form Linux driver).
1412 	 */
1413 	reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
1414 
1415 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1416 
1417 	/* Clear the status register ? */
1418 	smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
1419 
1420 	/* Read and display the revision register */
1421 	if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
1422 		smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
1423 		goto init_failed;
1424 	}
1425 
1426 	device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n",
1427 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16,
1428 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK));
1429 
1430 	/* GPIO/LED setup */
1431 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
1432 	          SMSC_LED_GPIO_CFG_FDX_LED;
1433 	smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
1434 
1435 	/*
1436 	 * Initialise the TX interface
1437 	 */
1438 	smsc_write_reg(sc, SMSC_FLOW, 0);
1439 
1440 	smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
1441 
1442 	/* Read the current MAC configuration */
1443 	if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
1444 		smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
1445 		goto init_failed;
1446 	}
1447 
1448 	/* Vlan */
1449 	smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
1450 
1451 	/*
1452 	 * Initialise the PHY
1453 	 */
1454 	if ((err = smsc_phy_init(sc)) != 0)
1455 		goto init_failed;
1456 
1457 
1458 	/*
1459 	 * Start TX
1460 	 */
1461 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
1462 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1463 	smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
1464 
1465 	/*
1466 	 * Start RX
1467 	 */
1468 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
1469 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1470 
1471 	if (!locked)
1472 		SMSC_UNLOCK(sc);
1473 
1474 	return (0);
1475 
1476 init_failed:
1477 	if (!locked)
1478 		SMSC_UNLOCK(sc);
1479 
1480 	smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
1481 	return (err);
1482 }
1483 
1484 
1485 /**
1486  *	smsc_ioctl - ioctl function for the device
1487  *	@ifp: interface pointer
1488  *	@cmd: the ioctl command
1489  *	@data: data passed in the ioctl call, typically a pointer to struct ifreq.
1490  *
1491  *	The ioctl routine is overridden to detect change requests for the H/W
1492  *	checksum capabilities.
1493  *
1494  *	RETURNS:
1495  *	0 on success and an error code on failure.
1496  */
1497 static int
1498 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1499 {
1500 	struct usb_ether *ue = ifp->if_softc;
1501 	struct smsc_softc *sc;
1502 	struct ifreq *ifr;
1503 	int rc;
1504 	int mask;
1505 	int reinit;
1506 
1507 	if (cmd == SIOCSIFCAP) {
1508 
1509 		sc = uether_getsc(ue);
1510 		ifr = (struct ifreq *)data;
1511 
1512 		SMSC_LOCK(sc);
1513 
1514 		rc = 0;
1515 		reinit = 0;
1516 
1517 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1518 
1519 		/* Modify the RX CSUM enable bits */
1520 		if ((mask & IFCAP_RXCSUM) != 0 &&
1521 		    (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1522 			ifp->if_capenable ^= IFCAP_RXCSUM;
1523 
1524 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1525 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1526 				reinit = 1;
1527 			}
1528 		}
1529 
1530 		SMSC_UNLOCK(sc);
1531 		if (reinit)
1532 			uether_init(ue);
1533 
1534 	} else {
1535 		rc = uether_ioctl(ifp, cmd, data);
1536 	}
1537 
1538 	return (rc);
1539 }
1540 
1541 /**
1542  *	smsc_attach_post - Called after the driver attached to the USB interface
1543  *	@ue: the USB ethernet device
1544  *
1545  *	This is where the chip is intialised for the first time.  This is different
1546  *	from the smsc_init() function in that that one is designed to setup the
1547  *	H/W to match the UE settings and can be called after a reset.
1548  *
1549  *
1550  */
1551 static void
1552 smsc_attach_post(struct usb_ether *ue)
1553 {
1554 	struct smsc_softc *sc = uether_getsc(ue);
1555 	uint32_t mac_h, mac_l;
1556 	int err;
1557 
1558 	smsc_dbg_printf(sc, "smsc_attach_post\n");
1559 
1560 	/* Setup some of the basics */
1561 	sc->sc_phyno = 1;
1562 
1563 
1564 	/* Attempt to get the mac address, if an EEPROM is not attached this
1565 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1566 	 * address based on urandom.
1567 	 */
1568 	memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN);
1569 
1570 	/* Check if there is already a MAC address in the register */
1571 	if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1572 	    (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1573 		sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1574 		sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1575 		sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1576 		sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1577 		sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1578 		sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1579 	}
1580 
1581 	/* MAC address is not set so try to read from EEPROM, if that fails generate
1582 	 * a random MAC address.
1583 	 */
1584 	if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
1585 
1586 		err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1587 #ifdef FDT
1588 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)))
1589 			err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue);
1590 #endif
1591 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) {
1592 			read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1593 			sc->sc_ue.ue_eaddr[0] &= ~0x01;     /* unicast */
1594 			sc->sc_ue.ue_eaddr[0] |=  0x02;     /* locally administered */
1595 		}
1596 	}
1597 
1598 	/* Initialise the chip for the first time */
1599 	smsc_chip_init(sc);
1600 }
1601 
1602 
1603 /**
1604  *	smsc_attach_post_sub - Called after the driver attached to the USB interface
1605  *	@ue: the USB ethernet device
1606  *
1607  *	Most of this is boilerplate code and copied from the base USB ethernet
1608  *	driver.  It has been overriden so that we can indicate to the system that
1609  *	the chip supports H/W checksumming.
1610  *
1611  *	RETURNS:
1612  *	Returns 0 on success or a negative error code.
1613  */
1614 static int
1615 smsc_attach_post_sub(struct usb_ether *ue)
1616 {
1617 	struct smsc_softc *sc;
1618 	struct ifnet *ifp;
1619 	int error;
1620 
1621 	sc = uether_getsc(ue);
1622 	ifp = ue->ue_ifp;
1623 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1624 	ifp->if_start = uether_start;
1625 	ifp->if_ioctl = smsc_ioctl;
1626 	ifp->if_init = uether_init;
1627 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1628 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1629 	IFQ_SET_READY(&ifp->if_snd);
1630 
1631 	/* The chip supports TCP/UDP checksum offloading on TX and RX paths, however
1632 	 * currently only RX checksum is supported in the driver (see top of file).
1633 	 */
1634 	ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU;
1635 	ifp->if_hwassist = 0;
1636 
1637 	/* TX checksuming is disabled (for now?)
1638 	ifp->if_capabilities |= IFCAP_TXCSUM;
1639 	ifp->if_capenable |= IFCAP_TXCSUM;
1640 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1641 	*/
1642 
1643 	ifp->if_capenable = ifp->if_capabilities;
1644 
1645 	mtx_lock(&Giant);
1646 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1647 	    uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1648 	    BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1649 	mtx_unlock(&Giant);
1650 
1651 	return (error);
1652 }
1653 
1654 
1655 /**
1656  *	smsc_probe - Probe the interface.
1657  *	@dev: smsc device handle
1658  *
1659  *	Checks if the device is a match for this driver.
1660  *
1661  *	RETURNS:
1662  *	Returns 0 on success or an error code on failure.
1663  */
1664 static int
1665 smsc_probe(device_t dev)
1666 {
1667 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1668 
1669 	if (uaa->usb_mode != USB_MODE_HOST)
1670 		return (ENXIO);
1671 	if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX)
1672 		return (ENXIO);
1673 	if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX)
1674 		return (ENXIO);
1675 
1676 	return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa));
1677 }
1678 
1679 
1680 /**
1681  *	smsc_attach - Attach the interface.
1682  *	@dev: smsc device handle
1683  *
1684  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
1685  *
1686  *	RETURNS:
1687  *	Returns 0 on success or a negative error code.
1688  */
1689 static int
1690 smsc_attach(device_t dev)
1691 {
1692 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1693 	struct smsc_softc *sc = device_get_softc(dev);
1694 	struct usb_ether *ue = &sc->sc_ue;
1695 	uint8_t iface_index;
1696 	int err;
1697 
1698 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
1699 
1700 	device_set_usb_desc(dev);
1701 
1702 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1703 
1704 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
1705 	iface_index = SMSC_IFACE_IDX;
1706 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
1707 	                          smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx);
1708 	if (err) {
1709 		device_printf(dev, "error: allocating USB transfers failed\n");
1710 		goto detach;
1711 	}
1712 
1713 	ue->ue_sc = sc;
1714 	ue->ue_dev = dev;
1715 	ue->ue_udev = uaa->device;
1716 	ue->ue_mtx = &sc->sc_mtx;
1717 	ue->ue_methods = &smsc_ue_methods;
1718 
1719 	err = uether_ifattach(ue);
1720 	if (err) {
1721 		device_printf(dev, "error: could not attach interface\n");
1722 		goto detach;
1723 	}
1724 	return (0);			/* success */
1725 
1726 detach:
1727 	smsc_detach(dev);
1728 	return (ENXIO);		/* failure */
1729 }
1730 
1731 /**
1732  *	smsc_detach - Detach the interface.
1733  *	@dev: smsc device handle
1734  *
1735  *	RETURNS:
1736  *	Returns 0.
1737  */
1738 static int
1739 smsc_detach(device_t dev)
1740 {
1741 	struct smsc_softc *sc = device_get_softc(dev);
1742 	struct usb_ether *ue = &sc->sc_ue;
1743 
1744 	usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER);
1745 	uether_ifdetach(ue);
1746 	mtx_destroy(&sc->sc_mtx);
1747 
1748 	return (0);
1749 }
1750 
1751 static device_method_t smsc_methods[] = {
1752 	/* Device interface */
1753 	DEVMETHOD(device_probe, smsc_probe),
1754 	DEVMETHOD(device_attach, smsc_attach),
1755 	DEVMETHOD(device_detach, smsc_detach),
1756 
1757 	/* bus interface */
1758 	DEVMETHOD(bus_print_child, bus_generic_print_child),
1759 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
1760 
1761 	/* MII interface */
1762 	DEVMETHOD(miibus_readreg, smsc_miibus_readreg),
1763 	DEVMETHOD(miibus_writereg, smsc_miibus_writereg),
1764 	DEVMETHOD(miibus_statchg, smsc_miibus_statchg),
1765 
1766 	DEVMETHOD_END
1767 };
1768 
1769 static driver_t smsc_driver = {
1770 	.name = "smsc",
1771 	.methods = smsc_methods,
1772 	.size = sizeof(struct smsc_softc),
1773 };
1774 
1775 static devclass_t smsc_devclass;
1776 
1777 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0);
1778 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0);
1779 MODULE_DEPEND(smsc, uether, 1, 1, 1);
1780 MODULE_DEPEND(smsc, usb, 1, 1, 1);
1781 MODULE_DEPEND(smsc, ether, 1, 1, 1);
1782 MODULE_DEPEND(smsc, miibus, 1, 1, 1);
1783 MODULE_VERSION(smsc, 1);
1784 USB_PNP_HOST_INFO(smsc_devs);
1785