1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012 5 * Ben Gray <bgray@freebsd.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* 33 * SMSC LAN9xxx devices (http://www.smsc.com/) 34 * 35 * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that 36 * support USB 2.0 and 10/100 Mbps Ethernet. 37 * 38 * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter. 39 * The driver only covers the Ethernet part, the standard USB hub driver 40 * supports the hub part. 41 * 42 * This driver is closely modelled on the Linux driver written and copyrighted 43 * by SMSC. 44 * 45 * 46 * 47 * 48 * H/W TCP & UDP Checksum Offloading 49 * --------------------------------- 50 * The chip supports both tx and rx offloading of UDP & TCP checksums, this 51 * feature can be dynamically enabled/disabled. 52 * 53 * RX checksuming is performed across bytes after the IPv4 header to the end of 54 * the Ethernet frame, this means if the frame is padded with non-zero values 55 * the H/W checksum will be incorrect, however the rx code compensates for this. 56 * 57 * TX checksuming is more complicated, the device requires a special header to 58 * be prefixed onto the start of the frame which indicates the start and end 59 * positions of the UDP or TCP frame. This requires the driver to manually 60 * go through the packet data and decode the headers prior to sending. 61 * On Linux they generally provide cues to the location of the csum and the 62 * area to calculate it over, on FreeBSD we seem to have to do it all ourselves, 63 * hence this is not as optimal and therefore h/w tX checksum is currently not 64 * implemented. 65 * 66 */ 67 #include <sys/stdint.h> 68 #include <sys/stddef.h> 69 #include <sys/param.h> 70 #include <sys/queue.h> 71 #include <sys/types.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/bus.h> 75 #include <sys/module.h> 76 #include <sys/lock.h> 77 #include <sys/mutex.h> 78 #include <sys/condvar.h> 79 #include <sys/socket.h> 80 #include <sys/sysctl.h> 81 #include <sys/sx.h> 82 #include <sys/unistd.h> 83 #include <sys/callout.h> 84 #include <sys/malloc.h> 85 #include <sys/priv.h> 86 #include <sys/random.h> 87 88 #include <net/if.h> 89 #include <net/if_var.h> 90 #include <net/if_media.h> 91 92 #include <dev/mii/mii.h> 93 #include <dev/mii/miivar.h> 94 95 #include <netinet/in.h> 96 #include <netinet/ip.h> 97 98 #include "opt_platform.h" 99 100 #ifdef FDT 101 #include <dev/fdt/fdt_common.h> 102 #include <dev/ofw/ofw_bus.h> 103 #include <dev/ofw/ofw_bus_subr.h> 104 #include <dev/usb/usb_fdt_support.h> 105 #endif 106 107 #include <dev/usb/usb.h> 108 #include <dev/usb/usbdi.h> 109 #include <dev/usb/usbdi_util.h> 110 #include "usbdevs.h" 111 112 #define USB_DEBUG_VAR smsc_debug 113 #include <dev/usb/usb_debug.h> 114 #include <dev/usb/usb_process.h> 115 116 #include <dev/usb/net/usb_ethernet.h> 117 118 #include <dev/usb/net/if_smscreg.h> 119 120 #include "miibus_if.h" 121 122 #ifdef USB_DEBUG 123 static int smsc_debug = 0; 124 125 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 126 "USB smsc"); 127 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0, 128 "Debug level"); 129 #endif 130 131 /* 132 * Various supported device vendors/products. 133 */ 134 static const struct usb_device_id smsc_devs[] = { 135 #define SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 136 SMSC_DEV(LAN89530_ETH, 0), 137 SMSC_DEV(LAN9500_ETH, 0), 138 SMSC_DEV(LAN9500_ETH_2, 0), 139 SMSC_DEV(LAN9500A_ETH, 0), 140 SMSC_DEV(LAN9500A_ETH_2, 0), 141 SMSC_DEV(LAN9505_ETH, 0), 142 SMSC_DEV(LAN9505A_ETH, 0), 143 SMSC_DEV(LAN9514_ETH, 0), 144 SMSC_DEV(LAN9514_ETH_2, 0), 145 SMSC_DEV(LAN9530_ETH, 0), 146 SMSC_DEV(LAN9730_ETH, 0), 147 SMSC_DEV(LAN9500_SAL10, 0), 148 SMSC_DEV(LAN9505_SAL10, 0), 149 SMSC_DEV(LAN9500A_SAL10, 0), 150 SMSC_DEV(LAN9505A_SAL10, 0), 151 SMSC_DEV(LAN9514_SAL10, 0), 152 SMSC_DEV(LAN9500A_HAL, 0), 153 SMSC_DEV(LAN9505A_HAL, 0), 154 #undef SMSC_DEV 155 }; 156 157 #ifdef USB_DEBUG 158 #define smsc_dbg_printf(sc, fmt, args...) \ 159 do { \ 160 if (smsc_debug > 0) \ 161 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 162 } while(0) 163 #else 164 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0) 165 #endif 166 167 #define smsc_warn_printf(sc, fmt, args...) \ 168 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 169 170 #define smsc_err_printf(sc, fmt, args...) \ 171 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 172 173 #define ETHER_IS_VALID(addr) \ 174 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 175 176 static device_probe_t smsc_probe; 177 static device_attach_t smsc_attach; 178 static device_detach_t smsc_detach; 179 180 static usb_callback_t smsc_bulk_read_callback; 181 static usb_callback_t smsc_bulk_write_callback; 182 183 static miibus_readreg_t smsc_miibus_readreg; 184 static miibus_writereg_t smsc_miibus_writereg; 185 static miibus_statchg_t smsc_miibus_statchg; 186 187 static int smsc_attach_post_sub(struct usb_ether *ue); 188 static uether_fn_t smsc_attach_post; 189 static uether_fn_t smsc_init; 190 static uether_fn_t smsc_stop; 191 static uether_fn_t smsc_start; 192 static uether_fn_t smsc_tick; 193 static uether_fn_t smsc_setmulti; 194 static uether_fn_t smsc_setpromisc; 195 196 static int smsc_ifmedia_upd(struct ifnet *); 197 static void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *); 198 199 static int smsc_chip_init(struct smsc_softc *sc); 200 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 201 202 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = { 203 [SMSC_BULK_DT_WR] = { 204 .type = UE_BULK, 205 .endpoint = UE_ADDR_ANY, 206 .direction = UE_DIR_OUT, 207 .frames = 16, 208 .bufsize = 16 * (MCLBYTES + 16), 209 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 210 .callback = smsc_bulk_write_callback, 211 .timeout = 10000, /* 10 seconds */ 212 }, 213 214 [SMSC_BULK_DT_RD] = { 215 .type = UE_BULK, 216 .endpoint = UE_ADDR_ANY, 217 .direction = UE_DIR_IN, 218 .bufsize = 20480, /* bytes */ 219 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 220 .callback = smsc_bulk_read_callback, 221 .timeout = 0, /* no timeout */ 222 }, 223 224 /* The SMSC chip supports an interrupt endpoints, however they aren't 225 * needed as we poll on the MII status. 226 */ 227 }; 228 229 static const struct usb_ether_methods smsc_ue_methods = { 230 .ue_attach_post = smsc_attach_post, 231 .ue_attach_post_sub = smsc_attach_post_sub, 232 .ue_start = smsc_start, 233 .ue_ioctl = smsc_ioctl, 234 .ue_init = smsc_init, 235 .ue_stop = smsc_stop, 236 .ue_tick = smsc_tick, 237 .ue_setmulti = smsc_setmulti, 238 .ue_setpromisc = smsc_setpromisc, 239 .ue_mii_upd = smsc_ifmedia_upd, 240 .ue_mii_sts = smsc_ifmedia_sts, 241 }; 242 243 /** 244 * smsc_read_reg - Reads a 32-bit register on the device 245 * @sc: driver soft context 246 * @off: offset of the register 247 * @data: pointer a value that will be populated with the register value 248 * 249 * LOCKING: 250 * The device lock must be held before calling this function. 251 * 252 * RETURNS: 253 * 0 on success, a USB_ERR_?? error code on failure. 254 */ 255 static int 256 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data) 257 { 258 struct usb_device_request req; 259 uint32_t buf; 260 usb_error_t err; 261 262 SMSC_LOCK_ASSERT(sc, MA_OWNED); 263 264 req.bmRequestType = UT_READ_VENDOR_DEVICE; 265 req.bRequest = SMSC_UR_READ_REG; 266 USETW(req.wValue, 0); 267 USETW(req.wIndex, off); 268 USETW(req.wLength, 4); 269 270 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 271 if (err != 0) 272 smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off); 273 274 *data = le32toh(buf); 275 276 return (err); 277 } 278 279 /** 280 * smsc_write_reg - Writes a 32-bit register on the device 281 * @sc: driver soft context 282 * @off: offset of the register 283 * @data: the 32-bit value to write into the register 284 * 285 * LOCKING: 286 * The device lock must be held before calling this function. 287 * 288 * RETURNS: 289 * 0 on success, a USB_ERR_?? error code on failure. 290 */ 291 static int 292 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data) 293 { 294 struct usb_device_request req; 295 uint32_t buf; 296 usb_error_t err; 297 298 SMSC_LOCK_ASSERT(sc, MA_OWNED); 299 300 buf = htole32(data); 301 302 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 303 req.bRequest = SMSC_UR_WRITE_REG; 304 USETW(req.wValue, 0); 305 USETW(req.wIndex, off); 306 USETW(req.wLength, 4); 307 308 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 309 if (err != 0) 310 smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off); 311 312 return (err); 313 } 314 315 /** 316 * smsc_wait_for_bits - Polls on a register value until bits are cleared 317 * @sc: soft context 318 * @reg: offset of the register 319 * @bits: if the bits are clear the function returns 320 * 321 * LOCKING: 322 * The device lock must be held before calling this function. 323 * 324 * RETURNS: 325 * 0 on success, or a USB_ERR_?? error code on failure. 326 */ 327 static int 328 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits) 329 { 330 usb_ticks_t start_ticks; 331 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 332 uint32_t val; 333 int err; 334 335 SMSC_LOCK_ASSERT(sc, MA_OWNED); 336 337 start_ticks = (usb_ticks_t)ticks; 338 do { 339 if ((err = smsc_read_reg(sc, reg, &val)) != 0) 340 return (err); 341 if (!(val & bits)) 342 return (0); 343 344 uether_pause(&sc->sc_ue, hz / 100); 345 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 346 347 return (USB_ERR_TIMEOUT); 348 } 349 350 /** 351 * smsc_eeprom_read - Reads the attached EEPROM 352 * @sc: soft context 353 * @off: the eeprom address offset 354 * @buf: stores the bytes 355 * @buflen: the number of bytes to read 356 * 357 * Simply reads bytes from an attached eeprom. 358 * 359 * LOCKING: 360 * The function takes and releases the device lock if it is not already held. 361 * 362 * RETURNS: 363 * 0 on success, or a USB_ERR_?? error code on failure. 364 */ 365 static int 366 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen) 367 { 368 usb_ticks_t start_ticks; 369 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 370 int err; 371 int locked; 372 uint32_t val; 373 uint16_t i; 374 375 locked = mtx_owned(&sc->sc_mtx); 376 if (!locked) 377 SMSC_LOCK(sc); 378 379 err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY); 380 if (err != 0) { 381 smsc_warn_printf(sc, "eeprom busy, failed to read data\n"); 382 goto done; 383 } 384 385 /* start reading the bytes, one at a time */ 386 for (i = 0; i < buflen; i++) { 387 val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i)); 388 if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0) 389 goto done; 390 391 start_ticks = (usb_ticks_t)ticks; 392 do { 393 if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0) 394 goto done; 395 if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT)) 396 break; 397 398 uether_pause(&sc->sc_ue, hz / 100); 399 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 400 401 if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) { 402 smsc_warn_printf(sc, "eeprom command failed\n"); 403 err = USB_ERR_IOERROR; 404 break; 405 } 406 407 if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0) 408 goto done; 409 410 buf[i] = (val & 0xff); 411 } 412 413 done: 414 if (!locked) 415 SMSC_UNLOCK(sc); 416 417 return (err); 418 } 419 420 /** 421 * smsc_miibus_readreg - Reads a MII/MDIO register 422 * @dev: usb ether device 423 * @phy: the number of phy reading from 424 * @reg: the register address 425 * 426 * Attempts to read a phy register over the MII bus. 427 * 428 * LOCKING: 429 * Takes and releases the device mutex lock if not already held. 430 * 431 * RETURNS: 432 * Returns the 16-bits read from the MII register, if this function fails 0 433 * is returned. 434 */ 435 static int 436 smsc_miibus_readreg(device_t dev, int phy, int reg) 437 { 438 struct smsc_softc *sc = device_get_softc(dev); 439 int locked; 440 uint32_t addr; 441 uint32_t val = 0; 442 443 locked = mtx_owned(&sc->sc_mtx); 444 if (!locked) 445 SMSC_LOCK(sc); 446 447 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 448 smsc_warn_printf(sc, "MII is busy\n"); 449 goto done; 450 } 451 452 addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY; 453 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 454 455 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 456 smsc_warn_printf(sc, "MII read timeout\n"); 457 458 smsc_read_reg(sc, SMSC_MII_DATA, &val); 459 val = le32toh(val); 460 461 done: 462 if (!locked) 463 SMSC_UNLOCK(sc); 464 465 return (val & 0xFFFF); 466 } 467 468 /** 469 * smsc_miibus_writereg - Writes a MII/MDIO register 470 * @dev: usb ether device 471 * @phy: the number of phy writing to 472 * @reg: the register address 473 * @val: the value to write 474 * 475 * Attempts to write a phy register over the MII bus. 476 * 477 * LOCKING: 478 * Takes and releases the device mutex lock if not already held. 479 * 480 * RETURNS: 481 * Always returns 0 regardless of success or failure. 482 */ 483 static int 484 smsc_miibus_writereg(device_t dev, int phy, int reg, int val) 485 { 486 struct smsc_softc *sc = device_get_softc(dev); 487 int locked; 488 uint32_t addr; 489 490 if (sc->sc_phyno != phy) 491 return (0); 492 493 locked = mtx_owned(&sc->sc_mtx); 494 if (!locked) 495 SMSC_LOCK(sc); 496 497 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 498 smsc_warn_printf(sc, "MII is busy\n"); 499 goto done; 500 } 501 502 val = htole32(val); 503 smsc_write_reg(sc, SMSC_MII_DATA, val); 504 505 addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY; 506 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 507 508 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 509 smsc_warn_printf(sc, "MII write timeout\n"); 510 511 done: 512 if (!locked) 513 SMSC_UNLOCK(sc); 514 return (0); 515 } 516 517 /** 518 * smsc_miibus_statchg - Called to detect phy status change 519 * @dev: usb ether device 520 * 521 * This function is called periodically by the system to poll for status 522 * changes of the link. 523 * 524 * LOCKING: 525 * Takes and releases the device mutex lock if not already held. 526 */ 527 static void 528 smsc_miibus_statchg(device_t dev) 529 { 530 struct smsc_softc *sc = device_get_softc(dev); 531 struct mii_data *mii = uether_getmii(&sc->sc_ue); 532 struct ifnet *ifp; 533 int locked; 534 int err; 535 uint32_t flow; 536 uint32_t afc_cfg; 537 538 locked = mtx_owned(&sc->sc_mtx); 539 if (!locked) 540 SMSC_LOCK(sc); 541 542 ifp = uether_getifp(&sc->sc_ue); 543 if (mii == NULL || ifp == NULL || 544 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 545 goto done; 546 547 /* Use the MII status to determine link status */ 548 sc->sc_flags &= ~SMSC_FLAG_LINK; 549 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 550 (IFM_ACTIVE | IFM_AVALID)) { 551 switch (IFM_SUBTYPE(mii->mii_media_active)) { 552 case IFM_10_T: 553 case IFM_100_TX: 554 sc->sc_flags |= SMSC_FLAG_LINK; 555 break; 556 case IFM_1000_T: 557 /* Gigabit ethernet not supported by chipset */ 558 break; 559 default: 560 break; 561 } 562 } 563 564 /* Lost link, do nothing. */ 565 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 566 smsc_dbg_printf(sc, "link flag not set\n"); 567 goto done; 568 } 569 570 err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg); 571 if (err) { 572 smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err); 573 goto done; 574 } 575 576 /* Enable/disable full duplex operation and TX/RX pause */ 577 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 578 smsc_dbg_printf(sc, "full duplex operation\n"); 579 sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN; 580 sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX; 581 582 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 583 flow = 0xffff0002; 584 else 585 flow = 0; 586 587 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 588 afc_cfg |= 0xf; 589 else 590 afc_cfg &= ~0xf; 591 592 } else { 593 smsc_dbg_printf(sc, "half duplex operation\n"); 594 sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX; 595 sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN; 596 597 flow = 0; 598 afc_cfg |= 0xf; 599 } 600 601 err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 602 err += smsc_write_reg(sc, SMSC_FLOW, flow); 603 err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg); 604 if (err) 605 smsc_warn_printf(sc, "media change failed, error %d\n", err); 606 607 done: 608 if (!locked) 609 SMSC_UNLOCK(sc); 610 } 611 612 /** 613 * smsc_ifmedia_upd - Set media options 614 * @ifp: interface pointer 615 * 616 * Basically boilerplate code that simply calls the mii functions to set the 617 * media options. 618 * 619 * LOCKING: 620 * The device lock must be held before this function is called. 621 * 622 * RETURNS: 623 * Returns 0 on success or a negative error code. 624 */ 625 static int 626 smsc_ifmedia_upd(struct ifnet *ifp) 627 { 628 struct smsc_softc *sc = ifp->if_softc; 629 struct mii_data *mii = uether_getmii(&sc->sc_ue); 630 struct mii_softc *miisc; 631 int err; 632 633 SMSC_LOCK_ASSERT(sc, MA_OWNED); 634 635 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 636 PHY_RESET(miisc); 637 err = mii_mediachg(mii); 638 return (err); 639 } 640 641 /** 642 * smsc_ifmedia_sts - Report current media status 643 * @ifp: inet interface pointer 644 * @ifmr: interface media request 645 * 646 * Basically boilerplate code that simply calls the mii functions to get the 647 * media status. 648 * 649 * LOCKING: 650 * Internally takes and releases the device lock. 651 */ 652 static void 653 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 654 { 655 struct smsc_softc *sc = ifp->if_softc; 656 struct mii_data *mii = uether_getmii(&sc->sc_ue); 657 658 SMSC_LOCK(sc); 659 mii_pollstat(mii); 660 ifmr->ifm_active = mii->mii_media_active; 661 ifmr->ifm_status = mii->mii_media_status; 662 SMSC_UNLOCK(sc); 663 } 664 665 /** 666 * smsc_hash - Calculate the hash of a mac address 667 * @addr: The mac address to calculate the hash on 668 * 669 * This function is used when configuring a range of m'cast mac addresses to 670 * filter on. The hash of the mac address is put in the device's mac hash 671 * table. 672 * 673 * RETURNS: 674 * Returns a value from 0-63 value which is the hash of the mac address. 675 */ 676 static inline uint32_t 677 smsc_hash(uint8_t addr[ETHER_ADDR_LEN]) 678 { 679 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 680 } 681 682 static u_int 683 smsc_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 684 { 685 uint32_t hash, *hashtbl = arg; 686 687 hash = smsc_hash(LLADDR(sdl)); 688 hashtbl[hash >> 5] |= 1 << (hash & 0x1F); 689 690 return (1); 691 } 692 693 /** 694 * smsc_setmulti - Setup multicast 695 * @ue: usb ethernet device context 696 * 697 * Tells the device to either accept frames with a multicast mac address, a 698 * select group of m'cast mac addresses or just the devices mac address. 699 * 700 * LOCKING: 701 * Should be called with the SMSC lock held. 702 */ 703 static void 704 smsc_setmulti(struct usb_ether *ue) 705 { 706 struct smsc_softc *sc = uether_getsc(ue); 707 struct ifnet *ifp = uether_getifp(ue); 708 uint32_t hashtbl[2] = { 0, 0 }; 709 710 SMSC_LOCK_ASSERT(sc, MA_OWNED); 711 712 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 713 smsc_dbg_printf(sc, "receive all multicast enabled\n"); 714 sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS; 715 sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT; 716 717 } else { 718 if (if_foreach_llmaddr(ifp, smsc_hash_maddr, &hashtbl) > 0) { 719 /* We are filtering on a set of address so calculate 720 * hashes of each of the address and set the 721 * corresponding bits in the register. 722 */ 723 sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT; 724 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS); 725 } else { 726 /* Only receive packets with destination set to 727 * our mac address 728 */ 729 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT); 730 } 731 732 /* Debug */ 733 if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) 734 smsc_dbg_printf(sc, "receive select group of macs\n"); 735 else 736 smsc_dbg_printf(sc, "receive own packets only\n"); 737 } 738 739 /* Write the hash table and mac control registers */ 740 smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]); 741 smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]); 742 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 743 } 744 745 /** 746 * smsc_setpromisc - Enables/disables promiscuous mode 747 * @ue: usb ethernet device context 748 * 749 * LOCKING: 750 * Should be called with the SMSC lock held. 751 */ 752 static void 753 smsc_setpromisc(struct usb_ether *ue) 754 { 755 struct smsc_softc *sc = uether_getsc(ue); 756 struct ifnet *ifp = uether_getifp(ue); 757 758 smsc_dbg_printf(sc, "promiscuous mode %sabled\n", 759 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 760 761 SMSC_LOCK_ASSERT(sc, MA_OWNED); 762 763 if (ifp->if_flags & IFF_PROMISC) 764 sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS; 765 else 766 sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS; 767 768 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 769 } 770 771 /** 772 * smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming 773 * @sc: driver soft context 774 * 775 * LOCKING: 776 * Should be called with the SMSC lock held. 777 * 778 * RETURNS: 779 * Returns 0 on success or a negative error code. 780 */ 781 static int smsc_sethwcsum(struct smsc_softc *sc) 782 { 783 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 784 uint32_t val; 785 int err; 786 787 if (!ifp) 788 return (-EIO); 789 790 SMSC_LOCK_ASSERT(sc, MA_OWNED); 791 792 err = smsc_read_reg(sc, SMSC_COE_CTRL, &val); 793 if (err != 0) { 794 smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err); 795 return (err); 796 } 797 798 /* Enable/disable the Rx checksum */ 799 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM) 800 val |= SMSC_COE_CTRL_RX_EN; 801 else 802 val &= ~SMSC_COE_CTRL_RX_EN; 803 804 /* Enable/disable the Tx checksum (currently not supported) */ 805 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM) 806 val |= SMSC_COE_CTRL_TX_EN; 807 else 808 val &= ~SMSC_COE_CTRL_TX_EN; 809 810 err = smsc_write_reg(sc, SMSC_COE_CTRL, val); 811 if (err != 0) { 812 smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err); 813 return (err); 814 } 815 816 return (0); 817 } 818 819 /** 820 * smsc_setmacaddress - Sets the mac address in the device 821 * @sc: driver soft context 822 * @addr: pointer to array contain at least 6 bytes of the mac 823 * 824 * Writes the MAC address into the device, usually the MAC is programmed with 825 * values from the EEPROM. 826 * 827 * LOCKING: 828 * Should be called with the SMSC lock held. 829 * 830 * RETURNS: 831 * Returns 0 on success or a negative error code. 832 */ 833 static int 834 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr) 835 { 836 int err; 837 uint32_t val; 838 839 smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 840 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 841 842 SMSC_LOCK_ASSERT(sc, MA_OWNED); 843 844 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 845 if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0) 846 goto done; 847 848 val = (addr[5] << 8) | addr[4]; 849 err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val); 850 851 done: 852 return (err); 853 } 854 855 /** 856 * smsc_reset - Reset the SMSC chip 857 * @sc: device soft context 858 * 859 * LOCKING: 860 * Should be called with the SMSC lock held. 861 */ 862 static void 863 smsc_reset(struct smsc_softc *sc) 864 { 865 struct usb_config_descriptor *cd; 866 usb_error_t err; 867 868 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 869 870 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 871 cd->bConfigurationValue); 872 if (err) 873 smsc_warn_printf(sc, "reset failed (ignored)\n"); 874 875 /* Wait a little while for the chip to get its brains in order. */ 876 uether_pause(&sc->sc_ue, hz / 100); 877 878 /* Reinitialize controller to achieve full reset. */ 879 smsc_chip_init(sc); 880 } 881 882 /** 883 * smsc_init - Initialises the LAN95xx chip 884 * @ue: USB ether interface 885 * 886 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 887 * initialise the interface and the rx/tx pipes. 888 * 889 * LOCKING: 890 * Should be called with the SMSC lock held. 891 */ 892 static void 893 smsc_init(struct usb_ether *ue) 894 { 895 struct smsc_softc *sc = uether_getsc(ue); 896 struct ifnet *ifp = uether_getifp(ue); 897 898 SMSC_LOCK_ASSERT(sc, MA_OWNED); 899 900 if (smsc_setmacaddress(sc, IF_LLADDR(ifp))) 901 smsc_dbg_printf(sc, "setting MAC address failed\n"); 902 903 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 904 return; 905 906 /* Cancel pending I/O */ 907 smsc_stop(ue); 908 909 /* Reset the ethernet interface. */ 910 smsc_reset(sc); 911 912 /* Load the multicast filter. */ 913 smsc_setmulti(ue); 914 915 /* TCP/UDP checksum offload engines. */ 916 smsc_sethwcsum(sc); 917 918 usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]); 919 920 /* Indicate we are up and running. */ 921 ifp->if_drv_flags |= IFF_DRV_RUNNING; 922 923 /* Switch to selected media. */ 924 smsc_ifmedia_upd(ifp); 925 smsc_start(ue); 926 } 927 928 /** 929 * smsc_bulk_read_callback - Read callback used to process the USB URB 930 * @xfer: the USB transfer 931 * @error: 932 * 933 * Reads the URB data which can contain one or more ethernet frames, the 934 * frames are copyed into a mbuf and given to the system. 935 * 936 * LOCKING: 937 * No locking required, doesn't access internal driver settings. 938 */ 939 static void 940 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 941 { 942 struct smsc_softc *sc = usbd_xfer_softc(xfer); 943 struct usb_ether *ue = &sc->sc_ue; 944 struct ifnet *ifp = uether_getifp(ue); 945 struct mbuf *m; 946 struct usb_page_cache *pc; 947 uint32_t rxhdr; 948 int pktlen; 949 int off; 950 int actlen; 951 952 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 953 smsc_dbg_printf(sc, "rx : actlen %d\n", actlen); 954 955 switch (USB_GET_STATE(xfer)) { 956 case USB_ST_TRANSFERRED: 957 958 /* There is always a zero length frame after bringing the IF up */ 959 if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN)) 960 goto tr_setup; 961 962 /* There maybe multiple packets in the USB frame, each will have a 963 * header and each needs to have it's own mbuf allocated and populated 964 * for it. 965 */ 966 pc = usbd_xfer_get_frame(xfer, 0); 967 off = 0; 968 969 while (off < actlen) { 970 971 /* The frame header is always aligned on a 4 byte boundary */ 972 off = ((off + 0x3) & ~0x3); 973 974 if ((off + sizeof(rxhdr)) > actlen) 975 goto tr_setup; 976 977 usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr)); 978 off += (sizeof(rxhdr) + ETHER_ALIGN); 979 rxhdr = le32toh(rxhdr); 980 981 pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr); 982 983 smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : " 984 "off %d\n", rxhdr, pktlen, actlen, off); 985 986 987 if (rxhdr & SMSC_RX_STAT_ERROR) { 988 smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr); 989 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 990 if (rxhdr & SMSC_RX_STAT_COLLISION) 991 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 992 } else { 993 /* Check if the ethernet frame is too big or too small */ 994 if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off))) 995 goto tr_setup; 996 997 /* Create a new mbuf to store the packet in */ 998 m = uether_newbuf(); 999 if (m == NULL) { 1000 smsc_warn_printf(sc, "failed to create new mbuf\n"); 1001 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1002 goto tr_setup; 1003 } 1004 if (pktlen > m->m_len) { 1005 smsc_dbg_printf(sc, "buffer too small %d vs %d bytes", 1006 pktlen, m->m_len); 1007 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1008 m_freem(m); 1009 goto tr_setup; 1010 } 1011 usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen); 1012 1013 /* Check if RX TCP/UDP checksumming is being offloaded */ 1014 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) { 1015 struct ether_header *eh; 1016 1017 eh = mtod(m, struct ether_header *); 1018 1019 /* Remove the extra 2 bytes of the csum */ 1020 pktlen -= 2; 1021 1022 /* The checksum appears to be simplistically calculated 1023 * over the udp/tcp header and data up to the end of the 1024 * eth frame. Which means if the eth frame is padded 1025 * the csum calculation is incorrectly performed over 1026 * the padding bytes as well. Therefore to be safe we 1027 * ignore the H/W csum on frames less than or equal to 1028 * 64 bytes. 1029 * 1030 * Ignore H/W csum for non-IPv4 packets. 1031 */ 1032 if ((be16toh(eh->ether_type) == ETHERTYPE_IP) && 1033 (pktlen > ETHER_MIN_LEN)) { 1034 struct ip *ip; 1035 1036 ip = (struct ip *)(eh + 1); 1037 if ((ip->ip_v == IPVERSION) && 1038 ((ip->ip_p == IPPROTO_TCP) || 1039 (ip->ip_p == IPPROTO_UDP))) { 1040 /* Indicate the UDP/TCP csum has been calculated */ 1041 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1042 1043 /* Copy the TCP/UDP checksum from the last 2 bytes 1044 * of the transfer and put in the csum_data field. 1045 */ 1046 usbd_copy_out(pc, (off + pktlen), 1047 &m->m_pkthdr.csum_data, 2); 1048 1049 /* The data is copied in network order, but the 1050 * csum algorithm in the kernel expects it to be 1051 * in host network order. 1052 */ 1053 m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data); 1054 1055 smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n", 1056 m->m_pkthdr.csum_data); 1057 } 1058 } 1059 1060 /* Need to adjust the offset as well or we'll be off 1061 * by 2 because the csum is removed from the packet 1062 * length. 1063 */ 1064 off += 2; 1065 } 1066 1067 /* Finally enqueue the mbuf on the receive queue */ 1068 /* Remove 4 trailing bytes */ 1069 if (pktlen < (4 + ETHER_HDR_LEN)) { 1070 m_freem(m); 1071 goto tr_setup; 1072 } 1073 uether_rxmbuf(ue, m, pktlen - 4); 1074 } 1075 1076 /* Update the offset to move to the next potential packet */ 1077 off += pktlen; 1078 } 1079 1080 /* FALLTHROUGH */ 1081 1082 case USB_ST_SETUP: 1083 tr_setup: 1084 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1085 usbd_transfer_submit(xfer); 1086 uether_rxflush(ue); 1087 return; 1088 1089 default: 1090 if (error != USB_ERR_CANCELLED) { 1091 smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error)); 1092 usbd_xfer_set_stall(xfer); 1093 goto tr_setup; 1094 } 1095 return; 1096 } 1097 } 1098 1099 /** 1100 * smsc_bulk_write_callback - Write callback used to send ethernet frame(s) 1101 * @xfer: the USB transfer 1102 * @error: error code if the transfers is in an errored state 1103 * 1104 * The main write function that pulls ethernet frames off the queue and sends 1105 * them out. 1106 * 1107 * LOCKING: 1108 * 1109 */ 1110 static void 1111 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1112 { 1113 struct smsc_softc *sc = usbd_xfer_softc(xfer); 1114 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1115 struct usb_page_cache *pc; 1116 struct mbuf *m; 1117 uint32_t txhdr; 1118 uint32_t frm_len = 0; 1119 int nframes; 1120 1121 switch (USB_GET_STATE(xfer)) { 1122 case USB_ST_TRANSFERRED: 1123 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1124 /* FALLTHROUGH */ 1125 1126 case USB_ST_SETUP: 1127 tr_setup: 1128 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 || 1129 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1130 /* Don't send anything if there is no link or controller is busy. */ 1131 return; 1132 } 1133 1134 for (nframes = 0; nframes < 16 && 1135 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1136 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1137 if (m == NULL) 1138 break; 1139 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1140 nframes); 1141 frm_len = 0; 1142 pc = usbd_xfer_get_frame(xfer, nframes); 1143 1144 /* Each frame is prefixed with two 32-bit values describing the 1145 * length of the packet and buffer. 1146 */ 1147 txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) | 1148 SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG; 1149 txhdr = htole32(txhdr); 1150 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr)); 1151 1152 txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len); 1153 txhdr = htole32(txhdr); 1154 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr)); 1155 1156 frm_len += 8; 1157 1158 /* Next copy in the actual packet */ 1159 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1160 frm_len += m->m_pkthdr.len; 1161 1162 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1163 1164 /* If there's a BPF listener, bounce a copy of this frame to him */ 1165 BPF_MTAP(ifp, m); 1166 1167 m_freem(m); 1168 1169 /* Set frame length. */ 1170 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1171 } 1172 if (nframes != 0) { 1173 usbd_xfer_set_frames(xfer, nframes); 1174 usbd_transfer_submit(xfer); 1175 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1176 } 1177 return; 1178 1179 default: 1180 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1181 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1182 1183 if (error != USB_ERR_CANCELLED) { 1184 smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error)); 1185 usbd_xfer_set_stall(xfer); 1186 goto tr_setup; 1187 } 1188 return; 1189 } 1190 } 1191 1192 /** 1193 * smsc_tick - Called periodically to monitor the state of the LAN95xx chip 1194 * @ue: USB ether interface 1195 * 1196 * Simply calls the mii status functions to check the state of the link. 1197 * 1198 * LOCKING: 1199 * Should be called with the SMSC lock held. 1200 */ 1201 static void 1202 smsc_tick(struct usb_ether *ue) 1203 { 1204 struct smsc_softc *sc = uether_getsc(ue); 1205 struct mii_data *mii = uether_getmii(&sc->sc_ue); 1206 1207 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1208 1209 mii_tick(mii); 1210 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 1211 smsc_miibus_statchg(ue->ue_dev); 1212 if ((sc->sc_flags & SMSC_FLAG_LINK) != 0) 1213 smsc_start(ue); 1214 } 1215 } 1216 1217 /** 1218 * smsc_start - Starts communication with the LAN95xx chip 1219 * @ue: USB ether interface 1220 * 1221 * 1222 * 1223 */ 1224 static void 1225 smsc_start(struct usb_ether *ue) 1226 { 1227 struct smsc_softc *sc = uether_getsc(ue); 1228 1229 /* 1230 * start the USB transfers, if not already started: 1231 */ 1232 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]); 1233 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]); 1234 } 1235 1236 /** 1237 * smsc_stop - Stops communication with the LAN95xx chip 1238 * @ue: USB ether interface 1239 * 1240 * 1241 * 1242 */ 1243 static void 1244 smsc_stop(struct usb_ether *ue) 1245 { 1246 struct smsc_softc *sc = uether_getsc(ue); 1247 struct ifnet *ifp = uether_getifp(ue); 1248 1249 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1250 1251 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1252 sc->sc_flags &= ~SMSC_FLAG_LINK; 1253 1254 /* 1255 * stop all the transfers, if not already stopped: 1256 */ 1257 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]); 1258 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]); 1259 } 1260 1261 /** 1262 * smsc_phy_init - Initialises the in-built SMSC phy 1263 * @sc: driver soft context 1264 * 1265 * Resets the PHY part of the chip and then initialises it to default 1266 * values. The 'link down' and 'auto-negotiation complete' interrupts 1267 * from the PHY are also enabled, however we don't monitor the interrupt 1268 * endpoints for the moment. 1269 * 1270 * RETURNS: 1271 * Returns 0 on success or EIO if failed to reset the PHY. 1272 */ 1273 static int 1274 smsc_phy_init(struct smsc_softc *sc) 1275 { 1276 int bmcr; 1277 usb_ticks_t start_ticks; 1278 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 1279 1280 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1281 1282 /* Reset phy and wait for reset to complete */ 1283 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET); 1284 1285 start_ticks = ticks; 1286 do { 1287 uether_pause(&sc->sc_ue, hz / 100); 1288 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1289 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 1290 1291 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 1292 smsc_err_printf(sc, "PHY reset timed-out"); 1293 return (EIO); 1294 } 1295 1296 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 1297 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | /* all modes */ 1298 ANAR_CSMA | 1299 ANAR_FC | 1300 ANAR_PAUSE_ASYM); 1301 1302 /* Setup the phy to interrupt when the link goes down or autoneg completes */ 1303 smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT); 1304 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK, 1305 (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN)); 1306 1307 /* Restart auto-negotation */ 1308 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1309 bmcr |= BMCR_STARTNEG; 1310 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 1311 1312 return (0); 1313 } 1314 1315 /** 1316 * smsc_chip_init - Initialises the chip after power on 1317 * @sc: driver soft context 1318 * 1319 * This initialisation sequence is modelled on the procedure in the Linux 1320 * driver. 1321 * 1322 * RETURNS: 1323 * Returns 0 on success or an error code on failure. 1324 */ 1325 static int 1326 smsc_chip_init(struct smsc_softc *sc) 1327 { 1328 int err; 1329 int locked; 1330 uint32_t reg_val; 1331 int burst_cap; 1332 1333 locked = mtx_owned(&sc->sc_mtx); 1334 if (!locked) 1335 SMSC_LOCK(sc); 1336 1337 /* Enter H/W config mode */ 1338 smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST); 1339 1340 if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) { 1341 smsc_warn_printf(sc, "timed-out waiting for reset to complete\n"); 1342 goto init_failed; 1343 } 1344 1345 /* Reset the PHY */ 1346 smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST); 1347 1348 if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) { 1349 smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n"); 1350 goto init_failed; 1351 } 1352 1353 /* Set the mac address */ 1354 if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 1355 smsc_warn_printf(sc, "failed to set the MAC address\n"); 1356 goto init_failed; 1357 } 1358 1359 /* Don't know what the HW_CFG_BIR bit is, but following the reset sequence 1360 * as used in the Linux driver. 1361 */ 1362 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1363 smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err); 1364 goto init_failed; 1365 } 1366 reg_val |= SMSC_HW_CFG_BIR; 1367 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1368 1369 /* There is a so called 'turbo mode' that the linux driver supports, it 1370 * seems to allow you to jam multiple frames per Rx transaction. By default 1371 * this driver supports that and therefore allows multiple frames per URB. 1372 * 1373 * The xfer buffer size needs to reflect this as well, therefore based on 1374 * the calculations in the Linux driver the RX bufsize is set to 18944, 1375 * bufsz = (16 * 1024 + 5 * 512) 1376 * 1377 * Burst capability is the number of URBs that can be in a burst of data/ 1378 * ethernet frames. 1379 */ 1380 if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH) 1381 burst_cap = 37; 1382 else 1383 burst_cap = 128; 1384 1385 smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap); 1386 1387 /* Set the default bulk in delay (magic value from Linux driver) */ 1388 smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000); 1389 1390 /* 1391 * Initialise the RX interface 1392 */ 1393 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1394 smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err); 1395 goto init_failed; 1396 } 1397 1398 /* Adjust the packet offset in the buffer (designed to try and align IP 1399 * header on 4 byte boundary) 1400 */ 1401 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1402 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1403 1404 /* The following setings are used for 'turbo mode', a.k.a multiple frames 1405 * per Rx transaction (again info taken form Linux driver). 1406 */ 1407 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1408 1409 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1410 1411 /* Clear the status register ? */ 1412 smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff); 1413 1414 /* Read and display the revision register */ 1415 if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) { 1416 smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err); 1417 goto init_failed; 1418 } 1419 1420 device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n", 1421 (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16, 1422 (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK)); 1423 1424 /* GPIO/LED setup */ 1425 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED | 1426 SMSC_LED_GPIO_CFG_FDX_LED; 1427 smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val); 1428 1429 /* 1430 * Initialise the TX interface 1431 */ 1432 smsc_write_reg(sc, SMSC_FLOW, 0); 1433 1434 smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT); 1435 1436 /* Read the current MAC configuration */ 1437 if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) { 1438 smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err); 1439 goto init_failed; 1440 } 1441 1442 /* Vlan */ 1443 smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN); 1444 1445 /* 1446 * Initialise the PHY 1447 */ 1448 if ((err = smsc_phy_init(sc)) != 0) 1449 goto init_failed; 1450 1451 /* 1452 * Start TX 1453 */ 1454 sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN; 1455 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1456 smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON); 1457 1458 /* 1459 * Start RX 1460 */ 1461 sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN; 1462 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1463 1464 if (!locked) 1465 SMSC_UNLOCK(sc); 1466 1467 return (0); 1468 1469 init_failed: 1470 if (!locked) 1471 SMSC_UNLOCK(sc); 1472 1473 smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err); 1474 return (err); 1475 } 1476 1477 /** 1478 * smsc_ioctl - ioctl function for the device 1479 * @ifp: interface pointer 1480 * @cmd: the ioctl command 1481 * @data: data passed in the ioctl call, typically a pointer to struct ifreq. 1482 * 1483 * The ioctl routine is overridden to detect change requests for the H/W 1484 * checksum capabilities. 1485 * 1486 * RETURNS: 1487 * 0 on success and an error code on failure. 1488 */ 1489 static int 1490 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1491 { 1492 struct usb_ether *ue = ifp->if_softc; 1493 struct smsc_softc *sc; 1494 struct ifreq *ifr; 1495 int rc; 1496 int mask; 1497 int reinit; 1498 1499 if (cmd == SIOCSIFCAP) { 1500 sc = uether_getsc(ue); 1501 ifr = (struct ifreq *)data; 1502 1503 SMSC_LOCK(sc); 1504 1505 rc = 0; 1506 reinit = 0; 1507 1508 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1509 1510 /* Modify the RX CSUM enable bits */ 1511 if ((mask & IFCAP_RXCSUM) != 0 && 1512 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1513 ifp->if_capenable ^= IFCAP_RXCSUM; 1514 1515 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1516 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1517 reinit = 1; 1518 } 1519 } 1520 1521 SMSC_UNLOCK(sc); 1522 if (reinit) 1523 uether_init(ue); 1524 1525 } else { 1526 rc = uether_ioctl(ifp, cmd, data); 1527 } 1528 1529 return (rc); 1530 } 1531 1532 /** 1533 * smsc_attach_post - Called after the driver attached to the USB interface 1534 * @ue: the USB ethernet device 1535 * 1536 * This is where the chip is intialised for the first time. This is different 1537 * from the smsc_init() function in that that one is designed to setup the 1538 * H/W to match the UE settings and can be called after a reset. 1539 * 1540 * 1541 */ 1542 static void 1543 smsc_attach_post(struct usb_ether *ue) 1544 { 1545 struct smsc_softc *sc = uether_getsc(ue); 1546 uint32_t mac_h, mac_l; 1547 int err; 1548 1549 smsc_dbg_printf(sc, "smsc_attach_post\n"); 1550 1551 /* Setup some of the basics */ 1552 sc->sc_phyno = 1; 1553 1554 /* Attempt to get the mac address, if an EEPROM is not attached this 1555 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC 1556 * address based on urandom. 1557 */ 1558 memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1559 1560 /* Check if there is already a MAC address in the register */ 1561 if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) && 1562 (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) { 1563 sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1564 sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1565 sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1566 sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1567 sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1568 sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1569 } 1570 1571 /* MAC address is not set so try to read from EEPROM, if that fails generate 1572 * a random MAC address. 1573 */ 1574 if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1575 err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1576 #ifdef FDT 1577 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) 1578 err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue); 1579 #endif 1580 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) { 1581 read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1582 sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1583 sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1584 } 1585 } 1586 1587 /* Initialise the chip for the first time */ 1588 smsc_chip_init(sc); 1589 } 1590 1591 /** 1592 * smsc_attach_post_sub - Called after the driver attached to the USB interface 1593 * @ue: the USB ethernet device 1594 * 1595 * Most of this is boilerplate code and copied from the base USB ethernet 1596 * driver. It has been overriden so that we can indicate to the system that 1597 * the chip supports H/W checksumming. 1598 * 1599 * RETURNS: 1600 * Returns 0 on success or a negative error code. 1601 */ 1602 static int 1603 smsc_attach_post_sub(struct usb_ether *ue) 1604 { 1605 struct smsc_softc *sc; 1606 struct ifnet *ifp; 1607 int error; 1608 1609 sc = uether_getsc(ue); 1610 ifp = ue->ue_ifp; 1611 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1612 ifp->if_start = uether_start; 1613 ifp->if_ioctl = smsc_ioctl; 1614 ifp->if_init = uether_init; 1615 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1616 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1617 IFQ_SET_READY(&ifp->if_snd); 1618 1619 /* The chip supports TCP/UDP checksum offloading on TX and RX paths, however 1620 * currently only RX checksum is supported in the driver (see top of file). 1621 */ 1622 ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU; 1623 ifp->if_hwassist = 0; 1624 1625 /* TX checksuming is disabled (for now?) 1626 ifp->if_capabilities |= IFCAP_TXCSUM; 1627 ifp->if_capenable |= IFCAP_TXCSUM; 1628 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1629 */ 1630 1631 ifp->if_capenable = ifp->if_capabilities; 1632 1633 mtx_lock(&Giant); 1634 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1635 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1636 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1637 mtx_unlock(&Giant); 1638 1639 return (error); 1640 } 1641 1642 /** 1643 * smsc_probe - Probe the interface. 1644 * @dev: smsc device handle 1645 * 1646 * Checks if the device is a match for this driver. 1647 * 1648 * RETURNS: 1649 * Returns 0 on success or an error code on failure. 1650 */ 1651 static int 1652 smsc_probe(device_t dev) 1653 { 1654 struct usb_attach_arg *uaa = device_get_ivars(dev); 1655 1656 if (uaa->usb_mode != USB_MODE_HOST) 1657 return (ENXIO); 1658 if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX) 1659 return (ENXIO); 1660 if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX) 1661 return (ENXIO); 1662 1663 return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa)); 1664 } 1665 1666 /** 1667 * smsc_attach - Attach the interface. 1668 * @dev: smsc device handle 1669 * 1670 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 1671 * 1672 * RETURNS: 1673 * Returns 0 on success or a negative error code. 1674 */ 1675 static int 1676 smsc_attach(device_t dev) 1677 { 1678 struct usb_attach_arg *uaa = device_get_ivars(dev); 1679 struct smsc_softc *sc = device_get_softc(dev); 1680 struct usb_ether *ue = &sc->sc_ue; 1681 uint8_t iface_index; 1682 int err; 1683 1684 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 1685 1686 device_set_usb_desc(dev); 1687 1688 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1689 1690 /* Setup the endpoints for the SMSC LAN95xx device(s) */ 1691 iface_index = SMSC_IFACE_IDX; 1692 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 1693 smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx); 1694 if (err) { 1695 device_printf(dev, "error: allocating USB transfers failed\n"); 1696 goto detach; 1697 } 1698 1699 ue->ue_sc = sc; 1700 ue->ue_dev = dev; 1701 ue->ue_udev = uaa->device; 1702 ue->ue_mtx = &sc->sc_mtx; 1703 ue->ue_methods = &smsc_ue_methods; 1704 1705 err = uether_ifattach(ue); 1706 if (err) { 1707 device_printf(dev, "error: could not attach interface\n"); 1708 goto detach; 1709 } 1710 return (0); /* success */ 1711 1712 detach: 1713 smsc_detach(dev); 1714 return (ENXIO); /* failure */ 1715 } 1716 1717 /** 1718 * smsc_detach - Detach the interface. 1719 * @dev: smsc device handle 1720 * 1721 * RETURNS: 1722 * Returns 0. 1723 */ 1724 static int 1725 smsc_detach(device_t dev) 1726 { 1727 struct smsc_softc *sc = device_get_softc(dev); 1728 struct usb_ether *ue = &sc->sc_ue; 1729 1730 usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER); 1731 uether_ifdetach(ue); 1732 mtx_destroy(&sc->sc_mtx); 1733 1734 return (0); 1735 } 1736 1737 static device_method_t smsc_methods[] = { 1738 /* Device interface */ 1739 DEVMETHOD(device_probe, smsc_probe), 1740 DEVMETHOD(device_attach, smsc_attach), 1741 DEVMETHOD(device_detach, smsc_detach), 1742 1743 /* bus interface */ 1744 DEVMETHOD(bus_print_child, bus_generic_print_child), 1745 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 1746 1747 /* MII interface */ 1748 DEVMETHOD(miibus_readreg, smsc_miibus_readreg), 1749 DEVMETHOD(miibus_writereg, smsc_miibus_writereg), 1750 DEVMETHOD(miibus_statchg, smsc_miibus_statchg), 1751 1752 DEVMETHOD_END 1753 }; 1754 1755 static driver_t smsc_driver = { 1756 .name = "smsc", 1757 .methods = smsc_methods, 1758 .size = sizeof(struct smsc_softc), 1759 }; 1760 1761 static devclass_t smsc_devclass; 1762 1763 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0); 1764 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0); 1765 MODULE_DEPEND(smsc, uether, 1, 1, 1); 1766 MODULE_DEPEND(smsc, usb, 1, 1, 1); 1767 MODULE_DEPEND(smsc, ether, 1, 1, 1); 1768 MODULE_DEPEND(smsc, miibus, 1, 1, 1); 1769 MODULE_VERSION(smsc, 1); 1770 USB_PNP_HOST_INFO(smsc_devs); 1771