1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012 5 * Ben Gray <bgray@freebsd.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* 33 * SMSC LAN9xxx devices (http://www.smsc.com/) 34 * 35 * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that 36 * support USB 2.0 and 10/100 Mbps Ethernet. 37 * 38 * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter. 39 * The driver only covers the Ethernet part, the standard USB hub driver 40 * supports the hub part. 41 * 42 * This driver is closely modelled on the Linux driver written and copyrighted 43 * by SMSC. 44 * 45 * 46 * 47 * 48 * H/W TCP & UDP Checksum Offloading 49 * --------------------------------- 50 * The chip supports both tx and rx offloading of UDP & TCP checksums, this 51 * feature can be dynamically enabled/disabled. 52 * 53 * RX checksuming is performed across bytes after the IPv4 header to the end of 54 * the Ethernet frame, this means if the frame is padded with non-zero values 55 * the H/W checksum will be incorrect, however the rx code compensates for this. 56 * 57 * TX checksuming is more complicated, the device requires a special header to 58 * be prefixed onto the start of the frame which indicates the start and end 59 * positions of the UDP or TCP frame. This requires the driver to manually 60 * go through the packet data and decode the headers prior to sending. 61 * On Linux they generally provide cues to the location of the csum and the 62 * area to calculate it over, on FreeBSD we seem to have to do it all ourselves, 63 * hence this is not as optimal and therefore h/w tX checksum is currently not 64 * implemented. 65 * 66 */ 67 #include <sys/stdint.h> 68 #include <sys/stddef.h> 69 #include <sys/param.h> 70 #include <sys/queue.h> 71 #include <sys/types.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/bus.h> 75 #include <sys/module.h> 76 #include <sys/lock.h> 77 #include <sys/mutex.h> 78 #include <sys/condvar.h> 79 #include <sys/socket.h> 80 #include <sys/sysctl.h> 81 #include <sys/sx.h> 82 #include <sys/unistd.h> 83 #include <sys/callout.h> 84 #include <sys/malloc.h> 85 #include <sys/priv.h> 86 #include <sys/random.h> 87 88 #include <net/if.h> 89 #include <net/if_var.h> 90 91 #include <netinet/in.h> 92 #include <netinet/ip.h> 93 94 #include "opt_platform.h" 95 96 #ifdef FDT 97 #include <dev/fdt/fdt_common.h> 98 #include <dev/ofw/ofw_bus.h> 99 #include <dev/ofw/ofw_bus_subr.h> 100 #include <dev/usb/usb_fdt_support.h> 101 #endif 102 103 #include <dev/usb/usb.h> 104 #include <dev/usb/usbdi.h> 105 #include <dev/usb/usbdi_util.h> 106 #include "usbdevs.h" 107 108 #define USB_DEBUG_VAR smsc_debug 109 #include <dev/usb/usb_debug.h> 110 #include <dev/usb/usb_process.h> 111 112 #include <dev/usb/net/usb_ethernet.h> 113 114 #include <dev/usb/net/if_smscreg.h> 115 116 #ifdef USB_DEBUG 117 static int smsc_debug = 0; 118 119 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW, 0, "USB smsc"); 120 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0, 121 "Debug level"); 122 #endif 123 124 /* 125 * Various supported device vendors/products. 126 */ 127 static const struct usb_device_id smsc_devs[] = { 128 #define SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 129 SMSC_DEV(LAN89530_ETH, 0), 130 SMSC_DEV(LAN9500_ETH, 0), 131 SMSC_DEV(LAN9500_ETH_2, 0), 132 SMSC_DEV(LAN9500A_ETH, 0), 133 SMSC_DEV(LAN9500A_ETH_2, 0), 134 SMSC_DEV(LAN9505_ETH, 0), 135 SMSC_DEV(LAN9505A_ETH, 0), 136 SMSC_DEV(LAN9514_ETH, 0), 137 SMSC_DEV(LAN9514_ETH_2, 0), 138 SMSC_DEV(LAN9530_ETH, 0), 139 SMSC_DEV(LAN9730_ETH, 0), 140 SMSC_DEV(LAN9500_SAL10, 0), 141 SMSC_DEV(LAN9505_SAL10, 0), 142 SMSC_DEV(LAN9500A_SAL10, 0), 143 SMSC_DEV(LAN9505A_SAL10, 0), 144 SMSC_DEV(LAN9514_SAL10, 0), 145 SMSC_DEV(LAN9500A_HAL, 0), 146 SMSC_DEV(LAN9505A_HAL, 0), 147 #undef SMSC_DEV 148 }; 149 150 151 #ifdef USB_DEBUG 152 #define smsc_dbg_printf(sc, fmt, args...) \ 153 do { \ 154 if (smsc_debug > 0) \ 155 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 156 } while(0) 157 #else 158 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0) 159 #endif 160 161 #define smsc_warn_printf(sc, fmt, args...) \ 162 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 163 164 #define smsc_err_printf(sc, fmt, args...) \ 165 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 166 167 168 #define ETHER_IS_ZERO(addr) \ 169 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 170 171 #define ETHER_IS_VALID(addr) \ 172 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 173 174 static device_probe_t smsc_probe; 175 static device_attach_t smsc_attach; 176 static device_detach_t smsc_detach; 177 178 static usb_callback_t smsc_bulk_read_callback; 179 static usb_callback_t smsc_bulk_write_callback; 180 181 static miibus_readreg_t smsc_miibus_readreg; 182 static miibus_writereg_t smsc_miibus_writereg; 183 static miibus_statchg_t smsc_miibus_statchg; 184 185 #if __FreeBSD_version > 1000000 186 static int smsc_attach_post_sub(struct usb_ether *ue); 187 #endif 188 static uether_fn_t smsc_attach_post; 189 static uether_fn_t smsc_init; 190 static uether_fn_t smsc_stop; 191 static uether_fn_t smsc_start; 192 static uether_fn_t smsc_tick; 193 static uether_fn_t smsc_setmulti; 194 static uether_fn_t smsc_setpromisc; 195 196 static int smsc_ifmedia_upd(struct ifnet *); 197 static void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *); 198 199 static int smsc_chip_init(struct smsc_softc *sc); 200 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 201 202 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = { 203 204 [SMSC_BULK_DT_WR] = { 205 .type = UE_BULK, 206 .endpoint = UE_ADDR_ANY, 207 .direction = UE_DIR_OUT, 208 .frames = 16, 209 .bufsize = 16 * (MCLBYTES + 16), 210 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 211 .callback = smsc_bulk_write_callback, 212 .timeout = 10000, /* 10 seconds */ 213 }, 214 215 [SMSC_BULK_DT_RD] = { 216 .type = UE_BULK, 217 .endpoint = UE_ADDR_ANY, 218 .direction = UE_DIR_IN, 219 .bufsize = 20480, /* bytes */ 220 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 221 .callback = smsc_bulk_read_callback, 222 .timeout = 0, /* no timeout */ 223 }, 224 225 /* The SMSC chip supports an interrupt endpoints, however they aren't 226 * needed as we poll on the MII status. 227 */ 228 }; 229 230 static const struct usb_ether_methods smsc_ue_methods = { 231 .ue_attach_post = smsc_attach_post, 232 #if __FreeBSD_version > 1000000 233 .ue_attach_post_sub = smsc_attach_post_sub, 234 #endif 235 .ue_start = smsc_start, 236 .ue_ioctl = smsc_ioctl, 237 .ue_init = smsc_init, 238 .ue_stop = smsc_stop, 239 .ue_tick = smsc_tick, 240 .ue_setmulti = smsc_setmulti, 241 .ue_setpromisc = smsc_setpromisc, 242 .ue_mii_upd = smsc_ifmedia_upd, 243 .ue_mii_sts = smsc_ifmedia_sts, 244 }; 245 246 /** 247 * smsc_read_reg - Reads a 32-bit register on the device 248 * @sc: driver soft context 249 * @off: offset of the register 250 * @data: pointer a value that will be populated with the register value 251 * 252 * LOCKING: 253 * The device lock must be held before calling this function. 254 * 255 * RETURNS: 256 * 0 on success, a USB_ERR_?? error code on failure. 257 */ 258 static int 259 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data) 260 { 261 struct usb_device_request req; 262 uint32_t buf; 263 usb_error_t err; 264 265 SMSC_LOCK_ASSERT(sc, MA_OWNED); 266 267 req.bmRequestType = UT_READ_VENDOR_DEVICE; 268 req.bRequest = SMSC_UR_READ_REG; 269 USETW(req.wValue, 0); 270 USETW(req.wIndex, off); 271 USETW(req.wLength, 4); 272 273 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 274 if (err != 0) 275 smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off); 276 277 *data = le32toh(buf); 278 279 return (err); 280 } 281 282 /** 283 * smsc_write_reg - Writes a 32-bit register on the device 284 * @sc: driver soft context 285 * @off: offset of the register 286 * @data: the 32-bit value to write into the register 287 * 288 * LOCKING: 289 * The device lock must be held before calling this function. 290 * 291 * RETURNS: 292 * 0 on success, a USB_ERR_?? error code on failure. 293 */ 294 static int 295 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data) 296 { 297 struct usb_device_request req; 298 uint32_t buf; 299 usb_error_t err; 300 301 SMSC_LOCK_ASSERT(sc, MA_OWNED); 302 303 buf = htole32(data); 304 305 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 306 req.bRequest = SMSC_UR_WRITE_REG; 307 USETW(req.wValue, 0); 308 USETW(req.wIndex, off); 309 USETW(req.wLength, 4); 310 311 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 312 if (err != 0) 313 smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off); 314 315 return (err); 316 } 317 318 /** 319 * smsc_wait_for_bits - Polls on a register value until bits are cleared 320 * @sc: soft context 321 * @reg: offset of the register 322 * @bits: if the bits are clear the function returns 323 * 324 * LOCKING: 325 * The device lock must be held before calling this function. 326 * 327 * RETURNS: 328 * 0 on success, or a USB_ERR_?? error code on failure. 329 */ 330 static int 331 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits) 332 { 333 usb_ticks_t start_ticks; 334 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 335 uint32_t val; 336 int err; 337 338 SMSC_LOCK_ASSERT(sc, MA_OWNED); 339 340 start_ticks = (usb_ticks_t)ticks; 341 do { 342 if ((err = smsc_read_reg(sc, reg, &val)) != 0) 343 return (err); 344 if (!(val & bits)) 345 return (0); 346 347 uether_pause(&sc->sc_ue, hz / 100); 348 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 349 350 return (USB_ERR_TIMEOUT); 351 } 352 353 /** 354 * smsc_eeprom_read - Reads the attached EEPROM 355 * @sc: soft context 356 * @off: the eeprom address offset 357 * @buf: stores the bytes 358 * @buflen: the number of bytes to read 359 * 360 * Simply reads bytes from an attached eeprom. 361 * 362 * LOCKING: 363 * The function takes and releases the device lock if it is not already held. 364 * 365 * RETURNS: 366 * 0 on success, or a USB_ERR_?? error code on failure. 367 */ 368 static int 369 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen) 370 { 371 usb_ticks_t start_ticks; 372 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 373 int err; 374 int locked; 375 uint32_t val; 376 uint16_t i; 377 378 locked = mtx_owned(&sc->sc_mtx); 379 if (!locked) 380 SMSC_LOCK(sc); 381 382 err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY); 383 if (err != 0) { 384 smsc_warn_printf(sc, "eeprom busy, failed to read data\n"); 385 goto done; 386 } 387 388 /* start reading the bytes, one at a time */ 389 for (i = 0; i < buflen; i++) { 390 391 val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i)); 392 if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0) 393 goto done; 394 395 start_ticks = (usb_ticks_t)ticks; 396 do { 397 if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0) 398 goto done; 399 if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT)) 400 break; 401 402 uether_pause(&sc->sc_ue, hz / 100); 403 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 404 405 if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) { 406 smsc_warn_printf(sc, "eeprom command failed\n"); 407 err = USB_ERR_IOERROR; 408 break; 409 } 410 411 if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0) 412 goto done; 413 414 buf[i] = (val & 0xff); 415 } 416 417 done: 418 if (!locked) 419 SMSC_UNLOCK(sc); 420 421 return (err); 422 } 423 424 /** 425 * smsc_miibus_readreg - Reads a MII/MDIO register 426 * @dev: usb ether device 427 * @phy: the number of phy reading from 428 * @reg: the register address 429 * 430 * Attempts to read a phy register over the MII bus. 431 * 432 * LOCKING: 433 * Takes and releases the device mutex lock if not already held. 434 * 435 * RETURNS: 436 * Returns the 16-bits read from the MII register, if this function fails 0 437 * is returned. 438 */ 439 static int 440 smsc_miibus_readreg(device_t dev, int phy, int reg) 441 { 442 struct smsc_softc *sc = device_get_softc(dev); 443 int locked; 444 uint32_t addr; 445 uint32_t val = 0; 446 447 locked = mtx_owned(&sc->sc_mtx); 448 if (!locked) 449 SMSC_LOCK(sc); 450 451 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 452 smsc_warn_printf(sc, "MII is busy\n"); 453 goto done; 454 } 455 456 addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY; 457 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 458 459 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 460 smsc_warn_printf(sc, "MII read timeout\n"); 461 462 smsc_read_reg(sc, SMSC_MII_DATA, &val); 463 val = le32toh(val); 464 465 done: 466 if (!locked) 467 SMSC_UNLOCK(sc); 468 469 return (val & 0xFFFF); 470 } 471 472 /** 473 * smsc_miibus_writereg - Writes a MII/MDIO register 474 * @dev: usb ether device 475 * @phy: the number of phy writing to 476 * @reg: the register address 477 * @val: the value to write 478 * 479 * Attempts to write a phy register over the MII bus. 480 * 481 * LOCKING: 482 * Takes and releases the device mutex lock if not already held. 483 * 484 * RETURNS: 485 * Always returns 0 regardless of success or failure. 486 */ 487 static int 488 smsc_miibus_writereg(device_t dev, int phy, int reg, int val) 489 { 490 struct smsc_softc *sc = device_get_softc(dev); 491 int locked; 492 uint32_t addr; 493 494 if (sc->sc_phyno != phy) 495 return (0); 496 497 locked = mtx_owned(&sc->sc_mtx); 498 if (!locked) 499 SMSC_LOCK(sc); 500 501 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 502 smsc_warn_printf(sc, "MII is busy\n"); 503 goto done; 504 } 505 506 val = htole32(val); 507 smsc_write_reg(sc, SMSC_MII_DATA, val); 508 509 addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY; 510 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 511 512 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 513 smsc_warn_printf(sc, "MII write timeout\n"); 514 515 done: 516 if (!locked) 517 SMSC_UNLOCK(sc); 518 return (0); 519 } 520 521 522 523 /** 524 * smsc_miibus_statchg - Called to detect phy status change 525 * @dev: usb ether device 526 * 527 * This function is called periodically by the system to poll for status 528 * changes of the link. 529 * 530 * LOCKING: 531 * Takes and releases the device mutex lock if not already held. 532 */ 533 static void 534 smsc_miibus_statchg(device_t dev) 535 { 536 struct smsc_softc *sc = device_get_softc(dev); 537 struct mii_data *mii = uether_getmii(&sc->sc_ue); 538 struct ifnet *ifp; 539 int locked; 540 int err; 541 uint32_t flow; 542 uint32_t afc_cfg; 543 544 locked = mtx_owned(&sc->sc_mtx); 545 if (!locked) 546 SMSC_LOCK(sc); 547 548 ifp = uether_getifp(&sc->sc_ue); 549 if (mii == NULL || ifp == NULL || 550 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 551 goto done; 552 553 /* Use the MII status to determine link status */ 554 sc->sc_flags &= ~SMSC_FLAG_LINK; 555 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 556 (IFM_ACTIVE | IFM_AVALID)) { 557 switch (IFM_SUBTYPE(mii->mii_media_active)) { 558 case IFM_10_T: 559 case IFM_100_TX: 560 sc->sc_flags |= SMSC_FLAG_LINK; 561 break; 562 case IFM_1000_T: 563 /* Gigabit ethernet not supported by chipset */ 564 break; 565 default: 566 break; 567 } 568 } 569 570 /* Lost link, do nothing. */ 571 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 572 smsc_dbg_printf(sc, "link flag not set\n"); 573 goto done; 574 } 575 576 err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg); 577 if (err) { 578 smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err); 579 goto done; 580 } 581 582 /* Enable/disable full duplex operation and TX/RX pause */ 583 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 584 smsc_dbg_printf(sc, "full duplex operation\n"); 585 sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN; 586 sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX; 587 588 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 589 flow = 0xffff0002; 590 else 591 flow = 0; 592 593 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 594 afc_cfg |= 0xf; 595 else 596 afc_cfg &= ~0xf; 597 598 } else { 599 smsc_dbg_printf(sc, "half duplex operation\n"); 600 sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX; 601 sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN; 602 603 flow = 0; 604 afc_cfg |= 0xf; 605 } 606 607 err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 608 err += smsc_write_reg(sc, SMSC_FLOW, flow); 609 err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg); 610 if (err) 611 smsc_warn_printf(sc, "media change failed, error %d\n", err); 612 613 done: 614 if (!locked) 615 SMSC_UNLOCK(sc); 616 } 617 618 /** 619 * smsc_ifmedia_upd - Set media options 620 * @ifp: interface pointer 621 * 622 * Basically boilerplate code that simply calls the mii functions to set the 623 * media options. 624 * 625 * LOCKING: 626 * The device lock must be held before this function is called. 627 * 628 * RETURNS: 629 * Returns 0 on success or a negative error code. 630 */ 631 static int 632 smsc_ifmedia_upd(struct ifnet *ifp) 633 { 634 struct smsc_softc *sc = ifp->if_softc; 635 struct mii_data *mii = uether_getmii(&sc->sc_ue); 636 struct mii_softc *miisc; 637 int err; 638 639 SMSC_LOCK_ASSERT(sc, MA_OWNED); 640 641 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 642 PHY_RESET(miisc); 643 err = mii_mediachg(mii); 644 return (err); 645 } 646 647 /** 648 * smsc_ifmedia_sts - Report current media status 649 * @ifp: inet interface pointer 650 * @ifmr: interface media request 651 * 652 * Basically boilerplate code that simply calls the mii functions to get the 653 * media status. 654 * 655 * LOCKING: 656 * Internally takes and releases the device lock. 657 */ 658 static void 659 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 660 { 661 struct smsc_softc *sc = ifp->if_softc; 662 struct mii_data *mii = uether_getmii(&sc->sc_ue); 663 664 SMSC_LOCK(sc); 665 mii_pollstat(mii); 666 ifmr->ifm_active = mii->mii_media_active; 667 ifmr->ifm_status = mii->mii_media_status; 668 SMSC_UNLOCK(sc); 669 } 670 671 /** 672 * smsc_hash - Calculate the hash of a mac address 673 * @addr: The mac address to calculate the hash on 674 * 675 * This function is used when configuring a range of m'cast mac addresses to 676 * filter on. The hash of the mac address is put in the device's mac hash 677 * table. 678 * 679 * RETURNS: 680 * Returns a value from 0-63 value which is the hash of the mac address. 681 */ 682 static inline uint32_t 683 smsc_hash(uint8_t addr[ETHER_ADDR_LEN]) 684 { 685 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 686 } 687 688 /** 689 * smsc_setmulti - Setup multicast 690 * @ue: usb ethernet device context 691 * 692 * Tells the device to either accept frames with a multicast mac address, a 693 * select group of m'cast mac addresses or just the devices mac address. 694 * 695 * LOCKING: 696 * Should be called with the SMSC lock held. 697 */ 698 static void 699 smsc_setmulti(struct usb_ether *ue) 700 { 701 struct smsc_softc *sc = uether_getsc(ue); 702 struct ifnet *ifp = uether_getifp(ue); 703 struct ifmultiaddr *ifma; 704 uint32_t hashtbl[2] = { 0, 0 }; 705 uint32_t hash; 706 707 SMSC_LOCK_ASSERT(sc, MA_OWNED); 708 709 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 710 smsc_dbg_printf(sc, "receive all multicast enabled\n"); 711 sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS; 712 sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT; 713 714 } else { 715 /* Take the lock of the mac address list before hashing each of them */ 716 if_maddr_rlock(ifp); 717 718 if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) { 719 /* We are filtering on a set of address so calculate hashes of each 720 * of the address and set the corresponding bits in the register. 721 */ 722 sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT; 723 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS); 724 725 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 726 if (ifma->ifma_addr->sa_family != AF_LINK) 727 continue; 728 729 hash = smsc_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 730 hashtbl[hash >> 5] |= 1 << (hash & 0x1F); 731 } 732 } else { 733 /* Only receive packets with destination set to our mac address */ 734 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT); 735 } 736 737 if_maddr_runlock(ifp); 738 739 /* Debug */ 740 if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) 741 smsc_dbg_printf(sc, "receive select group of macs\n"); 742 else 743 smsc_dbg_printf(sc, "receive own packets only\n"); 744 } 745 746 /* Write the hash table and mac control registers */ 747 smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]); 748 smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]); 749 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 750 } 751 752 753 /** 754 * smsc_setpromisc - Enables/disables promiscuous mode 755 * @ue: usb ethernet device context 756 * 757 * LOCKING: 758 * Should be called with the SMSC lock held. 759 */ 760 static void 761 smsc_setpromisc(struct usb_ether *ue) 762 { 763 struct smsc_softc *sc = uether_getsc(ue); 764 struct ifnet *ifp = uether_getifp(ue); 765 766 smsc_dbg_printf(sc, "promiscuous mode %sabled\n", 767 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 768 769 SMSC_LOCK_ASSERT(sc, MA_OWNED); 770 771 if (ifp->if_flags & IFF_PROMISC) 772 sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS; 773 else 774 sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS; 775 776 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 777 } 778 779 780 /** 781 * smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming 782 * @sc: driver soft context 783 * 784 * LOCKING: 785 * Should be called with the SMSC lock held. 786 * 787 * RETURNS: 788 * Returns 0 on success or a negative error code. 789 */ 790 static int smsc_sethwcsum(struct smsc_softc *sc) 791 { 792 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 793 uint32_t val; 794 int err; 795 796 if (!ifp) 797 return (-EIO); 798 799 SMSC_LOCK_ASSERT(sc, MA_OWNED); 800 801 err = smsc_read_reg(sc, SMSC_COE_CTRL, &val); 802 if (err != 0) { 803 smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err); 804 return (err); 805 } 806 807 /* Enable/disable the Rx checksum */ 808 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM) 809 val |= SMSC_COE_CTRL_RX_EN; 810 else 811 val &= ~SMSC_COE_CTRL_RX_EN; 812 813 /* Enable/disable the Tx checksum (currently not supported) */ 814 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM) 815 val |= SMSC_COE_CTRL_TX_EN; 816 else 817 val &= ~SMSC_COE_CTRL_TX_EN; 818 819 err = smsc_write_reg(sc, SMSC_COE_CTRL, val); 820 if (err != 0) { 821 smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err); 822 return (err); 823 } 824 825 return (0); 826 } 827 828 /** 829 * smsc_setmacaddress - Sets the mac address in the device 830 * @sc: driver soft context 831 * @addr: pointer to array contain at least 6 bytes of the mac 832 * 833 * Writes the MAC address into the device, usually the MAC is programmed with 834 * values from the EEPROM. 835 * 836 * LOCKING: 837 * Should be called with the SMSC lock held. 838 * 839 * RETURNS: 840 * Returns 0 on success or a negative error code. 841 */ 842 static int 843 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr) 844 { 845 int err; 846 uint32_t val; 847 848 smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 849 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 850 851 SMSC_LOCK_ASSERT(sc, MA_OWNED); 852 853 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 854 if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0) 855 goto done; 856 857 val = (addr[5] << 8) | addr[4]; 858 err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val); 859 860 done: 861 return (err); 862 } 863 864 /** 865 * smsc_reset - Reset the SMSC chip 866 * @sc: device soft context 867 * 868 * LOCKING: 869 * Should be called with the SMSC lock held. 870 */ 871 static void 872 smsc_reset(struct smsc_softc *sc) 873 { 874 struct usb_config_descriptor *cd; 875 usb_error_t err; 876 877 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 878 879 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 880 cd->bConfigurationValue); 881 if (err) 882 smsc_warn_printf(sc, "reset failed (ignored)\n"); 883 884 /* Wait a little while for the chip to get its brains in order. */ 885 uether_pause(&sc->sc_ue, hz / 100); 886 887 /* Reinitialize controller to achieve full reset. */ 888 smsc_chip_init(sc); 889 } 890 891 892 /** 893 * smsc_init - Initialises the LAN95xx chip 894 * @ue: USB ether interface 895 * 896 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 897 * initialise the interface and the rx/tx pipes. 898 * 899 * LOCKING: 900 * Should be called with the SMSC lock held. 901 */ 902 static void 903 smsc_init(struct usb_ether *ue) 904 { 905 struct smsc_softc *sc = uether_getsc(ue); 906 struct ifnet *ifp = uether_getifp(ue); 907 908 SMSC_LOCK_ASSERT(sc, MA_OWNED); 909 910 if (smsc_setmacaddress(sc, IF_LLADDR(ifp))) 911 smsc_dbg_printf(sc, "setting MAC address failed\n"); 912 913 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 914 return; 915 916 /* Cancel pending I/O */ 917 smsc_stop(ue); 918 919 #if __FreeBSD_version <= 1000000 920 /* On earlier versions this was the first place we could tell the system 921 * that we supported h/w csuming, however this is only called after the 922 * the interface has been brought up - not ideal. 923 */ 924 if (!(ifp->if_capabilities & IFCAP_RXCSUM)) { 925 ifp->if_capabilities |= IFCAP_RXCSUM; 926 ifp->if_capenable |= IFCAP_RXCSUM; 927 ifp->if_hwassist = 0; 928 } 929 930 /* TX checksuming is disabled for now 931 ifp->if_capabilities |= IFCAP_TXCSUM; 932 ifp->if_capenable |= IFCAP_TXCSUM; 933 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 934 */ 935 #endif 936 937 /* Reset the ethernet interface. */ 938 smsc_reset(sc); 939 940 /* Load the multicast filter. */ 941 smsc_setmulti(ue); 942 943 /* TCP/UDP checksum offload engines. */ 944 smsc_sethwcsum(sc); 945 946 usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]); 947 948 /* Indicate we are up and running. */ 949 ifp->if_drv_flags |= IFF_DRV_RUNNING; 950 951 /* Switch to selected media. */ 952 smsc_ifmedia_upd(ifp); 953 smsc_start(ue); 954 } 955 956 /** 957 * smsc_bulk_read_callback - Read callback used to process the USB URB 958 * @xfer: the USB transfer 959 * @error: 960 * 961 * Reads the URB data which can contain one or more ethernet frames, the 962 * frames are copyed into a mbuf and given to the system. 963 * 964 * LOCKING: 965 * No locking required, doesn't access internal driver settings. 966 */ 967 static void 968 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 969 { 970 struct smsc_softc *sc = usbd_xfer_softc(xfer); 971 struct usb_ether *ue = &sc->sc_ue; 972 struct ifnet *ifp = uether_getifp(ue); 973 struct mbuf *m; 974 struct usb_page_cache *pc; 975 uint32_t rxhdr; 976 uint16_t pktlen; 977 int off; 978 int actlen; 979 980 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 981 smsc_dbg_printf(sc, "rx : actlen %d\n", actlen); 982 983 switch (USB_GET_STATE(xfer)) { 984 case USB_ST_TRANSFERRED: 985 986 /* There is always a zero length frame after bringing the IF up */ 987 if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN)) 988 goto tr_setup; 989 990 /* There maybe multiple packets in the USB frame, each will have a 991 * header and each needs to have it's own mbuf allocated and populated 992 * for it. 993 */ 994 pc = usbd_xfer_get_frame(xfer, 0); 995 off = 0; 996 997 while (off < actlen) { 998 999 /* The frame header is always aligned on a 4 byte boundary */ 1000 off = ((off + 0x3) & ~0x3); 1001 1002 usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr)); 1003 off += (sizeof(rxhdr) + ETHER_ALIGN); 1004 rxhdr = le32toh(rxhdr); 1005 1006 pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr); 1007 1008 smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : " 1009 "off %d\n", rxhdr, pktlen, actlen, off); 1010 1011 1012 if (rxhdr & SMSC_RX_STAT_ERROR) { 1013 smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr); 1014 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1015 if (rxhdr & SMSC_RX_STAT_COLLISION) 1016 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 1017 } else { 1018 1019 /* Check if the ethernet frame is too big or too small */ 1020 if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off))) 1021 goto tr_setup; 1022 1023 /* Create a new mbuf to store the packet in */ 1024 m = uether_newbuf(); 1025 if (m == NULL) { 1026 smsc_warn_printf(sc, "failed to create new mbuf\n"); 1027 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1028 goto tr_setup; 1029 } 1030 1031 usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen); 1032 1033 /* Check if RX TCP/UDP checksumming is being offloaded */ 1034 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) { 1035 1036 struct ether_header *eh; 1037 1038 eh = mtod(m, struct ether_header *); 1039 1040 /* Remove the extra 2 bytes of the csum */ 1041 pktlen -= 2; 1042 1043 /* The checksum appears to be simplistically calculated 1044 * over the udp/tcp header and data up to the end of the 1045 * eth frame. Which means if the eth frame is padded 1046 * the csum calculation is incorrectly performed over 1047 * the padding bytes as well. Therefore to be safe we 1048 * ignore the H/W csum on frames less than or equal to 1049 * 64 bytes. 1050 * 1051 * Ignore H/W csum for non-IPv4 packets. 1052 */ 1053 if ((be16toh(eh->ether_type) == ETHERTYPE_IP) && 1054 (pktlen > ETHER_MIN_LEN)) { 1055 struct ip *ip; 1056 1057 ip = (struct ip *)(eh + 1); 1058 if ((ip->ip_v == IPVERSION) && 1059 ((ip->ip_p == IPPROTO_TCP) || 1060 (ip->ip_p == IPPROTO_UDP))) { 1061 /* Indicate the UDP/TCP csum has been calculated */ 1062 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1063 1064 /* Copy the TCP/UDP checksum from the last 2 bytes 1065 * of the transfer and put in the csum_data field. 1066 */ 1067 usbd_copy_out(pc, (off + pktlen), 1068 &m->m_pkthdr.csum_data, 2); 1069 1070 /* The data is copied in network order, but the 1071 * csum algorithm in the kernel expects it to be 1072 * in host network order. 1073 */ 1074 m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data); 1075 1076 smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n", 1077 m->m_pkthdr.csum_data); 1078 } 1079 } 1080 1081 /* Need to adjust the offset as well or we'll be off 1082 * by 2 because the csum is removed from the packet 1083 * length. 1084 */ 1085 off += 2; 1086 } 1087 1088 /* Finally enqueue the mbuf on the receive queue */ 1089 /* Remove 4 trailing bytes */ 1090 if (pktlen < (4 + ETHER_HDR_LEN)) { 1091 m_freem(m); 1092 goto tr_setup; 1093 } 1094 uether_rxmbuf(ue, m, pktlen - 4); 1095 } 1096 1097 /* Update the offset to move to the next potential packet */ 1098 off += pktlen; 1099 } 1100 1101 /* FALLTHROUGH */ 1102 1103 case USB_ST_SETUP: 1104 tr_setup: 1105 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1106 usbd_transfer_submit(xfer); 1107 uether_rxflush(ue); 1108 return; 1109 1110 default: 1111 if (error != USB_ERR_CANCELLED) { 1112 smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error)); 1113 usbd_xfer_set_stall(xfer); 1114 goto tr_setup; 1115 } 1116 return; 1117 } 1118 } 1119 1120 /** 1121 * smsc_bulk_write_callback - Write callback used to send ethernet frame(s) 1122 * @xfer: the USB transfer 1123 * @error: error code if the transfers is in an errored state 1124 * 1125 * The main write function that pulls ethernet frames off the queue and sends 1126 * them out. 1127 * 1128 * LOCKING: 1129 * 1130 */ 1131 static void 1132 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1133 { 1134 struct smsc_softc *sc = usbd_xfer_softc(xfer); 1135 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1136 struct usb_page_cache *pc; 1137 struct mbuf *m; 1138 uint32_t txhdr; 1139 uint32_t frm_len = 0; 1140 int nframes; 1141 1142 switch (USB_GET_STATE(xfer)) { 1143 case USB_ST_TRANSFERRED: 1144 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1145 /* FALLTHROUGH */ 1146 1147 case USB_ST_SETUP: 1148 tr_setup: 1149 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 || 1150 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1151 /* Don't send anything if there is no link or controller is busy. */ 1152 return; 1153 } 1154 1155 for (nframes = 0; nframes < 16 && 1156 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1157 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1158 if (m == NULL) 1159 break; 1160 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1161 nframes); 1162 frm_len = 0; 1163 pc = usbd_xfer_get_frame(xfer, nframes); 1164 1165 /* Each frame is prefixed with two 32-bit values describing the 1166 * length of the packet and buffer. 1167 */ 1168 txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) | 1169 SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG; 1170 txhdr = htole32(txhdr); 1171 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr)); 1172 1173 txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len); 1174 txhdr = htole32(txhdr); 1175 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr)); 1176 1177 frm_len += 8; 1178 1179 /* Next copy in the actual packet */ 1180 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1181 frm_len += m->m_pkthdr.len; 1182 1183 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1184 1185 /* If there's a BPF listener, bounce a copy of this frame to him */ 1186 BPF_MTAP(ifp, m); 1187 1188 m_freem(m); 1189 1190 /* Set frame length. */ 1191 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1192 } 1193 if (nframes != 0) { 1194 usbd_xfer_set_frames(xfer, nframes); 1195 usbd_transfer_submit(xfer); 1196 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1197 } 1198 return; 1199 1200 default: 1201 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1202 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1203 1204 if (error != USB_ERR_CANCELLED) { 1205 smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error)); 1206 usbd_xfer_set_stall(xfer); 1207 goto tr_setup; 1208 } 1209 return; 1210 } 1211 } 1212 1213 /** 1214 * smsc_tick - Called periodically to monitor the state of the LAN95xx chip 1215 * @ue: USB ether interface 1216 * 1217 * Simply calls the mii status functions to check the state of the link. 1218 * 1219 * LOCKING: 1220 * Should be called with the SMSC lock held. 1221 */ 1222 static void 1223 smsc_tick(struct usb_ether *ue) 1224 { 1225 struct smsc_softc *sc = uether_getsc(ue); 1226 struct mii_data *mii = uether_getmii(&sc->sc_ue); 1227 1228 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1229 1230 mii_tick(mii); 1231 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 1232 smsc_miibus_statchg(ue->ue_dev); 1233 if ((sc->sc_flags & SMSC_FLAG_LINK) != 0) 1234 smsc_start(ue); 1235 } 1236 } 1237 1238 /** 1239 * smsc_start - Starts communication with the LAN95xx chip 1240 * @ue: USB ether interface 1241 * 1242 * 1243 * 1244 */ 1245 static void 1246 smsc_start(struct usb_ether *ue) 1247 { 1248 struct smsc_softc *sc = uether_getsc(ue); 1249 1250 /* 1251 * start the USB transfers, if not already started: 1252 */ 1253 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]); 1254 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]); 1255 } 1256 1257 /** 1258 * smsc_stop - Stops communication with the LAN95xx chip 1259 * @ue: USB ether interface 1260 * 1261 * 1262 * 1263 */ 1264 static void 1265 smsc_stop(struct usb_ether *ue) 1266 { 1267 struct smsc_softc *sc = uether_getsc(ue); 1268 struct ifnet *ifp = uether_getifp(ue); 1269 1270 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1271 1272 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1273 sc->sc_flags &= ~SMSC_FLAG_LINK; 1274 1275 /* 1276 * stop all the transfers, if not already stopped: 1277 */ 1278 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]); 1279 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]); 1280 } 1281 1282 /** 1283 * smsc_phy_init - Initialises the in-built SMSC phy 1284 * @sc: driver soft context 1285 * 1286 * Resets the PHY part of the chip and then initialises it to default 1287 * values. The 'link down' and 'auto-negotiation complete' interrupts 1288 * from the PHY are also enabled, however we don't monitor the interrupt 1289 * endpoints for the moment. 1290 * 1291 * RETURNS: 1292 * Returns 0 on success or EIO if failed to reset the PHY. 1293 */ 1294 static int 1295 smsc_phy_init(struct smsc_softc *sc) 1296 { 1297 int bmcr; 1298 usb_ticks_t start_ticks; 1299 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 1300 1301 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1302 1303 /* Reset phy and wait for reset to complete */ 1304 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET); 1305 1306 start_ticks = ticks; 1307 do { 1308 uether_pause(&sc->sc_ue, hz / 100); 1309 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1310 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 1311 1312 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 1313 smsc_err_printf(sc, "PHY reset timed-out"); 1314 return (EIO); 1315 } 1316 1317 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 1318 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | /* all modes */ 1319 ANAR_CSMA | 1320 ANAR_FC | 1321 ANAR_PAUSE_ASYM); 1322 1323 /* Setup the phy to interrupt when the link goes down or autoneg completes */ 1324 smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT); 1325 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK, 1326 (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN)); 1327 1328 /* Restart auto-negotation */ 1329 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1330 bmcr |= BMCR_STARTNEG; 1331 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 1332 1333 return (0); 1334 } 1335 1336 1337 /** 1338 * smsc_chip_init - Initialises the chip after power on 1339 * @sc: driver soft context 1340 * 1341 * This initialisation sequence is modelled on the procedure in the Linux 1342 * driver. 1343 * 1344 * RETURNS: 1345 * Returns 0 on success or an error code on failure. 1346 */ 1347 static int 1348 smsc_chip_init(struct smsc_softc *sc) 1349 { 1350 int err; 1351 int locked; 1352 uint32_t reg_val; 1353 int burst_cap; 1354 1355 locked = mtx_owned(&sc->sc_mtx); 1356 if (!locked) 1357 SMSC_LOCK(sc); 1358 1359 /* Enter H/W config mode */ 1360 smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST); 1361 1362 if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) { 1363 smsc_warn_printf(sc, "timed-out waiting for reset to complete\n"); 1364 goto init_failed; 1365 } 1366 1367 /* Reset the PHY */ 1368 smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST); 1369 1370 if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) { 1371 smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n"); 1372 goto init_failed; 1373 } 1374 1375 /* Set the mac address */ 1376 if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 1377 smsc_warn_printf(sc, "failed to set the MAC address\n"); 1378 goto init_failed; 1379 } 1380 1381 /* Don't know what the HW_CFG_BIR bit is, but following the reset sequence 1382 * as used in the Linux driver. 1383 */ 1384 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1385 smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err); 1386 goto init_failed; 1387 } 1388 reg_val |= SMSC_HW_CFG_BIR; 1389 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1390 1391 /* There is a so called 'turbo mode' that the linux driver supports, it 1392 * seems to allow you to jam multiple frames per Rx transaction. By default 1393 * this driver supports that and therefore allows multiple frames per URB. 1394 * 1395 * The xfer buffer size needs to reflect this as well, therefore based on 1396 * the calculations in the Linux driver the RX bufsize is set to 18944, 1397 * bufsz = (16 * 1024 + 5 * 512) 1398 * 1399 * Burst capability is the number of URBs that can be in a burst of data/ 1400 * ethernet frames. 1401 */ 1402 if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH) 1403 burst_cap = 37; 1404 else 1405 burst_cap = 128; 1406 1407 smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap); 1408 1409 /* Set the default bulk in delay (magic value from Linux driver) */ 1410 smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000); 1411 1412 1413 1414 /* 1415 * Initialise the RX interface 1416 */ 1417 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1418 smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err); 1419 goto init_failed; 1420 } 1421 1422 /* Adjust the packet offset in the buffer (designed to try and align IP 1423 * header on 4 byte boundary) 1424 */ 1425 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1426 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1427 1428 /* The following setings are used for 'turbo mode', a.k.a multiple frames 1429 * per Rx transaction (again info taken form Linux driver). 1430 */ 1431 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1432 1433 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1434 1435 /* Clear the status register ? */ 1436 smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff); 1437 1438 /* Read and display the revision register */ 1439 if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) { 1440 smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err); 1441 goto init_failed; 1442 } 1443 1444 device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n", 1445 (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16, 1446 (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK)); 1447 1448 /* GPIO/LED setup */ 1449 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED | 1450 SMSC_LED_GPIO_CFG_FDX_LED; 1451 smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val); 1452 1453 /* 1454 * Initialise the TX interface 1455 */ 1456 smsc_write_reg(sc, SMSC_FLOW, 0); 1457 1458 smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT); 1459 1460 /* Read the current MAC configuration */ 1461 if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) { 1462 smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err); 1463 goto init_failed; 1464 } 1465 1466 /* Vlan */ 1467 smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN); 1468 1469 /* 1470 * Initialise the PHY 1471 */ 1472 if ((err = smsc_phy_init(sc)) != 0) 1473 goto init_failed; 1474 1475 1476 /* 1477 * Start TX 1478 */ 1479 sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN; 1480 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1481 smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON); 1482 1483 /* 1484 * Start RX 1485 */ 1486 sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN; 1487 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1488 1489 if (!locked) 1490 SMSC_UNLOCK(sc); 1491 1492 return (0); 1493 1494 init_failed: 1495 if (!locked) 1496 SMSC_UNLOCK(sc); 1497 1498 smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err); 1499 return (err); 1500 } 1501 1502 1503 /** 1504 * smsc_ioctl - ioctl function for the device 1505 * @ifp: interface pointer 1506 * @cmd: the ioctl command 1507 * @data: data passed in the ioctl call, typically a pointer to struct ifreq. 1508 * 1509 * The ioctl routine is overridden to detect change requests for the H/W 1510 * checksum capabilities. 1511 * 1512 * RETURNS: 1513 * 0 on success and an error code on failure. 1514 */ 1515 static int 1516 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1517 { 1518 struct usb_ether *ue = ifp->if_softc; 1519 struct smsc_softc *sc; 1520 struct ifreq *ifr; 1521 int rc; 1522 int mask; 1523 int reinit; 1524 1525 if (cmd == SIOCSIFCAP) { 1526 1527 sc = uether_getsc(ue); 1528 ifr = (struct ifreq *)data; 1529 1530 SMSC_LOCK(sc); 1531 1532 rc = 0; 1533 reinit = 0; 1534 1535 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1536 1537 /* Modify the RX CSUM enable bits */ 1538 if ((mask & IFCAP_RXCSUM) != 0 && 1539 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1540 ifp->if_capenable ^= IFCAP_RXCSUM; 1541 1542 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1543 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1544 reinit = 1; 1545 } 1546 } 1547 1548 SMSC_UNLOCK(sc); 1549 if (reinit) 1550 #if __FreeBSD_version > 1000000 1551 uether_init(ue); 1552 #else 1553 ifp->if_init(ue); 1554 #endif 1555 1556 } else { 1557 rc = uether_ioctl(ifp, cmd, data); 1558 } 1559 1560 return (rc); 1561 } 1562 1563 /** 1564 * smsc_attach_post - Called after the driver attached to the USB interface 1565 * @ue: the USB ethernet device 1566 * 1567 * This is where the chip is intialised for the first time. This is different 1568 * from the smsc_init() function in that that one is designed to setup the 1569 * H/W to match the UE settings and can be called after a reset. 1570 * 1571 * 1572 */ 1573 static void 1574 smsc_attach_post(struct usb_ether *ue) 1575 { 1576 struct smsc_softc *sc = uether_getsc(ue); 1577 uint32_t mac_h, mac_l; 1578 int err; 1579 1580 smsc_dbg_printf(sc, "smsc_attach_post\n"); 1581 1582 /* Setup some of the basics */ 1583 sc->sc_phyno = 1; 1584 1585 1586 /* Attempt to get the mac address, if an EEPROM is not attached this 1587 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC 1588 * address based on urandom. 1589 */ 1590 memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1591 1592 /* Check if there is already a MAC address in the register */ 1593 if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) && 1594 (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) { 1595 sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1596 sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1597 sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1598 sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1599 sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1600 sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1601 } 1602 1603 /* MAC address is not set so try to read from EEPROM, if that fails generate 1604 * a random MAC address. 1605 */ 1606 if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1607 1608 err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1609 #ifdef FDT 1610 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) 1611 err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue); 1612 #endif 1613 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) { 1614 read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1615 sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1616 sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1617 } 1618 } 1619 1620 /* Initialise the chip for the first time */ 1621 smsc_chip_init(sc); 1622 } 1623 1624 1625 /** 1626 * smsc_attach_post_sub - Called after the driver attached to the USB interface 1627 * @ue: the USB ethernet device 1628 * 1629 * Most of this is boilerplate code and copied from the base USB ethernet 1630 * driver. It has been overriden so that we can indicate to the system that 1631 * the chip supports H/W checksumming. 1632 * 1633 * RETURNS: 1634 * Returns 0 on success or a negative error code. 1635 */ 1636 #if __FreeBSD_version > 1000000 1637 static int 1638 smsc_attach_post_sub(struct usb_ether *ue) 1639 { 1640 struct smsc_softc *sc; 1641 struct ifnet *ifp; 1642 int error; 1643 1644 sc = uether_getsc(ue); 1645 ifp = ue->ue_ifp; 1646 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1647 ifp->if_start = uether_start; 1648 ifp->if_ioctl = smsc_ioctl; 1649 ifp->if_init = uether_init; 1650 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1651 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1652 IFQ_SET_READY(&ifp->if_snd); 1653 1654 /* The chip supports TCP/UDP checksum offloading on TX and RX paths, however 1655 * currently only RX checksum is supported in the driver (see top of file). 1656 */ 1657 ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU; 1658 ifp->if_hwassist = 0; 1659 1660 /* TX checksuming is disabled (for now?) 1661 ifp->if_capabilities |= IFCAP_TXCSUM; 1662 ifp->if_capenable |= IFCAP_TXCSUM; 1663 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1664 */ 1665 1666 ifp->if_capenable = ifp->if_capabilities; 1667 1668 mtx_lock(&Giant); 1669 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1670 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1671 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1672 mtx_unlock(&Giant); 1673 1674 return (error); 1675 } 1676 #endif /* __FreeBSD_version > 1000000 */ 1677 1678 1679 /** 1680 * smsc_probe - Probe the interface. 1681 * @dev: smsc device handle 1682 * 1683 * Checks if the device is a match for this driver. 1684 * 1685 * RETURNS: 1686 * Returns 0 on success or an error code on failure. 1687 */ 1688 static int 1689 smsc_probe(device_t dev) 1690 { 1691 struct usb_attach_arg *uaa = device_get_ivars(dev); 1692 1693 if (uaa->usb_mode != USB_MODE_HOST) 1694 return (ENXIO); 1695 if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX) 1696 return (ENXIO); 1697 if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX) 1698 return (ENXIO); 1699 1700 return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa)); 1701 } 1702 1703 1704 /** 1705 * smsc_attach - Attach the interface. 1706 * @dev: smsc device handle 1707 * 1708 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 1709 * 1710 * RETURNS: 1711 * Returns 0 on success or a negative error code. 1712 */ 1713 static int 1714 smsc_attach(device_t dev) 1715 { 1716 struct usb_attach_arg *uaa = device_get_ivars(dev); 1717 struct smsc_softc *sc = device_get_softc(dev); 1718 struct usb_ether *ue = &sc->sc_ue; 1719 uint8_t iface_index; 1720 int err; 1721 1722 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 1723 1724 device_set_usb_desc(dev); 1725 1726 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1727 1728 /* Setup the endpoints for the SMSC LAN95xx device(s) */ 1729 iface_index = SMSC_IFACE_IDX; 1730 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 1731 smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx); 1732 if (err) { 1733 device_printf(dev, "error: allocating USB transfers failed\n"); 1734 goto detach; 1735 } 1736 1737 ue->ue_sc = sc; 1738 ue->ue_dev = dev; 1739 ue->ue_udev = uaa->device; 1740 ue->ue_mtx = &sc->sc_mtx; 1741 ue->ue_methods = &smsc_ue_methods; 1742 1743 err = uether_ifattach(ue); 1744 if (err) { 1745 device_printf(dev, "error: could not attach interface\n"); 1746 goto detach; 1747 } 1748 return (0); /* success */ 1749 1750 detach: 1751 smsc_detach(dev); 1752 return (ENXIO); /* failure */ 1753 } 1754 1755 /** 1756 * smsc_detach - Detach the interface. 1757 * @dev: smsc device handle 1758 * 1759 * RETURNS: 1760 * Returns 0. 1761 */ 1762 static int 1763 smsc_detach(device_t dev) 1764 { 1765 struct smsc_softc *sc = device_get_softc(dev); 1766 struct usb_ether *ue = &sc->sc_ue; 1767 1768 usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER); 1769 uether_ifdetach(ue); 1770 mtx_destroy(&sc->sc_mtx); 1771 1772 return (0); 1773 } 1774 1775 static device_method_t smsc_methods[] = { 1776 /* Device interface */ 1777 DEVMETHOD(device_probe, smsc_probe), 1778 DEVMETHOD(device_attach, smsc_attach), 1779 DEVMETHOD(device_detach, smsc_detach), 1780 1781 /* bus interface */ 1782 DEVMETHOD(bus_print_child, bus_generic_print_child), 1783 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 1784 1785 /* MII interface */ 1786 DEVMETHOD(miibus_readreg, smsc_miibus_readreg), 1787 DEVMETHOD(miibus_writereg, smsc_miibus_writereg), 1788 DEVMETHOD(miibus_statchg, smsc_miibus_statchg), 1789 1790 DEVMETHOD_END 1791 }; 1792 1793 static driver_t smsc_driver = { 1794 .name = "smsc", 1795 .methods = smsc_methods, 1796 .size = sizeof(struct smsc_softc), 1797 }; 1798 1799 static devclass_t smsc_devclass; 1800 1801 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0); 1802 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0); 1803 MODULE_DEPEND(smsc, uether, 1, 1, 1); 1804 MODULE_DEPEND(smsc, usb, 1, 1, 1); 1805 MODULE_DEPEND(smsc, ether, 1, 1, 1); 1806 MODULE_DEPEND(smsc, miibus, 1, 1, 1); 1807 MODULE_VERSION(smsc, 1); 1808 USB_PNP_HOST_INFO(smsc_devs); 1809