xref: /freebsd/sys/dev/usb/net/if_smsc.c (revision 0bd5d367989b3d2de0e8d8ceaa2e31d3f0d96536)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012
5  *	Ben Gray <bgray@freebsd.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 /*
33  * SMSC LAN9xxx devices (http://www.smsc.com/)
34  *
35  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
36  * support USB 2.0 and 10/100 Mbps Ethernet.
37  *
38  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
39  * The driver only covers the Ethernet part, the standard USB hub driver
40  * supports the hub part.
41  *
42  * This driver is closely modelled on the Linux driver written and copyrighted
43  * by SMSC.
44  *
45  *
46  *
47  *
48  * H/W TCP & UDP Checksum Offloading
49  * ---------------------------------
50  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
51  * feature can be dynamically enabled/disabled.
52  *
53  * RX checksuming is performed across bytes after the IPv4 header to the end of
54  * the Ethernet frame, this means if the frame is padded with non-zero values
55  * the H/W checksum will be incorrect, however the rx code compensates for this.
56  *
57  * TX checksuming is more complicated, the device requires a special header to
58  * be prefixed onto the start of the frame which indicates the start and end
59  * positions of the UDP or TCP frame.  This requires the driver to manually
60  * go through the packet data and decode the headers prior to sending.
61  * On Linux they generally provide cues to the location of the csum and the
62  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
63  * hence this is not as optimal and therefore h/w tX checksum is currently not
64  * implemented.
65  *
66  */
67 #include <sys/stdint.h>
68 #include <sys/stddef.h>
69 #include <sys/param.h>
70 #include <sys/queue.h>
71 #include <sys/types.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/bus.h>
75 #include <sys/module.h>
76 #include <sys/lock.h>
77 #include <sys/mutex.h>
78 #include <sys/condvar.h>
79 #include <sys/socket.h>
80 #include <sys/sysctl.h>
81 #include <sys/sx.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/priv.h>
86 #include <sys/random.h>
87 
88 #include <net/if.h>
89 #include <net/if_var.h>
90 #include <net/if_media.h>
91 
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
94 
95 #include <netinet/in.h>
96 #include <netinet/ip.h>
97 
98 #include "opt_platform.h"
99 
100 #ifdef FDT
101 #include <dev/fdt/fdt_common.h>
102 #include <dev/ofw/ofw_bus.h>
103 #include <dev/ofw/ofw_bus_subr.h>
104 #include <dev/usb/usb_fdt_support.h>
105 #endif
106 
107 #include <dev/usb/usb.h>
108 #include <dev/usb/usbdi.h>
109 #include <dev/usb/usbdi_util.h>
110 #include "usbdevs.h"
111 
112 #define	USB_DEBUG_VAR smsc_debug
113 #include <dev/usb/usb_debug.h>
114 #include <dev/usb/usb_process.h>
115 
116 #include <dev/usb/net/usb_ethernet.h>
117 
118 #include <dev/usb/net/if_smscreg.h>
119 
120 #include "miibus_if.h"
121 
122 #ifdef USB_DEBUG
123 static int smsc_debug = 0;
124 
125 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW, 0, "USB smsc");
126 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0,
127     "Debug level");
128 #endif
129 
130 /*
131  * Various supported device vendors/products.
132  */
133 static const struct usb_device_id smsc_devs[] = {
134 #define	SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
135 	SMSC_DEV(LAN89530_ETH, 0),
136 	SMSC_DEV(LAN9500_ETH, 0),
137 	SMSC_DEV(LAN9500_ETH_2, 0),
138 	SMSC_DEV(LAN9500A_ETH, 0),
139 	SMSC_DEV(LAN9500A_ETH_2, 0),
140 	SMSC_DEV(LAN9505_ETH, 0),
141 	SMSC_DEV(LAN9505A_ETH, 0),
142 	SMSC_DEV(LAN9514_ETH, 0),
143 	SMSC_DEV(LAN9514_ETH_2, 0),
144 	SMSC_DEV(LAN9530_ETH, 0),
145 	SMSC_DEV(LAN9730_ETH, 0),
146 	SMSC_DEV(LAN9500_SAL10, 0),
147 	SMSC_DEV(LAN9505_SAL10, 0),
148 	SMSC_DEV(LAN9500A_SAL10, 0),
149 	SMSC_DEV(LAN9505A_SAL10, 0),
150 	SMSC_DEV(LAN9514_SAL10, 0),
151 	SMSC_DEV(LAN9500A_HAL, 0),
152 	SMSC_DEV(LAN9505A_HAL, 0),
153 #undef SMSC_DEV
154 };
155 
156 
157 #ifdef USB_DEBUG
158 #define smsc_dbg_printf(sc, fmt, args...) \
159 	do { \
160 		if (smsc_debug > 0) \
161 			device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
162 	} while(0)
163 #else
164 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0)
165 #endif
166 
167 #define smsc_warn_printf(sc, fmt, args...) \
168 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
169 
170 #define smsc_err_printf(sc, fmt, args...) \
171 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
172 
173 
174 #define ETHER_IS_ZERO(addr) \
175 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
176 
177 #define ETHER_IS_VALID(addr) \
178 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
179 
180 static device_probe_t smsc_probe;
181 static device_attach_t smsc_attach;
182 static device_detach_t smsc_detach;
183 
184 static usb_callback_t smsc_bulk_read_callback;
185 static usb_callback_t smsc_bulk_write_callback;
186 
187 static miibus_readreg_t smsc_miibus_readreg;
188 static miibus_writereg_t smsc_miibus_writereg;
189 static miibus_statchg_t smsc_miibus_statchg;
190 
191 #if __FreeBSD_version > 1000000
192 static int smsc_attach_post_sub(struct usb_ether *ue);
193 #endif
194 static uether_fn_t smsc_attach_post;
195 static uether_fn_t smsc_init;
196 static uether_fn_t smsc_stop;
197 static uether_fn_t smsc_start;
198 static uether_fn_t smsc_tick;
199 static uether_fn_t smsc_setmulti;
200 static uether_fn_t smsc_setpromisc;
201 
202 static int	smsc_ifmedia_upd(struct ifnet *);
203 static void	smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
204 
205 static int smsc_chip_init(struct smsc_softc *sc);
206 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
207 
208 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = {
209 
210 	[SMSC_BULK_DT_WR] = {
211 		.type = UE_BULK,
212 		.endpoint = UE_ADDR_ANY,
213 		.direction = UE_DIR_OUT,
214 		.frames = 16,
215 		.bufsize = 16 * (MCLBYTES + 16),
216 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
217 		.callback = smsc_bulk_write_callback,
218 		.timeout = 10000,	/* 10 seconds */
219 	},
220 
221 	[SMSC_BULK_DT_RD] = {
222 		.type = UE_BULK,
223 		.endpoint = UE_ADDR_ANY,
224 		.direction = UE_DIR_IN,
225 		.bufsize = 20480,	/* bytes */
226 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
227 		.callback = smsc_bulk_read_callback,
228 		.timeout = 0,	/* no timeout */
229 	},
230 
231 	/* The SMSC chip supports an interrupt endpoints, however they aren't
232 	 * needed as we poll on the MII status.
233 	 */
234 };
235 
236 static const struct usb_ether_methods smsc_ue_methods = {
237 	.ue_attach_post = smsc_attach_post,
238 #if __FreeBSD_version > 1000000
239 	.ue_attach_post_sub = smsc_attach_post_sub,
240 #endif
241 	.ue_start = smsc_start,
242 	.ue_ioctl = smsc_ioctl,
243 	.ue_init = smsc_init,
244 	.ue_stop = smsc_stop,
245 	.ue_tick = smsc_tick,
246 	.ue_setmulti = smsc_setmulti,
247 	.ue_setpromisc = smsc_setpromisc,
248 	.ue_mii_upd = smsc_ifmedia_upd,
249 	.ue_mii_sts = smsc_ifmedia_sts,
250 };
251 
252 /**
253  *	smsc_read_reg - Reads a 32-bit register on the device
254  *	@sc: driver soft context
255  *	@off: offset of the register
256  *	@data: pointer a value that will be populated with the register value
257  *
258  *	LOCKING:
259  *	The device lock must be held before calling this function.
260  *
261  *	RETURNS:
262  *	0 on success, a USB_ERR_?? error code on failure.
263  */
264 static int
265 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
266 {
267 	struct usb_device_request req;
268 	uint32_t buf;
269 	usb_error_t err;
270 
271 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
272 
273 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
274 	req.bRequest = SMSC_UR_READ_REG;
275 	USETW(req.wValue, 0);
276 	USETW(req.wIndex, off);
277 	USETW(req.wLength, 4);
278 
279 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
280 	if (err != 0)
281 		smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
282 
283 	*data = le32toh(buf);
284 
285 	return (err);
286 }
287 
288 /**
289  *	smsc_write_reg - Writes a 32-bit register on the device
290  *	@sc: driver soft context
291  *	@off: offset of the register
292  *	@data: the 32-bit value to write into the register
293  *
294  *	LOCKING:
295  *	The device lock must be held before calling this function.
296  *
297  *	RETURNS:
298  *	0 on success, a USB_ERR_?? error code on failure.
299  */
300 static int
301 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
302 {
303 	struct usb_device_request req;
304 	uint32_t buf;
305 	usb_error_t err;
306 
307 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
308 
309 	buf = htole32(data);
310 
311 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
312 	req.bRequest = SMSC_UR_WRITE_REG;
313 	USETW(req.wValue, 0);
314 	USETW(req.wIndex, off);
315 	USETW(req.wLength, 4);
316 
317 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
318 	if (err != 0)
319 		smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
320 
321 	return (err);
322 }
323 
324 /**
325  *	smsc_wait_for_bits - Polls on a register value until bits are cleared
326  *	@sc: soft context
327  *	@reg: offset of the register
328  *	@bits: if the bits are clear the function returns
329  *
330  *	LOCKING:
331  *	The device lock must be held before calling this function.
332  *
333  *	RETURNS:
334  *	0 on success, or a USB_ERR_?? error code on failure.
335  */
336 static int
337 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
338 {
339 	usb_ticks_t start_ticks;
340 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
341 	uint32_t val;
342 	int err;
343 
344 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
345 
346 	start_ticks = (usb_ticks_t)ticks;
347 	do {
348 		if ((err = smsc_read_reg(sc, reg, &val)) != 0)
349 			return (err);
350 		if (!(val & bits))
351 			return (0);
352 
353 		uether_pause(&sc->sc_ue, hz / 100);
354 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
355 
356 	return (USB_ERR_TIMEOUT);
357 }
358 
359 /**
360  *	smsc_eeprom_read - Reads the attached EEPROM
361  *	@sc: soft context
362  *	@off: the eeprom address offset
363  *	@buf: stores the bytes
364  *	@buflen: the number of bytes to read
365  *
366  *	Simply reads bytes from an attached eeprom.
367  *
368  *	LOCKING:
369  *	The function takes and releases the device lock if it is not already held.
370  *
371  *	RETURNS:
372  *	0 on success, or a USB_ERR_?? error code on failure.
373  */
374 static int
375 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen)
376 {
377 	usb_ticks_t start_ticks;
378 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
379 	int err;
380 	int locked;
381 	uint32_t val;
382 	uint16_t i;
383 
384 	locked = mtx_owned(&sc->sc_mtx);
385 	if (!locked)
386 		SMSC_LOCK(sc);
387 
388 	err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY);
389 	if (err != 0) {
390 		smsc_warn_printf(sc, "eeprom busy, failed to read data\n");
391 		goto done;
392 	}
393 
394 	/* start reading the bytes, one at a time */
395 	for (i = 0; i < buflen; i++) {
396 
397 		val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i));
398 		if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0)
399 			goto done;
400 
401 		start_ticks = (usb_ticks_t)ticks;
402 		do {
403 			if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0)
404 				goto done;
405 			if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT))
406 				break;
407 
408 			uether_pause(&sc->sc_ue, hz / 100);
409 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
410 
411 		if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) {
412 			smsc_warn_printf(sc, "eeprom command failed\n");
413 			err = USB_ERR_IOERROR;
414 			break;
415 		}
416 
417 		if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0)
418 			goto done;
419 
420 		buf[i] = (val & 0xff);
421 	}
422 
423 done:
424 	if (!locked)
425 		SMSC_UNLOCK(sc);
426 
427 	return (err);
428 }
429 
430 /**
431  *	smsc_miibus_readreg - Reads a MII/MDIO register
432  *	@dev: usb ether device
433  *	@phy: the number of phy reading from
434  *	@reg: the register address
435  *
436  *	Attempts to read a phy register over the MII bus.
437  *
438  *	LOCKING:
439  *	Takes and releases the device mutex lock if not already held.
440  *
441  *	RETURNS:
442  *	Returns the 16-bits read from the MII register, if this function fails 0
443  *	is returned.
444  */
445 static int
446 smsc_miibus_readreg(device_t dev, int phy, int reg)
447 {
448 	struct smsc_softc *sc = device_get_softc(dev);
449 	int locked;
450 	uint32_t addr;
451 	uint32_t val = 0;
452 
453 	locked = mtx_owned(&sc->sc_mtx);
454 	if (!locked)
455 		SMSC_LOCK(sc);
456 
457 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
458 		smsc_warn_printf(sc, "MII is busy\n");
459 		goto done;
460 	}
461 
462 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY;
463 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
464 
465 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
466 		smsc_warn_printf(sc, "MII read timeout\n");
467 
468 	smsc_read_reg(sc, SMSC_MII_DATA, &val);
469 	val = le32toh(val);
470 
471 done:
472 	if (!locked)
473 		SMSC_UNLOCK(sc);
474 
475 	return (val & 0xFFFF);
476 }
477 
478 /**
479  *	smsc_miibus_writereg - Writes a MII/MDIO register
480  *	@dev: usb ether device
481  *	@phy: the number of phy writing to
482  *	@reg: the register address
483  *	@val: the value to write
484  *
485  *	Attempts to write a phy register over the MII bus.
486  *
487  *	LOCKING:
488  *	Takes and releases the device mutex lock if not already held.
489  *
490  *	RETURNS:
491  *	Always returns 0 regardless of success or failure.
492  */
493 static int
494 smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
495 {
496 	struct smsc_softc *sc = device_get_softc(dev);
497 	int locked;
498 	uint32_t addr;
499 
500 	if (sc->sc_phyno != phy)
501 		return (0);
502 
503 	locked = mtx_owned(&sc->sc_mtx);
504 	if (!locked)
505 		SMSC_LOCK(sc);
506 
507 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
508 		smsc_warn_printf(sc, "MII is busy\n");
509 		goto done;
510 	}
511 
512 	val = htole32(val);
513 	smsc_write_reg(sc, SMSC_MII_DATA, val);
514 
515 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY;
516 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
517 
518 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
519 		smsc_warn_printf(sc, "MII write timeout\n");
520 
521 done:
522 	if (!locked)
523 		SMSC_UNLOCK(sc);
524 	return (0);
525 }
526 
527 
528 
529 /**
530  *	smsc_miibus_statchg - Called to detect phy status change
531  *	@dev: usb ether device
532  *
533  *	This function is called periodically by the system to poll for status
534  *	changes of the link.
535  *
536  *	LOCKING:
537  *	Takes and releases the device mutex lock if not already held.
538  */
539 static void
540 smsc_miibus_statchg(device_t dev)
541 {
542 	struct smsc_softc *sc = device_get_softc(dev);
543 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
544 	struct ifnet *ifp;
545 	int locked;
546 	int err;
547 	uint32_t flow;
548 	uint32_t afc_cfg;
549 
550 	locked = mtx_owned(&sc->sc_mtx);
551 	if (!locked)
552 		SMSC_LOCK(sc);
553 
554 	ifp = uether_getifp(&sc->sc_ue);
555 	if (mii == NULL || ifp == NULL ||
556 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
557 		goto done;
558 
559 	/* Use the MII status to determine link status */
560 	sc->sc_flags &= ~SMSC_FLAG_LINK;
561 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
562 	    (IFM_ACTIVE | IFM_AVALID)) {
563 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
564 			case IFM_10_T:
565 			case IFM_100_TX:
566 				sc->sc_flags |= SMSC_FLAG_LINK;
567 				break;
568 			case IFM_1000_T:
569 				/* Gigabit ethernet not supported by chipset */
570 				break;
571 			default:
572 				break;
573 		}
574 	}
575 
576 	/* Lost link, do nothing. */
577 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
578 		smsc_dbg_printf(sc, "link flag not set\n");
579 		goto done;
580 	}
581 
582 	err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
583 	if (err) {
584 		smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err);
585 		goto done;
586 	}
587 
588 	/* Enable/disable full duplex operation and TX/RX pause */
589 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
590 		smsc_dbg_printf(sc, "full duplex operation\n");
591 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
592 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
593 
594 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
595 			flow = 0xffff0002;
596 		else
597 			flow = 0;
598 
599 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
600 			afc_cfg |= 0xf;
601 		else
602 			afc_cfg &= ~0xf;
603 
604 	} else {
605 		smsc_dbg_printf(sc, "half duplex operation\n");
606 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
607 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
608 
609 		flow = 0;
610 		afc_cfg |= 0xf;
611 	}
612 
613 	err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
614 	err += smsc_write_reg(sc, SMSC_FLOW, flow);
615 	err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
616 	if (err)
617 		smsc_warn_printf(sc, "media change failed, error %d\n", err);
618 
619 done:
620 	if (!locked)
621 		SMSC_UNLOCK(sc);
622 }
623 
624 /**
625  *	smsc_ifmedia_upd - Set media options
626  *	@ifp: interface pointer
627  *
628  *	Basically boilerplate code that simply calls the mii functions to set the
629  *	media options.
630  *
631  *	LOCKING:
632  *	The device lock must be held before this function is called.
633  *
634  *	RETURNS:
635  *	Returns 0 on success or a negative error code.
636  */
637 static int
638 smsc_ifmedia_upd(struct ifnet *ifp)
639 {
640 	struct smsc_softc *sc = ifp->if_softc;
641 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
642 	struct mii_softc *miisc;
643 	int err;
644 
645 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
646 
647 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
648 		PHY_RESET(miisc);
649 	err = mii_mediachg(mii);
650 	return (err);
651 }
652 
653 /**
654  *	smsc_ifmedia_sts - Report current media status
655  *	@ifp: inet interface pointer
656  *	@ifmr: interface media request
657  *
658  *	Basically boilerplate code that simply calls the mii functions to get the
659  *	media status.
660  *
661  *	LOCKING:
662  *	Internally takes and releases the device lock.
663  */
664 static void
665 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
666 {
667 	struct smsc_softc *sc = ifp->if_softc;
668 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
669 
670 	SMSC_LOCK(sc);
671 	mii_pollstat(mii);
672 	ifmr->ifm_active = mii->mii_media_active;
673 	ifmr->ifm_status = mii->mii_media_status;
674 	SMSC_UNLOCK(sc);
675 }
676 
677 /**
678  *	smsc_hash - Calculate the hash of a mac address
679  *	@addr: The mac address to calculate the hash on
680  *
681  *	This function is used when configuring a range of m'cast mac addresses to
682  *	filter on.  The hash of the mac address is put in the device's mac hash
683  *	table.
684  *
685  *	RETURNS:
686  *	Returns a value from 0-63 value which is the hash of the mac address.
687  */
688 static inline uint32_t
689 smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
690 {
691 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
692 }
693 
694 /**
695  *	smsc_setmulti - Setup multicast
696  *	@ue: usb ethernet device context
697  *
698  *	Tells the device to either accept frames with a multicast mac address, a
699  *	select group of m'cast mac addresses or just the devices mac address.
700  *
701  *	LOCKING:
702  *	Should be called with the SMSC lock held.
703  */
704 static void
705 smsc_setmulti(struct usb_ether *ue)
706 {
707 	struct smsc_softc *sc = uether_getsc(ue);
708 	struct ifnet *ifp = uether_getifp(ue);
709 	struct ifmultiaddr *ifma;
710 	uint32_t hashtbl[2] = { 0, 0 };
711 	uint32_t hash;
712 
713 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
714 
715 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
716 		smsc_dbg_printf(sc, "receive all multicast enabled\n");
717 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
718 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
719 
720 	} else {
721 		/* Take the lock of the mac address list before hashing each of them */
722 		if_maddr_rlock(ifp);
723 
724 		if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) {
725 			/* We are filtering on a set of address so calculate hashes of each
726 			 * of the address and set the corresponding bits in the register.
727 			 */
728 			sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
729 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
730 
731 			CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
732 				if (ifma->ifma_addr->sa_family != AF_LINK)
733 					continue;
734 
735 				hash = smsc_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
736 				hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
737 			}
738 		} else {
739 			/* Only receive packets with destination set to our mac address */
740 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT);
741 		}
742 
743 		if_maddr_runlock(ifp);
744 
745 		/* Debug */
746 		if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT)
747 			smsc_dbg_printf(sc, "receive select group of macs\n");
748 		else
749 			smsc_dbg_printf(sc, "receive own packets only\n");
750 	}
751 
752 	/* Write the hash table and mac control registers */
753 	smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
754 	smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
755 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
756 }
757 
758 
759 /**
760  *	smsc_setpromisc - Enables/disables promiscuous mode
761  *	@ue: usb ethernet device context
762  *
763  *	LOCKING:
764  *	Should be called with the SMSC lock held.
765  */
766 static void
767 smsc_setpromisc(struct usb_ether *ue)
768 {
769 	struct smsc_softc *sc = uether_getsc(ue);
770 	struct ifnet *ifp = uether_getifp(ue);
771 
772 	smsc_dbg_printf(sc, "promiscuous mode %sabled\n",
773 	                (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
774 
775 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
776 
777 	if (ifp->if_flags & IFF_PROMISC)
778 		sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
779 	else
780 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
781 
782 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
783 }
784 
785 
786 /**
787  *	smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming
788  *	@sc: driver soft context
789  *
790  *	LOCKING:
791  *	Should be called with the SMSC lock held.
792  *
793  *	RETURNS:
794  *	Returns 0 on success or a negative error code.
795  */
796 static int smsc_sethwcsum(struct smsc_softc *sc)
797 {
798 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
799 	uint32_t val;
800 	int err;
801 
802 	if (!ifp)
803 		return (-EIO);
804 
805 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
806 
807 	err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
808 	if (err != 0) {
809 		smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err);
810 		return (err);
811 	}
812 
813 	/* Enable/disable the Rx checksum */
814 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM)
815 		val |= SMSC_COE_CTRL_RX_EN;
816 	else
817 		val &= ~SMSC_COE_CTRL_RX_EN;
818 
819 	/* Enable/disable the Tx checksum (currently not supported) */
820 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM)
821 		val |= SMSC_COE_CTRL_TX_EN;
822 	else
823 		val &= ~SMSC_COE_CTRL_TX_EN;
824 
825 	err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
826 	if (err != 0) {
827 		smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err);
828 		return (err);
829 	}
830 
831 	return (0);
832 }
833 
834 /**
835  *	smsc_setmacaddress - Sets the mac address in the device
836  *	@sc: driver soft context
837  *	@addr: pointer to array contain at least 6 bytes of the mac
838  *
839  *	Writes the MAC address into the device, usually the MAC is programmed with
840  *	values from the EEPROM.
841  *
842  *	LOCKING:
843  *	Should be called with the SMSC lock held.
844  *
845  *	RETURNS:
846  *	Returns 0 on success or a negative error code.
847  */
848 static int
849 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
850 {
851 	int err;
852 	uint32_t val;
853 
854 	smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
855 	                addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
856 
857 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
858 
859 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
860 	if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
861 		goto done;
862 
863 	val = (addr[5] << 8) | addr[4];
864 	err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
865 
866 done:
867 	return (err);
868 }
869 
870 /**
871  *	smsc_reset - Reset the SMSC chip
872  *	@sc: device soft context
873  *
874  *	LOCKING:
875  *	Should be called with the SMSC lock held.
876  */
877 static void
878 smsc_reset(struct smsc_softc *sc)
879 {
880 	struct usb_config_descriptor *cd;
881 	usb_error_t err;
882 
883 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
884 
885 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
886 	                          cd->bConfigurationValue);
887 	if (err)
888 		smsc_warn_printf(sc, "reset failed (ignored)\n");
889 
890 	/* Wait a little while for the chip to get its brains in order. */
891 	uether_pause(&sc->sc_ue, hz / 100);
892 
893 	/* Reinitialize controller to achieve full reset. */
894 	smsc_chip_init(sc);
895 }
896 
897 
898 /**
899  *	smsc_init - Initialises the LAN95xx chip
900  *	@ue: USB ether interface
901  *
902  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
903  *	initialise the interface and the rx/tx pipes.
904  *
905  *	LOCKING:
906  *	Should be called with the SMSC lock held.
907  */
908 static void
909 smsc_init(struct usb_ether *ue)
910 {
911 	struct smsc_softc *sc = uether_getsc(ue);
912 	struct ifnet *ifp = uether_getifp(ue);
913 
914 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
915 
916 	if (smsc_setmacaddress(sc, IF_LLADDR(ifp)))
917 		smsc_dbg_printf(sc, "setting MAC address failed\n");
918 
919 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
920 		return;
921 
922 	/* Cancel pending I/O */
923 	smsc_stop(ue);
924 
925 #if __FreeBSD_version <= 1000000
926 	/* On earlier versions this was the first place we could tell the system
927 	 * that we supported h/w csuming, however this is only called after the
928 	 * the interface has been brought up - not ideal.
929 	 */
930 	if (!(ifp->if_capabilities & IFCAP_RXCSUM)) {
931 		ifp->if_capabilities |= IFCAP_RXCSUM;
932 		ifp->if_capenable |= IFCAP_RXCSUM;
933 		ifp->if_hwassist = 0;
934 	}
935 
936 	/* TX checksuming is disabled for now
937 	ifp->if_capabilities |= IFCAP_TXCSUM;
938 	ifp->if_capenable |= IFCAP_TXCSUM;
939 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
940 	*/
941 #endif
942 
943 	/* Reset the ethernet interface. */
944 	smsc_reset(sc);
945 
946 	/* Load the multicast filter. */
947 	smsc_setmulti(ue);
948 
949 	/* TCP/UDP checksum offload engines. */
950 	smsc_sethwcsum(sc);
951 
952 	usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]);
953 
954 	/* Indicate we are up and running. */
955 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
956 
957 	/* Switch to selected media. */
958 	smsc_ifmedia_upd(ifp);
959 	smsc_start(ue);
960 }
961 
962 /**
963  *	smsc_bulk_read_callback - Read callback used to process the USB URB
964  *	@xfer: the USB transfer
965  *	@error:
966  *
967  *	Reads the URB data which can contain one or more ethernet frames, the
968  *	frames are copyed into a mbuf and given to the system.
969  *
970  *	LOCKING:
971  *	No locking required, doesn't access internal driver settings.
972  */
973 static void
974 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
975 {
976 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
977 	struct usb_ether *ue = &sc->sc_ue;
978 	struct ifnet *ifp = uether_getifp(ue);
979 	struct mbuf *m;
980 	struct usb_page_cache *pc;
981 	uint32_t rxhdr;
982 	uint16_t pktlen;
983 	int off;
984 	int actlen;
985 
986 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
987 	smsc_dbg_printf(sc, "rx : actlen %d\n", actlen);
988 
989 	switch (USB_GET_STATE(xfer)) {
990 	case USB_ST_TRANSFERRED:
991 
992 		/* There is always a zero length frame after bringing the IF up */
993 		if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN))
994 			goto tr_setup;
995 
996 		/* There maybe multiple packets in the USB frame, each will have a
997 		 * header and each needs to have it's own mbuf allocated and populated
998 		 * for it.
999 		 */
1000 		pc = usbd_xfer_get_frame(xfer, 0);
1001 		off = 0;
1002 
1003 		while (off < actlen) {
1004 
1005 			/* The frame header is always aligned on a 4 byte boundary */
1006 			off = ((off + 0x3) & ~0x3);
1007 
1008 			usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr));
1009 			off += (sizeof(rxhdr) + ETHER_ALIGN);
1010 			rxhdr = le32toh(rxhdr);
1011 
1012 			pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
1013 
1014 			smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : "
1015 			                "off %d\n", rxhdr, pktlen, actlen, off);
1016 
1017 
1018 			if (rxhdr & SMSC_RX_STAT_ERROR) {
1019 				smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
1020 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1021 				if (rxhdr & SMSC_RX_STAT_COLLISION)
1022 					if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
1023 			} else {
1024 
1025 				/* Check if the ethernet frame is too big or too small */
1026 				if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off)))
1027 					goto tr_setup;
1028 
1029 				/* Create a new mbuf to store the packet in */
1030 				m = uether_newbuf();
1031 				if (m == NULL) {
1032 					smsc_warn_printf(sc, "failed to create new mbuf\n");
1033 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1034 					goto tr_setup;
1035 				}
1036 
1037 				usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen);
1038 
1039 				/* Check if RX TCP/UDP checksumming is being offloaded */
1040 				if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
1041 
1042 					struct ether_header *eh;
1043 
1044 					eh = mtod(m, struct ether_header *);
1045 
1046 					/* Remove the extra 2 bytes of the csum */
1047 					pktlen -= 2;
1048 
1049 					/* The checksum appears to be simplistically calculated
1050 					 * over the udp/tcp header and data up to the end of the
1051 					 * eth frame.  Which means if the eth frame is padded
1052 					 * the csum calculation is incorrectly performed over
1053 					 * the padding bytes as well. Therefore to be safe we
1054 					 * ignore the H/W csum on frames less than or equal to
1055 					 * 64 bytes.
1056 					 *
1057 					 * Ignore H/W csum for non-IPv4 packets.
1058 					 */
1059 					if ((be16toh(eh->ether_type) == ETHERTYPE_IP) &&
1060 					    (pktlen > ETHER_MIN_LEN)) {
1061 						struct ip *ip;
1062 
1063 						ip = (struct ip *)(eh + 1);
1064 						if ((ip->ip_v == IPVERSION) &&
1065 						    ((ip->ip_p == IPPROTO_TCP) ||
1066 						     (ip->ip_p == IPPROTO_UDP))) {
1067 							/* Indicate the UDP/TCP csum has been calculated */
1068 							m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1069 
1070 							/* Copy the TCP/UDP checksum from the last 2 bytes
1071 							 * of the transfer and put in the csum_data field.
1072 							 */
1073 							usbd_copy_out(pc, (off + pktlen),
1074 							              &m->m_pkthdr.csum_data, 2);
1075 
1076 							/* The data is copied in network order, but the
1077 							 * csum algorithm in the kernel expects it to be
1078 							 * in host network order.
1079 							 */
1080 							m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data);
1081 
1082 							smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n",
1083 							                m->m_pkthdr.csum_data);
1084 						}
1085 					}
1086 
1087 					/* Need to adjust the offset as well or we'll be off
1088 					 * by 2 because the csum is removed from the packet
1089 					 * length.
1090 					 */
1091 					off += 2;
1092 				}
1093 
1094 				/* Finally enqueue the mbuf on the receive queue */
1095 				/* Remove 4 trailing bytes */
1096 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1097 					m_freem(m);
1098 					goto tr_setup;
1099 				}
1100 				uether_rxmbuf(ue, m, pktlen - 4);
1101 			}
1102 
1103 			/* Update the offset to move to the next potential packet */
1104 			off += pktlen;
1105 		}
1106 
1107 		/* FALLTHROUGH */
1108 
1109 	case USB_ST_SETUP:
1110 tr_setup:
1111 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1112 		usbd_transfer_submit(xfer);
1113 		uether_rxflush(ue);
1114 		return;
1115 
1116 	default:
1117 		if (error != USB_ERR_CANCELLED) {
1118 			smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error));
1119 			usbd_xfer_set_stall(xfer);
1120 			goto tr_setup;
1121 		}
1122 		return;
1123 	}
1124 }
1125 
1126 /**
1127  *	smsc_bulk_write_callback - Write callback used to send ethernet frame(s)
1128  *	@xfer: the USB transfer
1129  *	@error: error code if the transfers is in an errored state
1130  *
1131  *	The main write function that pulls ethernet frames off the queue and sends
1132  *	them out.
1133  *
1134  *	LOCKING:
1135  *
1136  */
1137 static void
1138 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1139 {
1140 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
1141 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1142 	struct usb_page_cache *pc;
1143 	struct mbuf *m;
1144 	uint32_t txhdr;
1145 	uint32_t frm_len = 0;
1146 	int nframes;
1147 
1148 	switch (USB_GET_STATE(xfer)) {
1149 	case USB_ST_TRANSFERRED:
1150 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1151 		/* FALLTHROUGH */
1152 
1153 	case USB_ST_SETUP:
1154 tr_setup:
1155 		if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 ||
1156 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1157 			/* Don't send anything if there is no link or controller is busy. */
1158 			return;
1159 		}
1160 
1161 		for (nframes = 0; nframes < 16 &&
1162 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1163 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1164 			if (m == NULL)
1165 				break;
1166 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1167 			    nframes);
1168 			frm_len = 0;
1169 			pc = usbd_xfer_get_frame(xfer, nframes);
1170 
1171 			/* Each frame is prefixed with two 32-bit values describing the
1172 			 * length of the packet and buffer.
1173 			 */
1174 			txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1175 					SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1176 			txhdr = htole32(txhdr);
1177 			usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
1178 
1179 			txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1180 			txhdr = htole32(txhdr);
1181 			usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
1182 
1183 			frm_len += 8;
1184 
1185 			/* Next copy in the actual packet */
1186 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1187 			frm_len += m->m_pkthdr.len;
1188 
1189 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1190 
1191 			/* If there's a BPF listener, bounce a copy of this frame to him */
1192 			BPF_MTAP(ifp, m);
1193 
1194 			m_freem(m);
1195 
1196 			/* Set frame length. */
1197 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1198 		}
1199 		if (nframes != 0) {
1200 			usbd_xfer_set_frames(xfer, nframes);
1201 			usbd_transfer_submit(xfer);
1202 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1203 		}
1204 		return;
1205 
1206 	default:
1207 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1208 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1209 
1210 		if (error != USB_ERR_CANCELLED) {
1211 			smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error));
1212 			usbd_xfer_set_stall(xfer);
1213 			goto tr_setup;
1214 		}
1215 		return;
1216 	}
1217 }
1218 
1219 /**
1220  *	smsc_tick - Called periodically to monitor the state of the LAN95xx chip
1221  *	@ue: USB ether interface
1222  *
1223  *	Simply calls the mii status functions to check the state of the link.
1224  *
1225  *	LOCKING:
1226  *	Should be called with the SMSC lock held.
1227  */
1228 static void
1229 smsc_tick(struct usb_ether *ue)
1230 {
1231 	struct smsc_softc *sc = uether_getsc(ue);
1232 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
1233 
1234 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1235 
1236 	mii_tick(mii);
1237 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
1238 		smsc_miibus_statchg(ue->ue_dev);
1239 		if ((sc->sc_flags & SMSC_FLAG_LINK) != 0)
1240 			smsc_start(ue);
1241 	}
1242 }
1243 
1244 /**
1245  *	smsc_start - Starts communication with the LAN95xx chip
1246  *	@ue: USB ether interface
1247  *
1248  *
1249  *
1250  */
1251 static void
1252 smsc_start(struct usb_ether *ue)
1253 {
1254 	struct smsc_softc *sc = uether_getsc(ue);
1255 
1256 	/*
1257 	 * start the USB transfers, if not already started:
1258 	 */
1259 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]);
1260 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]);
1261 }
1262 
1263 /**
1264  *	smsc_stop - Stops communication with the LAN95xx chip
1265  *	@ue: USB ether interface
1266  *
1267  *
1268  *
1269  */
1270 static void
1271 smsc_stop(struct usb_ether *ue)
1272 {
1273 	struct smsc_softc *sc = uether_getsc(ue);
1274 	struct ifnet *ifp = uether_getifp(ue);
1275 
1276 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1277 
1278 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1279 	sc->sc_flags &= ~SMSC_FLAG_LINK;
1280 
1281 	/*
1282 	 * stop all the transfers, if not already stopped:
1283 	 */
1284 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]);
1285 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]);
1286 }
1287 
1288 /**
1289  *	smsc_phy_init - Initialises the in-built SMSC phy
1290  *	@sc: driver soft context
1291  *
1292  *	Resets the PHY part of the chip and then initialises it to default
1293  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
1294  *	from the PHY are also enabled, however we don't monitor the interrupt
1295  *	endpoints for the moment.
1296  *
1297  *	RETURNS:
1298  *	Returns 0 on success or EIO if failed to reset the PHY.
1299  */
1300 static int
1301 smsc_phy_init(struct smsc_softc *sc)
1302 {
1303 	int bmcr;
1304 	usb_ticks_t start_ticks;
1305 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
1306 
1307 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1308 
1309 	/* Reset phy and wait for reset to complete */
1310 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);
1311 
1312 	start_ticks = ticks;
1313 	do {
1314 		uether_pause(&sc->sc_ue, hz / 100);
1315 		bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1316 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
1317 
1318 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
1319 		smsc_err_printf(sc, "PHY reset timed-out");
1320 		return (EIO);
1321 	}
1322 
1323 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
1324 	                     ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |  /* all modes */
1325 	                     ANAR_CSMA |
1326 	                     ANAR_FC |
1327 	                     ANAR_PAUSE_ASYM);
1328 
1329 	/* Setup the phy to interrupt when the link goes down or autoneg completes */
1330 	smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT);
1331 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK,
1332 	                     (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN));
1333 
1334 	/* Restart auto-negotation */
1335 	bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1336 	bmcr |= BMCR_STARTNEG;
1337 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
1338 
1339 	return (0);
1340 }
1341 
1342 
1343 /**
1344  *	smsc_chip_init - Initialises the chip after power on
1345  *	@sc: driver soft context
1346  *
1347  *	This initialisation sequence is modelled on the procedure in the Linux
1348  *	driver.
1349  *
1350  *	RETURNS:
1351  *	Returns 0 on success or an error code on failure.
1352  */
1353 static int
1354 smsc_chip_init(struct smsc_softc *sc)
1355 {
1356 	int err;
1357 	int locked;
1358 	uint32_t reg_val;
1359 	int burst_cap;
1360 
1361 	locked = mtx_owned(&sc->sc_mtx);
1362 	if (!locked)
1363 		SMSC_LOCK(sc);
1364 
1365 	/* Enter H/W config mode */
1366 	smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
1367 
1368 	if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) {
1369 		smsc_warn_printf(sc, "timed-out waiting for reset to complete\n");
1370 		goto init_failed;
1371 	}
1372 
1373 	/* Reset the PHY */
1374 	smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
1375 
1376 	if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) {
1377 		smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n");
1378 		goto init_failed;
1379 	}
1380 
1381 	/* Set the mac address */
1382 	if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
1383 		smsc_warn_printf(sc, "failed to set the MAC address\n");
1384 		goto init_failed;
1385 	}
1386 
1387 	/* Don't know what the HW_CFG_BIR bit is, but following the reset sequence
1388 	 * as used in the Linux driver.
1389 	 */
1390 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) != 0) {
1391 		smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
1392 		goto init_failed;
1393 	}
1394 	reg_val |= SMSC_HW_CFG_BIR;
1395 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1396 
1397 	/* There is a so called 'turbo mode' that the linux driver supports, it
1398 	 * seems to allow you to jam multiple frames per Rx transaction.  By default
1399 	 * this driver supports that and therefore allows multiple frames per URB.
1400 	 *
1401 	 * The xfer buffer size needs to reflect this as well, therefore based on
1402 	 * the calculations in the Linux driver the RX bufsize is set to 18944,
1403 	 *     bufsz = (16 * 1024 + 5 * 512)
1404 	 *
1405 	 * Burst capability is the number of URBs that can be in a burst of data/
1406 	 * ethernet frames.
1407 	 */
1408 	if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH)
1409 		burst_cap = 37;
1410 	else
1411 		burst_cap = 128;
1412 
1413 	smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
1414 
1415 	/* Set the default bulk in delay (magic value from Linux driver) */
1416 	smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
1417 
1418 
1419 
1420 	/*
1421 	 * Initialise the RX interface
1422 	 */
1423 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) < 0) {
1424 		smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err);
1425 		goto init_failed;
1426 	}
1427 
1428 	/* Adjust the packet offset in the buffer (designed to try and align IP
1429 	 * header on 4 byte boundary)
1430 	 */
1431 	reg_val &= ~SMSC_HW_CFG_RXDOFF;
1432 	reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF;
1433 
1434 	/* The following setings are used for 'turbo mode', a.k.a multiple frames
1435 	 * per Rx transaction (again info taken form Linux driver).
1436 	 */
1437 	reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
1438 
1439 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1440 
1441 	/* Clear the status register ? */
1442 	smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
1443 
1444 	/* Read and display the revision register */
1445 	if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
1446 		smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
1447 		goto init_failed;
1448 	}
1449 
1450 	device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n",
1451 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16,
1452 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK));
1453 
1454 	/* GPIO/LED setup */
1455 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
1456 	          SMSC_LED_GPIO_CFG_FDX_LED;
1457 	smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
1458 
1459 	/*
1460 	 * Initialise the TX interface
1461 	 */
1462 	smsc_write_reg(sc, SMSC_FLOW, 0);
1463 
1464 	smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
1465 
1466 	/* Read the current MAC configuration */
1467 	if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
1468 		smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
1469 		goto init_failed;
1470 	}
1471 
1472 	/* Vlan */
1473 	smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
1474 
1475 	/*
1476 	 * Initialise the PHY
1477 	 */
1478 	if ((err = smsc_phy_init(sc)) != 0)
1479 		goto init_failed;
1480 
1481 
1482 	/*
1483 	 * Start TX
1484 	 */
1485 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
1486 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1487 	smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
1488 
1489 	/*
1490 	 * Start RX
1491 	 */
1492 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
1493 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1494 
1495 	if (!locked)
1496 		SMSC_UNLOCK(sc);
1497 
1498 	return (0);
1499 
1500 init_failed:
1501 	if (!locked)
1502 		SMSC_UNLOCK(sc);
1503 
1504 	smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
1505 	return (err);
1506 }
1507 
1508 
1509 /**
1510  *	smsc_ioctl - ioctl function for the device
1511  *	@ifp: interface pointer
1512  *	@cmd: the ioctl command
1513  *	@data: data passed in the ioctl call, typically a pointer to struct ifreq.
1514  *
1515  *	The ioctl routine is overridden to detect change requests for the H/W
1516  *	checksum capabilities.
1517  *
1518  *	RETURNS:
1519  *	0 on success and an error code on failure.
1520  */
1521 static int
1522 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1523 {
1524 	struct usb_ether *ue = ifp->if_softc;
1525 	struct smsc_softc *sc;
1526 	struct ifreq *ifr;
1527 	int rc;
1528 	int mask;
1529 	int reinit;
1530 
1531 	if (cmd == SIOCSIFCAP) {
1532 
1533 		sc = uether_getsc(ue);
1534 		ifr = (struct ifreq *)data;
1535 
1536 		SMSC_LOCK(sc);
1537 
1538 		rc = 0;
1539 		reinit = 0;
1540 
1541 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1542 
1543 		/* Modify the RX CSUM enable bits */
1544 		if ((mask & IFCAP_RXCSUM) != 0 &&
1545 		    (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1546 			ifp->if_capenable ^= IFCAP_RXCSUM;
1547 
1548 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1549 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1550 				reinit = 1;
1551 			}
1552 		}
1553 
1554 		SMSC_UNLOCK(sc);
1555 		if (reinit)
1556 #if __FreeBSD_version > 1000000
1557 			uether_init(ue);
1558 #else
1559 			ifp->if_init(ue);
1560 #endif
1561 
1562 	} else {
1563 		rc = uether_ioctl(ifp, cmd, data);
1564 	}
1565 
1566 	return (rc);
1567 }
1568 
1569 /**
1570  *	smsc_attach_post - Called after the driver attached to the USB interface
1571  *	@ue: the USB ethernet device
1572  *
1573  *	This is where the chip is intialised for the first time.  This is different
1574  *	from the smsc_init() function in that that one is designed to setup the
1575  *	H/W to match the UE settings and can be called after a reset.
1576  *
1577  *
1578  */
1579 static void
1580 smsc_attach_post(struct usb_ether *ue)
1581 {
1582 	struct smsc_softc *sc = uether_getsc(ue);
1583 	uint32_t mac_h, mac_l;
1584 	int err;
1585 
1586 	smsc_dbg_printf(sc, "smsc_attach_post\n");
1587 
1588 	/* Setup some of the basics */
1589 	sc->sc_phyno = 1;
1590 
1591 
1592 	/* Attempt to get the mac address, if an EEPROM is not attached this
1593 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1594 	 * address based on urandom.
1595 	 */
1596 	memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN);
1597 
1598 	/* Check if there is already a MAC address in the register */
1599 	if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1600 	    (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1601 		sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1602 		sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1603 		sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1604 		sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1605 		sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1606 		sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1607 	}
1608 
1609 	/* MAC address is not set so try to read from EEPROM, if that fails generate
1610 	 * a random MAC address.
1611 	 */
1612 	if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
1613 
1614 		err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1615 #ifdef FDT
1616 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)))
1617 			err = usb_fdt_get_mac_addr(sc->sc_ue.ue_dev, &sc->sc_ue);
1618 #endif
1619 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) {
1620 			read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1621 			sc->sc_ue.ue_eaddr[0] &= ~0x01;     /* unicast */
1622 			sc->sc_ue.ue_eaddr[0] |=  0x02;     /* locally administered */
1623 		}
1624 	}
1625 
1626 	/* Initialise the chip for the first time */
1627 	smsc_chip_init(sc);
1628 }
1629 
1630 
1631 /**
1632  *	smsc_attach_post_sub - Called after the driver attached to the USB interface
1633  *	@ue: the USB ethernet device
1634  *
1635  *	Most of this is boilerplate code and copied from the base USB ethernet
1636  *	driver.  It has been overriden so that we can indicate to the system that
1637  *	the chip supports H/W checksumming.
1638  *
1639  *	RETURNS:
1640  *	Returns 0 on success or a negative error code.
1641  */
1642 #if __FreeBSD_version > 1000000
1643 static int
1644 smsc_attach_post_sub(struct usb_ether *ue)
1645 {
1646 	struct smsc_softc *sc;
1647 	struct ifnet *ifp;
1648 	int error;
1649 
1650 	sc = uether_getsc(ue);
1651 	ifp = ue->ue_ifp;
1652 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1653 	ifp->if_start = uether_start;
1654 	ifp->if_ioctl = smsc_ioctl;
1655 	ifp->if_init = uether_init;
1656 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1657 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1658 	IFQ_SET_READY(&ifp->if_snd);
1659 
1660 	/* The chip supports TCP/UDP checksum offloading on TX and RX paths, however
1661 	 * currently only RX checksum is supported in the driver (see top of file).
1662 	 */
1663 	ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU;
1664 	ifp->if_hwassist = 0;
1665 
1666 	/* TX checksuming is disabled (for now?)
1667 	ifp->if_capabilities |= IFCAP_TXCSUM;
1668 	ifp->if_capenable |= IFCAP_TXCSUM;
1669 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1670 	*/
1671 
1672 	ifp->if_capenable = ifp->if_capabilities;
1673 
1674 	mtx_lock(&Giant);
1675 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1676 	    uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1677 	    BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1678 	mtx_unlock(&Giant);
1679 
1680 	return (error);
1681 }
1682 #endif /* __FreeBSD_version > 1000000 */
1683 
1684 
1685 /**
1686  *	smsc_probe - Probe the interface.
1687  *	@dev: smsc device handle
1688  *
1689  *	Checks if the device is a match for this driver.
1690  *
1691  *	RETURNS:
1692  *	Returns 0 on success or an error code on failure.
1693  */
1694 static int
1695 smsc_probe(device_t dev)
1696 {
1697 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1698 
1699 	if (uaa->usb_mode != USB_MODE_HOST)
1700 		return (ENXIO);
1701 	if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX)
1702 		return (ENXIO);
1703 	if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX)
1704 		return (ENXIO);
1705 
1706 	return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa));
1707 }
1708 
1709 
1710 /**
1711  *	smsc_attach - Attach the interface.
1712  *	@dev: smsc device handle
1713  *
1714  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
1715  *
1716  *	RETURNS:
1717  *	Returns 0 on success or a negative error code.
1718  */
1719 static int
1720 smsc_attach(device_t dev)
1721 {
1722 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1723 	struct smsc_softc *sc = device_get_softc(dev);
1724 	struct usb_ether *ue = &sc->sc_ue;
1725 	uint8_t iface_index;
1726 	int err;
1727 
1728 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
1729 
1730 	device_set_usb_desc(dev);
1731 
1732 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1733 
1734 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
1735 	iface_index = SMSC_IFACE_IDX;
1736 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
1737 	                          smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx);
1738 	if (err) {
1739 		device_printf(dev, "error: allocating USB transfers failed\n");
1740 		goto detach;
1741 	}
1742 
1743 	ue->ue_sc = sc;
1744 	ue->ue_dev = dev;
1745 	ue->ue_udev = uaa->device;
1746 	ue->ue_mtx = &sc->sc_mtx;
1747 	ue->ue_methods = &smsc_ue_methods;
1748 
1749 	err = uether_ifattach(ue);
1750 	if (err) {
1751 		device_printf(dev, "error: could not attach interface\n");
1752 		goto detach;
1753 	}
1754 	return (0);			/* success */
1755 
1756 detach:
1757 	smsc_detach(dev);
1758 	return (ENXIO);		/* failure */
1759 }
1760 
1761 /**
1762  *	smsc_detach - Detach the interface.
1763  *	@dev: smsc device handle
1764  *
1765  *	RETURNS:
1766  *	Returns 0.
1767  */
1768 static int
1769 smsc_detach(device_t dev)
1770 {
1771 	struct smsc_softc *sc = device_get_softc(dev);
1772 	struct usb_ether *ue = &sc->sc_ue;
1773 
1774 	usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER);
1775 	uether_ifdetach(ue);
1776 	mtx_destroy(&sc->sc_mtx);
1777 
1778 	return (0);
1779 }
1780 
1781 static device_method_t smsc_methods[] = {
1782 	/* Device interface */
1783 	DEVMETHOD(device_probe, smsc_probe),
1784 	DEVMETHOD(device_attach, smsc_attach),
1785 	DEVMETHOD(device_detach, smsc_detach),
1786 
1787 	/* bus interface */
1788 	DEVMETHOD(bus_print_child, bus_generic_print_child),
1789 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
1790 
1791 	/* MII interface */
1792 	DEVMETHOD(miibus_readreg, smsc_miibus_readreg),
1793 	DEVMETHOD(miibus_writereg, smsc_miibus_writereg),
1794 	DEVMETHOD(miibus_statchg, smsc_miibus_statchg),
1795 
1796 	DEVMETHOD_END
1797 };
1798 
1799 static driver_t smsc_driver = {
1800 	.name = "smsc",
1801 	.methods = smsc_methods,
1802 	.size = sizeof(struct smsc_softc),
1803 };
1804 
1805 static devclass_t smsc_devclass;
1806 
1807 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0);
1808 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0);
1809 MODULE_DEPEND(smsc, uether, 1, 1, 1);
1810 MODULE_DEPEND(smsc, usb, 1, 1, 1);
1811 MODULE_DEPEND(smsc, ether, 1, 1, 1);
1812 MODULE_DEPEND(smsc, miibus, 1, 1, 1);
1813 MODULE_VERSION(smsc, 1);
1814 USB_PNP_HOST_INFO(smsc_devs);
1815