1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #define RUE_CONFIG_IDX 0 /* config number 1 */ 32 #define RUE_IFACE_IDX 0 33 34 #define RUE_INTR_PKTLEN 0x8 35 36 #define RUE_TIMEOUT 50 37 #define RUE_MIN_FRAMELEN 60 38 39 /* Registers. */ 40 #define RUE_IDR0 0x0120 41 #define RUE_IDR1 0x0121 42 #define RUE_IDR2 0x0122 43 #define RUE_IDR3 0x0123 44 #define RUE_IDR4 0x0124 45 #define RUE_IDR5 0x0125 46 47 #define RUE_MAR0 0x0126 48 #define RUE_MAR1 0x0127 49 #define RUE_MAR2 0x0128 50 #define RUE_MAR3 0x0129 51 #define RUE_MAR4 0x012A 52 #define RUE_MAR5 0x012B 53 #define RUE_MAR6 0x012C 54 #define RUE_MAR7 0x012D 55 56 #define RUE_CR 0x012E /* B, R/W */ 57 #define RUE_CR_SOFT_RST 0x10 58 #define RUE_CR_RE 0x08 59 #define RUE_CR_TE 0x04 60 #define RUE_CR_EP3CLREN 0x02 61 62 #define RUE_TCR 0x012F /* B, R/W */ 63 #define RUE_TCR_TXRR1 0x80 64 #define RUE_TCR_TXRR0 0x40 65 #define RUE_TCR_IFG1 0x10 66 #define RUE_TCR_IFG0 0x08 67 #define RUE_TCR_NOCRC 0x01 68 #define RUE_TCR_CONFIG (RUE_TCR_TXRR1 | RUE_TCR_TXRR0 | \ 69 RUE_TCR_IFG1 | RUE_TCR_IFG0) 70 71 #define RUE_RCR 0x0130 /* W, R/W */ 72 #define RUE_RCR_TAIL 0x80 73 #define RUE_RCR_AER 0x40 74 #define RUE_RCR_AR 0x20 75 #define RUE_RCR_AM 0x10 76 #define RUE_RCR_AB 0x08 77 #define RUE_RCR_AD 0x04 78 #define RUE_RCR_AAM 0x02 79 #define RUE_RCR_AAP 0x01 80 #define RUE_RCR_CONFIG (RUE_RCR_TAIL | RUE_RCR_AD) 81 82 #define RUE_TSR 0x0132 83 #define RUE_RSR 0x0133 84 #define RUE_CON0 0x0135 85 #define RUE_CON1 0x0136 86 #define RUE_MSR 0x0137 87 #define RUE_PHYADD 0x0138 88 #define RUE_PHYDAT 0x0139 89 90 #define RUE_PHYCNT 0x013B /* B, R/W */ 91 #define RUE_PHYCNT_PHYOWN 0x40 92 #define RUE_PHYCNT_RWCR 0x20 93 94 #define RUE_GPPC 0x013D 95 #define RUE_WAKECNT 0x013E 96 97 #define RUE_BMCR 0x0140 98 #define RUE_BMCR_SPD_SET 0x2000 99 #define RUE_BMCR_DUPLEX 0x0100 100 101 #define RUE_BMSR 0x0142 102 103 #define RUE_ANAR 0x0144 /* W, R/W */ 104 #define RUE_ANAR_PAUSE 0x0400 105 106 #define RUE_ANLP 0x0146 /* W, R/O */ 107 #define RUE_ANLP_PAUSE 0x0400 108 109 #define RUE_AER 0x0148 110 111 #define RUE_NWAYT 0x014A 112 #define RUE_CSCR 0x014C 113 114 #define RUE_CRC0 0x014E 115 #define RUE_CRC1 0x0150 116 #define RUE_CRC2 0x0152 117 #define RUE_CRC3 0x0154 118 #define RUE_CRC4 0x0156 119 120 #define RUE_BYTEMASK0 0x0158 121 #define RUE_BYTEMASK1 0x0160 122 #define RUE_BYTEMASK2 0x0168 123 #define RUE_BYTEMASK3 0x0170 124 #define RUE_BYTEMASK4 0x0178 125 126 #define RUE_PHY1 0x0180 127 #define RUE_PHY2 0x0184 128 129 #define RUE_TW1 0x0186 130 131 #define RUE_REG_MIN 0x0120 132 #define RUE_REG_MAX 0x0189 133 134 /* EEPROM address declarations. */ 135 #define RUE_EEPROM_BASE 0x1200 136 #define RUE_EEPROM_IDR0 (RUE_EEPROM_BASE + 0x02) 137 #define RUE_EEPROM_IDR1 (RUE_EEPROM_BASE + 0x03) 138 #define RUE_EEPROM_IDR2 (RUE_EEPROM_BASE + 0x03) 139 #define RUE_EEPROM_IDR3 (RUE_EEPROM_BASE + 0x03) 140 #define RUE_EEPROM_IDR4 (RUE_EEPROM_BASE + 0x03) 141 #define RUE_EEPROM_IDR5 (RUE_EEPROM_BASE + 0x03) 142 #define RUE_EEPROM_INTERVAL (RUE_EEPROM_BASE + 0x17) 143 144 #define RUE_RXSTAT_VALID (0x01 << 12) 145 #define RUE_RXSTAT_RUNT (0x02 << 12) 146 #define RUE_RXSTAT_PMATCH (0x04 << 12) 147 #define RUE_RXSTAT_MCAST (0x08 << 12) 148 149 #define GET_MII(sc) uether_getmii(&(sc)->sc_ue) 150 151 struct rue_intrpkt { 152 uint8_t rue_tsr; 153 uint8_t rue_rsr; 154 uint8_t rue_gep_msr; 155 uint8_t rue_waksr; 156 uint8_t rue_txok_cnt; 157 uint8_t rue_rxlost_cnt; 158 uint8_t rue_crcerr_cnt; 159 uint8_t rue_col_cnt; 160 } __packed; 161 162 enum { 163 RUE_BULK_DT_WR, 164 RUE_BULK_DT_RD, 165 RUE_INTR_DT_RD, 166 RUE_N_TRANSFER, 167 }; 168 169 struct rue_softc { 170 struct usb_ether sc_ue; 171 struct mtx sc_mtx; 172 struct usb_xfer *sc_xfer[RUE_N_TRANSFER]; 173 174 int sc_flags; 175 #define RUE_FLAG_LINK 0x0001 176 }; 177 178 #define RUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 179 #define RUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 180 #define RUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 181