1 /*- 2 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>. 3 * Copyright (c) 1997, 1998, 1999, 2000 Bill Paul <wpaul@ee.columbia.edu>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 /*- 28 * Copyright (c) 1997, 1998, 1999, 2000 29 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. All advertising materials mentioning features or use of this software 40 * must display the following acknowledgement: 41 * This product includes software developed by Bill Paul. 42 * 4. Neither the name of the author nor the names of any co-contributors 43 * may be used to endorse or promote products derived from this software 44 * without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #include <sys/cdefs.h> 60 __FBSDID("$FreeBSD$"); 61 62 /* 63 * RealTek RTL8150 USB to fast ethernet controller driver. 64 * Datasheet is available from 65 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/. 66 */ 67 68 #include "usbdevs.h" 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usb_mfunc.h> 71 #include <dev/usb/usb_error.h> 72 73 #define USB_DEBUG_VAR rue_debug 74 75 #include <dev/usb/usb_core.h> 76 #include <dev/usb/usb_lookup.h> 77 #include <dev/usb/usb_process.h> 78 #include <dev/usb/usb_debug.h> 79 #include <dev/usb/usb_request.h> 80 #include <dev/usb/usb_busdma.h> 81 #include <dev/usb/usb_util.h> 82 83 #include <dev/usb/net/usb_ethernet.h> 84 #include <dev/usb/net/if_ruereg.h> 85 86 #if USB_DEBUG 87 static int rue_debug = 0; 88 89 SYSCTL_NODE(_hw_usb, OID_AUTO, rue, CTLFLAG_RW, 0, "USB rue"); 90 SYSCTL_INT(_hw_usb_rue, OID_AUTO, debug, CTLFLAG_RW, 91 &rue_debug, 0, "Debug level"); 92 #endif 93 94 /* 95 * Various supported device vendors/products. 96 */ 97 98 static const struct usb_device_id rue_devs[] = { 99 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX, 0)}, 100 {USB_VPI(USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_USBKR100, 0)}, 101 }; 102 103 /* prototypes */ 104 105 static device_probe_t rue_probe; 106 static device_attach_t rue_attach; 107 static device_detach_t rue_detach; 108 109 static miibus_readreg_t rue_miibus_readreg; 110 static miibus_writereg_t rue_miibus_writereg; 111 static miibus_statchg_t rue_miibus_statchg; 112 113 static usb_callback_t rue_intr_callback; 114 static usb_callback_t rue_bulk_read_callback; 115 static usb_callback_t rue_bulk_write_callback; 116 117 static uether_fn_t rue_attach_post; 118 static uether_fn_t rue_init; 119 static uether_fn_t rue_stop; 120 static uether_fn_t rue_start; 121 static uether_fn_t rue_tick; 122 static uether_fn_t rue_setmulti; 123 static uether_fn_t rue_setpromisc; 124 125 static int rue_read_mem(struct rue_softc *, uint16_t, void *, int); 126 static int rue_write_mem(struct rue_softc *, uint16_t, void *, int); 127 static uint8_t rue_csr_read_1(struct rue_softc *, uint16_t); 128 static uint16_t rue_csr_read_2(struct rue_softc *, uint16_t); 129 static int rue_csr_write_1(struct rue_softc *, uint16_t, uint8_t); 130 static int rue_csr_write_2(struct rue_softc *, uint16_t, uint16_t); 131 static int rue_csr_write_4(struct rue_softc *, int, uint32_t); 132 133 static void rue_reset(struct rue_softc *); 134 static int rue_ifmedia_upd(struct ifnet *); 135 static void rue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 136 137 static const struct usb_config rue_config[RUE_N_TRANSFER] = { 138 139 [RUE_BULK_DT_WR] = { 140 .type = UE_BULK, 141 .endpoint = UE_ADDR_ANY, 142 .direction = UE_DIR_OUT, 143 .bufsize = MCLBYTES, 144 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 145 .callback = rue_bulk_write_callback, 146 .timeout = 10000, /* 10 seconds */ 147 }, 148 149 [RUE_BULK_DT_RD] = { 150 .type = UE_BULK, 151 .endpoint = UE_ADDR_ANY, 152 .direction = UE_DIR_IN, 153 .bufsize = (MCLBYTES + 4), 154 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 155 .callback = rue_bulk_read_callback, 156 .timeout = 0, /* no timeout */ 157 }, 158 159 [RUE_INTR_DT_RD] = { 160 .type = UE_INTERRUPT, 161 .endpoint = UE_ADDR_ANY, 162 .direction = UE_DIR_IN, 163 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 164 .bufsize = 0, /* use wMaxPacketSize */ 165 .callback = rue_intr_callback, 166 }, 167 }; 168 169 static device_method_t rue_methods[] = { 170 /* Device interface */ 171 DEVMETHOD(device_probe, rue_probe), 172 DEVMETHOD(device_attach, rue_attach), 173 DEVMETHOD(device_detach, rue_detach), 174 175 /* Bus interface */ 176 DEVMETHOD(bus_print_child, bus_generic_print_child), 177 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 178 179 /* MII interface */ 180 DEVMETHOD(miibus_readreg, rue_miibus_readreg), 181 DEVMETHOD(miibus_writereg, rue_miibus_writereg), 182 DEVMETHOD(miibus_statchg, rue_miibus_statchg), 183 184 {0, 0} 185 }; 186 187 static driver_t rue_driver = { 188 .name = "rue", 189 .methods = rue_methods, 190 .size = sizeof(struct rue_softc), 191 }; 192 193 static devclass_t rue_devclass; 194 195 DRIVER_MODULE(rue, uhub, rue_driver, rue_devclass, NULL, 0); 196 DRIVER_MODULE(miibus, rue, miibus_driver, miibus_devclass, 0, 0); 197 MODULE_DEPEND(rue, uether, 1, 1, 1); 198 MODULE_DEPEND(rue, usb, 1, 1, 1); 199 MODULE_DEPEND(rue, ether, 1, 1, 1); 200 MODULE_DEPEND(rue, miibus, 1, 1, 1); 201 202 static const struct usb_ether_methods rue_ue_methods = { 203 .ue_attach_post = rue_attach_post, 204 .ue_start = rue_start, 205 .ue_init = rue_init, 206 .ue_stop = rue_stop, 207 .ue_tick = rue_tick, 208 .ue_setmulti = rue_setmulti, 209 .ue_setpromisc = rue_setpromisc, 210 .ue_mii_upd = rue_ifmedia_upd, 211 .ue_mii_sts = rue_ifmedia_sts, 212 }; 213 214 #define RUE_SETBIT(sc, reg, x) \ 215 rue_csr_write_1(sc, reg, rue_csr_read_1(sc, reg) | (x)) 216 217 #define RUE_CLRBIT(sc, reg, x) \ 218 rue_csr_write_1(sc, reg, rue_csr_read_1(sc, reg) & ~(x)) 219 220 static int 221 rue_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, int len) 222 { 223 struct usb_device_request req; 224 225 req.bmRequestType = UT_READ_VENDOR_DEVICE; 226 req.bRequest = UR_SET_ADDRESS; 227 USETW(req.wValue, addr); 228 USETW(req.wIndex, 0); 229 USETW(req.wLength, len); 230 231 return (usb2_ether_do_request(&sc->sc_ue, &req, buf, 1000)); 232 } 233 234 static int 235 rue_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, int len) 236 { 237 struct usb_device_request req; 238 239 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 240 req.bRequest = UR_SET_ADDRESS; 241 USETW(req.wValue, addr); 242 USETW(req.wIndex, 0); 243 USETW(req.wLength, len); 244 245 return (usb2_ether_do_request(&sc->sc_ue, &req, buf, 1000)); 246 } 247 248 static uint8_t 249 rue_csr_read_1(struct rue_softc *sc, uint16_t reg) 250 { 251 uint8_t val; 252 253 rue_read_mem(sc, reg, &val, 1); 254 return (val); 255 } 256 257 static uint16_t 258 rue_csr_read_2(struct rue_softc *sc, uint16_t reg) 259 { 260 uint8_t val[2]; 261 262 rue_read_mem(sc, reg, &val, 2); 263 return (UGETW(val)); 264 } 265 266 static int 267 rue_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val) 268 { 269 return (rue_write_mem(sc, reg, &val, 1)); 270 } 271 272 static int 273 rue_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val) 274 { 275 uint8_t temp[2]; 276 277 USETW(temp, val); 278 return (rue_write_mem(sc, reg, &temp, 2)); 279 } 280 281 static int 282 rue_csr_write_4(struct rue_softc *sc, int reg, uint32_t val) 283 { 284 uint8_t temp[4]; 285 286 USETDW(temp, val); 287 return (rue_write_mem(sc, reg, &temp, 4)); 288 } 289 290 static int 291 rue_miibus_readreg(device_t dev, int phy, int reg) 292 { 293 struct rue_softc *sc = device_get_softc(dev); 294 uint16_t rval; 295 uint16_t ruereg; 296 int locked; 297 298 if (phy != 0) /* RTL8150 supports PHY == 0, only */ 299 return (0); 300 301 locked = mtx_owned(&sc->sc_mtx); 302 if (!locked) 303 RUE_LOCK(sc); 304 305 switch (reg) { 306 case MII_BMCR: 307 ruereg = RUE_BMCR; 308 break; 309 case MII_BMSR: 310 ruereg = RUE_BMSR; 311 break; 312 case MII_ANAR: 313 ruereg = RUE_ANAR; 314 break; 315 case MII_ANER: 316 ruereg = RUE_AER; 317 break; 318 case MII_ANLPAR: 319 ruereg = RUE_ANLP; 320 break; 321 case MII_PHYIDR1: 322 case MII_PHYIDR2: 323 rval = 0; 324 goto done; 325 default: 326 if (RUE_REG_MIN <= reg && reg <= RUE_REG_MAX) { 327 rval = rue_csr_read_1(sc, reg); 328 goto done; 329 } 330 device_printf(sc->sc_ue.ue_dev, "bad phy register\n"); 331 rval = 0; 332 goto done; 333 } 334 335 rval = rue_csr_read_2(sc, ruereg); 336 done: 337 if (!locked) 338 RUE_UNLOCK(sc); 339 return (rval); 340 } 341 342 static int 343 rue_miibus_writereg(device_t dev, int phy, int reg, int data) 344 { 345 struct rue_softc *sc = device_get_softc(dev); 346 uint16_t ruereg; 347 int locked; 348 349 if (phy != 0) /* RTL8150 supports PHY == 0, only */ 350 return (0); 351 352 locked = mtx_owned(&sc->sc_mtx); 353 if (!locked) 354 RUE_LOCK(sc); 355 356 switch (reg) { 357 case MII_BMCR: 358 ruereg = RUE_BMCR; 359 break; 360 case MII_BMSR: 361 ruereg = RUE_BMSR; 362 break; 363 case MII_ANAR: 364 ruereg = RUE_ANAR; 365 break; 366 case MII_ANER: 367 ruereg = RUE_AER; 368 break; 369 case MII_ANLPAR: 370 ruereg = RUE_ANLP; 371 break; 372 case MII_PHYIDR1: 373 case MII_PHYIDR2: 374 goto done; 375 default: 376 if (RUE_REG_MIN <= reg && reg <= RUE_REG_MAX) { 377 rue_csr_write_1(sc, reg, data); 378 goto done; 379 } 380 device_printf(sc->sc_ue.ue_dev, " bad phy register\n"); 381 goto done; 382 } 383 rue_csr_write_2(sc, ruereg, data); 384 done: 385 if (!locked) 386 RUE_UNLOCK(sc); 387 return (0); 388 } 389 390 static void 391 rue_miibus_statchg(device_t dev) 392 { 393 /* 394 * When the code below is enabled the card starts doing weird 395 * things after link going from UP to DOWN and back UP. 396 * 397 * Looks like some of register writes below messes up PHY 398 * interface. 399 * 400 * No visible regressions were found after commenting this code 401 * out, so that disable it for good. 402 */ 403 #if 0 404 struct rue_softc *sc = device_get_softc(dev); 405 struct mii_data *mii = GET_MII(sc); 406 uint16_t bmcr; 407 int locked; 408 409 locked = mtx_owned(&sc->sc_mtx); 410 if (!locked) 411 RUE_LOCK(sc); 412 413 RUE_CLRBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 414 415 bmcr = rue_csr_read_2(sc, RUE_BMCR); 416 417 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 418 bmcr |= RUE_BMCR_SPD_SET; 419 else 420 bmcr &= ~RUE_BMCR_SPD_SET; 421 422 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 423 bmcr |= RUE_BMCR_DUPLEX; 424 else 425 bmcr &= ~RUE_BMCR_DUPLEX; 426 427 rue_csr_write_2(sc, RUE_BMCR, bmcr); 428 429 RUE_SETBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 430 431 if (!locked) 432 RUE_UNLOCK(sc); 433 #endif 434 } 435 436 static void 437 rue_setpromisc(struct usb_ether *ue) 438 { 439 struct rue_softc *sc = usb2_ether_getsc(ue); 440 struct ifnet *ifp = usb2_ether_getifp(ue); 441 442 RUE_LOCK_ASSERT(sc, MA_OWNED); 443 444 /* If we want promiscuous mode, set the allframes bit. */ 445 if (ifp->if_flags & IFF_PROMISC) 446 RUE_SETBIT(sc, RUE_RCR, RUE_RCR_AAP); 447 else 448 RUE_CLRBIT(sc, RUE_RCR, RUE_RCR_AAP); 449 } 450 451 /* 452 * Program the 64-bit multicast hash filter. 453 */ 454 static void 455 rue_setmulti(struct usb_ether *ue) 456 { 457 struct rue_softc *sc = usb2_ether_getsc(ue); 458 struct ifnet *ifp = usb2_ether_getifp(ue); 459 uint16_t rxcfg; 460 int h = 0; 461 uint32_t hashes[2] = { 0, 0 }; 462 struct ifmultiaddr *ifma; 463 int mcnt = 0; 464 465 RUE_LOCK_ASSERT(sc, MA_OWNED); 466 467 rxcfg = rue_csr_read_2(sc, RUE_RCR); 468 469 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 470 rxcfg |= (RUE_RCR_AAM | RUE_RCR_AAP); 471 rxcfg &= ~RUE_RCR_AM; 472 rue_csr_write_2(sc, RUE_RCR, rxcfg); 473 rue_csr_write_4(sc, RUE_MAR0, 0xFFFFFFFF); 474 rue_csr_write_4(sc, RUE_MAR4, 0xFFFFFFFF); 475 return; 476 } 477 478 /* first, zot all the existing hash bits */ 479 rue_csr_write_4(sc, RUE_MAR0, 0); 480 rue_csr_write_4(sc, RUE_MAR4, 0); 481 482 /* now program new ones */ 483 IF_ADDR_LOCK(ifp); 484 TAILQ_FOREACH (ifma, &ifp->if_multiaddrs, ifma_link) 485 { 486 if (ifma->ifma_addr->sa_family != AF_LINK) 487 continue; 488 h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 489 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 490 if (h < 32) 491 hashes[0] |= (1 << h); 492 else 493 hashes[1] |= (1 << (h - 32)); 494 mcnt++; 495 } 496 IF_ADDR_UNLOCK(ifp); 497 498 if (mcnt) 499 rxcfg |= RUE_RCR_AM; 500 else 501 rxcfg &= ~RUE_RCR_AM; 502 503 rxcfg &= ~(RUE_RCR_AAM | RUE_RCR_AAP); 504 505 rue_csr_write_2(sc, RUE_RCR, rxcfg); 506 rue_csr_write_4(sc, RUE_MAR0, hashes[0]); 507 rue_csr_write_4(sc, RUE_MAR4, hashes[1]); 508 } 509 510 static void 511 rue_reset(struct rue_softc *sc) 512 { 513 int i; 514 515 rue_csr_write_1(sc, RUE_CR, RUE_CR_SOFT_RST); 516 517 for (i = 0; i != RUE_TIMEOUT; i++) { 518 if (usb2_ether_pause(&sc->sc_ue, hz / 1000)) 519 break; 520 if (!(rue_csr_read_1(sc, RUE_CR) & RUE_CR_SOFT_RST)) 521 break; 522 } 523 if (i == RUE_TIMEOUT) 524 device_printf(sc->sc_ue.ue_dev, "reset never completed!\n"); 525 526 usb2_ether_pause(&sc->sc_ue, hz / 100); 527 } 528 529 static void 530 rue_attach_post(struct usb_ether *ue) 531 { 532 struct rue_softc *sc = usb2_ether_getsc(ue); 533 534 /* reset the adapter */ 535 rue_reset(sc); 536 537 /* get station address from the EEPROM */ 538 rue_read_mem(sc, RUE_EEPROM_IDR0, ue->ue_eaddr, ETHER_ADDR_LEN); 539 } 540 541 /* 542 * Probe for a RTL8150 chip. 543 */ 544 static int 545 rue_probe(device_t dev) 546 { 547 struct usb_attach_arg *uaa = device_get_ivars(dev); 548 549 if (uaa->usb_mode != USB_MODE_HOST) 550 return (ENXIO); 551 if (uaa->info.bConfigIndex != RUE_CONFIG_IDX) 552 return (ENXIO); 553 if (uaa->info.bIfaceIndex != RUE_IFACE_IDX) 554 return (ENXIO); 555 556 return (usb2_lookup_id_by_uaa(rue_devs, sizeof(rue_devs), uaa)); 557 } 558 559 /* 560 * Attach the interface. Allocate softc structures, do ifmedia 561 * setup and ethernet/BPF attach. 562 */ 563 static int 564 rue_attach(device_t dev) 565 { 566 struct usb_attach_arg *uaa = device_get_ivars(dev); 567 struct rue_softc *sc = device_get_softc(dev); 568 struct usb_ether *ue = &sc->sc_ue; 569 uint8_t iface_index; 570 int error; 571 572 device_set_usb2_desc(dev); 573 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 574 575 iface_index = RUE_IFACE_IDX; 576 error = usb2_transfer_setup(uaa->device, &iface_index, 577 sc->sc_xfer, rue_config, RUE_N_TRANSFER, 578 sc, &sc->sc_mtx); 579 if (error) { 580 device_printf(dev, "allocating USB transfers failed!\n"); 581 goto detach; 582 } 583 584 ue->ue_sc = sc; 585 ue->ue_dev = dev; 586 ue->ue_udev = uaa->device; 587 ue->ue_mtx = &sc->sc_mtx; 588 ue->ue_methods = &rue_ue_methods; 589 590 error = usb2_ether_ifattach(ue); 591 if (error) { 592 device_printf(dev, "could not attach interface\n"); 593 goto detach; 594 } 595 return (0); /* success */ 596 597 detach: 598 rue_detach(dev); 599 return (ENXIO); /* failure */ 600 } 601 602 static int 603 rue_detach(device_t dev) 604 { 605 struct rue_softc *sc = device_get_softc(dev); 606 struct usb_ether *ue = &sc->sc_ue; 607 608 usb2_transfer_unsetup(sc->sc_xfer, RUE_N_TRANSFER); 609 usb2_ether_ifdetach(ue); 610 mtx_destroy(&sc->sc_mtx); 611 612 return (0); 613 } 614 615 static void 616 rue_intr_callback(struct usb_xfer *xfer) 617 { 618 struct rue_softc *sc = xfer->priv_sc; 619 struct ifnet *ifp = usb2_ether_getifp(&sc->sc_ue); 620 struct rue_intrpkt pkt; 621 622 switch (USB_GET_STATE(xfer)) { 623 case USB_ST_TRANSFERRED: 624 625 if (ifp && (ifp->if_drv_flags & IFF_DRV_RUNNING) && 626 (xfer->actlen >= sizeof(pkt))) { 627 628 usb2_copy_out(xfer->frbuffers, 0, &pkt, sizeof(pkt)); 629 630 ifp->if_ierrors += pkt.rue_rxlost_cnt; 631 ifp->if_ierrors += pkt.rue_crcerr_cnt; 632 ifp->if_collisions += pkt.rue_col_cnt; 633 } 634 /* FALLTHROUGH */ 635 case USB_ST_SETUP: 636 tr_setup: 637 xfer->frlengths[0] = xfer->max_data_length; 638 usb2_start_hardware(xfer); 639 return; 640 641 default: /* Error */ 642 if (xfer->error != USB_ERR_CANCELLED) { 643 /* try to clear stall first */ 644 xfer->flags.stall_pipe = 1; 645 goto tr_setup; 646 } 647 return; 648 } 649 } 650 651 static void 652 rue_bulk_read_callback(struct usb_xfer *xfer) 653 { 654 struct rue_softc *sc = xfer->priv_sc; 655 struct usb_ether *ue = &sc->sc_ue; 656 struct ifnet *ifp = usb2_ether_getifp(ue); 657 uint16_t status; 658 659 switch (USB_GET_STATE(xfer)) { 660 case USB_ST_TRANSFERRED: 661 662 if (xfer->actlen < 4) { 663 ifp->if_ierrors++; 664 goto tr_setup; 665 } 666 usb2_copy_out(xfer->frbuffers, xfer->actlen - 4, 667 &status, sizeof(status)); 668 xfer->actlen -= 4; 669 670 /* check recieve packet was valid or not */ 671 status = le16toh(status); 672 if ((status & RUE_RXSTAT_VALID) == 0) { 673 ifp->if_ierrors++; 674 goto tr_setup; 675 } 676 usb2_ether_rxbuf(ue, xfer->frbuffers, 0, xfer->actlen); 677 /* FALLTHROUGH */ 678 case USB_ST_SETUP: 679 tr_setup: 680 xfer->frlengths[0] = xfer->max_data_length; 681 usb2_start_hardware(xfer); 682 usb2_ether_rxflush(ue); 683 return; 684 685 default: /* Error */ 686 DPRINTF("bulk read error, %s\n", 687 usb2_errstr(xfer->error)); 688 689 if (xfer->error != USB_ERR_CANCELLED) { 690 /* try to clear stall first */ 691 xfer->flags.stall_pipe = 1; 692 goto tr_setup; 693 } 694 return; 695 } 696 } 697 698 static void 699 rue_bulk_write_callback(struct usb_xfer *xfer) 700 { 701 struct rue_softc *sc = xfer->priv_sc; 702 struct ifnet *ifp = usb2_ether_getifp(&sc->sc_ue); 703 struct mbuf *m; 704 int temp_len; 705 706 switch (USB_GET_STATE(xfer)) { 707 case USB_ST_TRANSFERRED: 708 DPRINTFN(11, "transfer complete\n"); 709 ifp->if_opackets++; 710 711 /* FALLTHROUGH */ 712 case USB_ST_SETUP: 713 tr_setup: 714 if ((sc->sc_flags & RUE_FLAG_LINK) == 0) { 715 /* 716 * don't send anything if there is no link ! 717 */ 718 return; 719 } 720 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 721 722 if (m == NULL) 723 return; 724 if (m->m_pkthdr.len > MCLBYTES) 725 m->m_pkthdr.len = MCLBYTES; 726 temp_len = m->m_pkthdr.len; 727 728 usb2_m_copy_in(xfer->frbuffers, 0, 729 m, 0, m->m_pkthdr.len); 730 731 /* 732 * This is an undocumented behavior. 733 * RTL8150 chip doesn't send frame length smaller than 734 * RUE_MIN_FRAMELEN (60) byte packet. 735 */ 736 if (temp_len < RUE_MIN_FRAMELEN) { 737 usb2_bzero(xfer->frbuffers, temp_len, 738 RUE_MIN_FRAMELEN - temp_len); 739 temp_len = RUE_MIN_FRAMELEN; 740 } 741 xfer->frlengths[0] = temp_len; 742 743 /* 744 * if there's a BPF listener, bounce a copy 745 * of this frame to him: 746 */ 747 BPF_MTAP(ifp, m); 748 749 m_freem(m); 750 751 usb2_start_hardware(xfer); 752 753 return; 754 755 default: /* Error */ 756 DPRINTFN(11, "transfer error, %s\n", 757 usb2_errstr(xfer->error)); 758 759 ifp->if_oerrors++; 760 761 if (xfer->error != USB_ERR_CANCELLED) { 762 /* try to clear stall first */ 763 xfer->flags.stall_pipe = 1; 764 goto tr_setup; 765 } 766 return; 767 } 768 } 769 770 static void 771 rue_tick(struct usb_ether *ue) 772 { 773 struct rue_softc *sc = usb2_ether_getsc(ue); 774 struct mii_data *mii = GET_MII(sc); 775 776 RUE_LOCK_ASSERT(sc, MA_OWNED); 777 778 mii_tick(mii); 779 if ((sc->sc_flags & RUE_FLAG_LINK) == 0 780 && mii->mii_media_status & IFM_ACTIVE && 781 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 782 sc->sc_flags |= RUE_FLAG_LINK; 783 rue_start(ue); 784 } 785 } 786 787 static void 788 rue_start(struct usb_ether *ue) 789 { 790 struct rue_softc *sc = usb2_ether_getsc(ue); 791 792 /* 793 * start the USB transfers, if not already started: 794 */ 795 usb2_transfer_start(sc->sc_xfer[RUE_INTR_DT_RD]); 796 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_RD]); 797 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_WR]); 798 } 799 800 static void 801 rue_init(struct usb_ether *ue) 802 { 803 struct rue_softc *sc = usb2_ether_getsc(ue); 804 struct ifnet *ifp = usb2_ether_getifp(ue); 805 806 RUE_LOCK_ASSERT(sc, MA_OWNED); 807 808 /* 809 * Cancel pending I/O 810 */ 811 rue_reset(sc); 812 813 /* Set MAC address */ 814 rue_write_mem(sc, RUE_IDR0, IF_LLADDR(ifp), ETHER_ADDR_LEN); 815 816 rue_stop(ue); 817 818 /* 819 * Set the initial TX and RX configuration. 820 */ 821 rue_csr_write_1(sc, RUE_TCR, RUE_TCR_CONFIG); 822 rue_csr_write_2(sc, RUE_RCR, RUE_RCR_CONFIG|RUE_RCR_AB); 823 824 /* Load the multicast filter */ 825 rue_setpromisc(ue); 826 /* Load the multicast filter. */ 827 rue_setmulti(ue); 828 829 /* Enable RX and TX */ 830 rue_csr_write_1(sc, RUE_CR, (RUE_CR_TE | RUE_CR_RE | RUE_CR_EP3CLREN)); 831 832 usb2_transfer_set_stall(sc->sc_xfer[RUE_BULK_DT_WR]); 833 834 ifp->if_drv_flags |= IFF_DRV_RUNNING; 835 rue_start(ue); 836 } 837 838 /* 839 * Set media options. 840 */ 841 static int 842 rue_ifmedia_upd(struct ifnet *ifp) 843 { 844 struct rue_softc *sc = ifp->if_softc; 845 struct mii_data *mii = GET_MII(sc); 846 847 RUE_LOCK_ASSERT(sc, MA_OWNED); 848 849 sc->sc_flags &= ~RUE_FLAG_LINK; 850 if (mii->mii_instance) { 851 struct mii_softc *miisc; 852 853 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 854 mii_phy_reset(miisc); 855 } 856 mii_mediachg(mii); 857 return (0); 858 } 859 860 /* 861 * Report current media status. 862 */ 863 static void 864 rue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 865 { 866 struct rue_softc *sc = ifp->if_softc; 867 struct mii_data *mii = GET_MII(sc); 868 869 RUE_LOCK(sc); 870 mii_pollstat(mii); 871 RUE_UNLOCK(sc); 872 ifmr->ifm_active = mii->mii_media_active; 873 ifmr->ifm_status = mii->mii_media_status; 874 } 875 876 static void 877 rue_stop(struct usb_ether *ue) 878 { 879 struct rue_softc *sc = usb2_ether_getsc(ue); 880 struct ifnet *ifp = usb2_ether_getifp(ue); 881 882 RUE_LOCK_ASSERT(sc, MA_OWNED); 883 884 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 885 sc->sc_flags &= ~RUE_FLAG_LINK; 886 887 /* 888 * stop all the transfers, if not already stopped: 889 */ 890 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_WR]); 891 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_RD]); 892 usb2_transfer_stop(sc->sc_xfer[RUE_INTR_DT_RD]); 893 894 rue_csr_write_1(sc, RUE_CR, 0x00); 895 896 rue_reset(sc); 897 } 898