1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5 * Copyright (C) 2018 The FreeBSD Foundation. 6 * 7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 /* 38 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39 * 40 * USB 3.1 to 10/100/1000 Mbps Ethernet 41 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42 * 43 * USB 2.0 to 10/100/1000 Mbps Ethernet 44 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 45 * 46 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47 * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48 * 49 * This driver is based on the if_smsc driver, with lan78xx-specific 50 * functionality modelled on Microchip's Linux lan78xx driver. 51 * 52 * UNIMPLEMENTED FEATURES 53 * ------------------ 54 * A number of features supported by the lan78xx are not yet implemented in 55 * this driver: 56 * 57 * - RX/TX checksum offloading: Nothing has been implemented yet for 58 * TX checksumming. RX checksumming works with ICMP messages, but is broken 59 * for TCP/UDP packets. 60 * - Direct address translation filtering: Implemented but untested. 61 * - VLAN tag removal. 62 * - Support for USB interrupt endpoints. 63 * - Latency Tolerance Messaging (LTM) support. 64 * - TCP LSO support. 65 * 66 */ 67 68 #include <sys/param.h> 69 #include <sys/bus.h> 70 #include <sys/callout.h> 71 #include <sys/condvar.h> 72 #include <sys/kernel.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/module.h> 76 #include <sys/mutex.h> 77 #include <sys/priv.h> 78 #include <sys/queue.h> 79 #include <sys/random.h> 80 #include <sys/socket.h> 81 #include <sys/stddef.h> 82 #include <sys/stdint.h> 83 #include <sys/sx.h> 84 #include <sys/sysctl.h> 85 #include <sys/systm.h> 86 #include <sys/unistd.h> 87 88 #include <net/if.h> 89 #include <net/if_var.h> 90 #include <net/if_media.h> 91 92 #include <dev/mii/mii.h> 93 #include <dev/mii/miivar.h> 94 95 #include <netinet/in.h> 96 #include <netinet/ip.h> 97 98 #include "opt_platform.h" 99 100 #ifdef FDT 101 #include <dev/fdt/fdt_common.h> 102 #include <dev/ofw/ofw_bus.h> 103 #include <dev/ofw/ofw_bus_subr.h> 104 #include <dev/usb/usb_fdt_support.h> 105 #endif 106 107 #include <dev/usb/usb.h> 108 #include <dev/usb/usbdi.h> 109 #include <dev/usb/usbdi_util.h> 110 #include "usbdevs.h" 111 112 #define USB_DEBUG_VAR lan78xx_debug 113 #include <dev/usb/usb_debug.h> 114 #include <dev/usb/usb_process.h> 115 116 #include <dev/usb/net/usb_ethernet.h> 117 118 #include <dev/usb/net/if_mugereg.h> 119 120 #include "miibus_if.h" 121 122 #ifdef USB_DEBUG 123 static int muge_debug = 0; 124 125 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0, 126 "Microchip LAN78xx USB-GigE"); 127 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 128 "Debug level"); 129 #endif 130 131 #define MUGE_DEFAULT_RX_CSUM_ENABLE (false) 132 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 133 #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false) 134 135 /* Supported Vendor and Product IDs. */ 136 static const struct usb_device_id lan78xx_devs[] = { 137 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 138 MUGE_DEV(LAN7800_ETH, 0), 139 MUGE_DEV(LAN7801_ETH, 0), 140 MUGE_DEV(LAN7850_ETH, 0), 141 #undef MUGE_DEV 142 }; 143 144 #ifdef USB_DEBUG 145 #define muge_dbg_printf(sc, fmt, args...) \ 146 do { \ 147 if (muge_debug > 0) \ 148 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 149 } while(0) 150 #else 151 #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 152 #endif 153 154 #define muge_warn_printf(sc, fmt, args...) \ 155 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 156 157 #define muge_err_printf(sc, fmt, args...) \ 158 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 159 160 #define ETHER_IS_ZERO(addr) \ 161 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 162 163 #define ETHER_IS_VALID(addr) \ 164 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 165 166 /* USB endpoints. */ 167 168 enum { 169 MUGE_BULK_DT_RD, 170 MUGE_BULK_DT_WR, 171 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 172 MUGE_INTR_DT_WR, 173 MUGE_INTR_DT_RD, 174 #endif 175 MUGE_N_TRANSFER, 176 }; 177 178 struct muge_softc { 179 struct usb_ether sc_ue; 180 struct mtx sc_mtx; 181 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 182 int sc_phyno; 183 uint32_t sc_leds; 184 uint16_t sc_led_modes; 185 uint16_t sc_led_modes_mask; 186 187 /* Settings for the mac control (MAC_CSR) register. */ 188 uint32_t sc_rfe_ctl; 189 uint32_t sc_mdix_ctl; 190 uint16_t chipid; 191 uint16_t chiprev; 192 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 193 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 194 195 uint32_t sc_flags; 196 #define MUGE_FLAG_LINK 0x0001 197 #define MUGE_FLAG_INIT_DONE 0x0002 198 }; 199 200 #define MUGE_IFACE_IDX 0 201 202 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 203 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 204 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 205 206 static device_probe_t muge_probe; 207 static device_attach_t muge_attach; 208 static device_detach_t muge_detach; 209 210 static usb_callback_t muge_bulk_read_callback; 211 static usb_callback_t muge_bulk_write_callback; 212 213 static miibus_readreg_t lan78xx_miibus_readreg; 214 static miibus_writereg_t lan78xx_miibus_writereg; 215 static miibus_statchg_t lan78xx_miibus_statchg; 216 217 static int muge_attach_post_sub(struct usb_ether *ue); 218 static uether_fn_t muge_attach_post; 219 static uether_fn_t muge_init; 220 static uether_fn_t muge_stop; 221 static uether_fn_t muge_start; 222 static uether_fn_t muge_tick; 223 static uether_fn_t muge_setmulti; 224 static uether_fn_t muge_setpromisc; 225 226 static int muge_ifmedia_upd(struct ifnet *); 227 static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 228 229 static int lan78xx_chip_init(struct muge_softc *sc); 230 static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 231 232 static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 233 234 [MUGE_BULK_DT_WR] = { 235 .type = UE_BULK, 236 .endpoint = UE_ADDR_ANY, 237 .direction = UE_DIR_OUT, 238 .frames = 16, 239 .bufsize = 16 * (MCLBYTES + 16), 240 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 241 .callback = muge_bulk_write_callback, 242 .timeout = 10000, /* 10 seconds */ 243 }, 244 245 [MUGE_BULK_DT_RD] = { 246 .type = UE_BULK, 247 .endpoint = UE_ADDR_ANY, 248 .direction = UE_DIR_IN, 249 .bufsize = 20480, /* bytes */ 250 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 251 .callback = muge_bulk_read_callback, 252 .timeout = 0, /* no timeout */ 253 }, 254 /* 255 * The chip supports interrupt endpoints, however they aren't 256 * needed as we poll on the MII status. 257 */ 258 }; 259 260 static const struct usb_ether_methods muge_ue_methods = { 261 .ue_attach_post = muge_attach_post, 262 .ue_attach_post_sub = muge_attach_post_sub, 263 .ue_start = muge_start, 264 .ue_ioctl = muge_ioctl, 265 .ue_init = muge_init, 266 .ue_stop = muge_stop, 267 .ue_tick = muge_tick, 268 .ue_setmulti = muge_setmulti, 269 .ue_setpromisc = muge_setpromisc, 270 .ue_mii_upd = muge_ifmedia_upd, 271 .ue_mii_sts = muge_ifmedia_sts, 272 }; 273 274 /** 275 * lan78xx_read_reg - Read a 32-bit register on the device 276 * @sc: driver soft context 277 * @off: offset of the register 278 * @data: pointer a value that will be populated with the register value 279 * 280 * LOCKING: 281 * The device lock must be held before calling this function. 282 * 283 * RETURNS: 284 * 0 on success, a USB_ERR_?? error code on failure. 285 */ 286 static int 287 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 288 { 289 struct usb_device_request req; 290 uint32_t buf; 291 usb_error_t err; 292 293 MUGE_LOCK_ASSERT(sc, MA_OWNED); 294 295 req.bmRequestType = UT_READ_VENDOR_DEVICE; 296 req.bRequest = UVR_READ_REG; 297 USETW(req.wValue, 0); 298 USETW(req.wIndex, off); 299 USETW(req.wLength, 4); 300 301 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 302 if (err != 0) 303 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 304 *data = le32toh(buf); 305 return (err); 306 } 307 308 /** 309 * lan78xx_write_reg - Write a 32-bit register on the device 310 * @sc: driver soft context 311 * @off: offset of the register 312 * @data: the 32-bit value to write into the register 313 * 314 * LOCKING: 315 * The device lock must be held before calling this function. 316 * 317 * RETURNS: 318 * 0 on success, a USB_ERR_?? error code on failure. 319 */ 320 static int 321 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 322 { 323 struct usb_device_request req; 324 uint32_t buf; 325 usb_error_t err; 326 327 MUGE_LOCK_ASSERT(sc, MA_OWNED); 328 329 buf = htole32(data); 330 331 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 332 req.bRequest = UVR_WRITE_REG; 333 USETW(req.wValue, 0); 334 USETW(req.wIndex, off); 335 USETW(req.wLength, 4); 336 337 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 338 if (err != 0) 339 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 340 return (err); 341 } 342 343 /** 344 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 345 * @sc: soft context 346 * @reg: offset of the register 347 * @bits: if the bits are clear the function returns 348 * 349 * LOCKING: 350 * The device lock must be held before calling this function. 351 * 352 * RETURNS: 353 * 0 on success, or a USB_ERR_?? error code on failure. 354 */ 355 static int 356 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 357 { 358 usb_ticks_t start_ticks; 359 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 360 uint32_t val; 361 int err; 362 363 MUGE_LOCK_ASSERT(sc, MA_OWNED); 364 365 start_ticks = (usb_ticks_t)ticks; 366 do { 367 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 368 return (err); 369 if (!(val & bits)) 370 return (0); 371 uether_pause(&sc->sc_ue, hz / 100); 372 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 373 374 return (USB_ERR_TIMEOUT); 375 } 376 377 /** 378 * lan78xx_eeprom_read_raw - Read the attached EEPROM 379 * @sc: soft context 380 * @off: the eeprom address offset 381 * @buf: stores the bytes 382 * @buflen: the number of bytes to read 383 * 384 * Simply reads bytes from an attached eeprom. 385 * 386 * LOCKING: 387 * The function takes and releases the device lock if not already held. 388 * 389 * RETURNS: 390 * 0 on success, or a USB_ERR_?? error code on failure. 391 */ 392 static int 393 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 394 uint16_t buflen) 395 { 396 usb_ticks_t start_ticks; 397 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 398 int err, locked; 399 uint32_t val, saved; 400 uint16_t i; 401 402 locked = mtx_owned(&sc->sc_mtx); /* XXX */ 403 if (!locked) 404 MUGE_LOCK(sc); 405 406 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 407 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 408 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 409 saved = val; 410 411 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 412 err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 413 } 414 415 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 416 if (err != 0) { 417 muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 418 goto done; 419 } 420 421 /* Start reading the bytes, one at a time. */ 422 for (i = 0; i < buflen; i++) { 423 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 424 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 425 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 426 goto done; 427 428 start_ticks = (usb_ticks_t)ticks; 429 do { 430 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 431 0) 432 goto done; 433 if (!(val & ETH_E2P_CMD_BUSY_) || 434 (val & ETH_E2P_CMD_TIMEOUT_)) 435 break; 436 437 uether_pause(&sc->sc_ue, hz / 100); 438 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 439 440 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 441 muge_warn_printf(sc, "eeprom command failed\n"); 442 err = USB_ERR_IOERROR; 443 break; 444 } 445 446 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 447 goto done; 448 449 buf[i] = (val & 0xff); 450 } 451 452 done: 453 if (!locked) 454 MUGE_UNLOCK(sc); 455 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 456 /* Restore saved LED configuration. */ 457 lan78xx_write_reg(sc, ETH_HW_CFG, saved); 458 } 459 return (err); 460 } 461 462 static bool 463 lan78xx_eeprom_present(struct muge_softc *sc) 464 { 465 int ret; 466 uint8_t sig; 467 468 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 469 return (ret == 0 && sig == ETH_E2P_INDICATOR); 470 } 471 472 /** 473 * lan78xx_otp_read_raw 474 * @sc: soft context 475 * @off: the otp address offset 476 * @buf: stores the bytes 477 * @buflen: the number of bytes to read 478 * 479 * Simply reads bytes from the OTP. 480 * 481 * LOCKING: 482 * The function takes and releases the device lock if not already held. 483 * 484 * RETURNS: 485 * 0 on success, or a USB_ERR_?? error code on failure. 486 * 487 */ 488 static int 489 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 490 uint16_t buflen) 491 { 492 int locked, err; 493 uint32_t val; 494 uint16_t i; 495 locked = mtx_owned(&sc->sc_mtx); 496 if (!locked) 497 MUGE_LOCK(sc); 498 499 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 500 501 /* Checking if bit is set. */ 502 if (val & OTP_PWR_DN_PWRDN_N) { 503 /* Clear it, then wait for it to be cleared. */ 504 lan78xx_write_reg(sc, OTP_PWR_DN, 0); 505 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 506 if (err != 0) { 507 muge_warn_printf(sc, "OTP off? failed to read data\n"); 508 goto done; 509 } 510 } 511 /* Start reading the bytes, one at a time. */ 512 for (i = 0; i < buflen; i++) { 513 err = lan78xx_write_reg(sc, OTP_ADDR1, 514 ((off + i) >> 8) & OTP_ADDR1_15_11); 515 err = lan78xx_write_reg(sc, OTP_ADDR2, 516 ((off + i) & OTP_ADDR2_10_3)); 517 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 518 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 519 520 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 521 if (err != 0) { 522 muge_warn_printf(sc, "OTP busy failed to read data\n"); 523 goto done; 524 } 525 526 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 527 goto done; 528 529 buf[i] = (uint8_t)(val & 0xff); 530 } 531 532 done: 533 if (!locked) 534 MUGE_UNLOCK(sc); 535 return (err); 536 } 537 538 /** 539 * lan78xx_otp_read 540 * @sc: soft context 541 * @off: the otp address offset 542 * @buf: stores the bytes 543 * @buflen: the number of bytes to read 544 * 545 * Simply reads bytes from the otp. 546 * 547 * LOCKING: 548 * The function takes and releases device lock if it is not already held. 549 * 550 * RETURNS: 551 * 0 on success, or a USB_ERR_?? error code on failure. 552 */ 553 static int 554 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 555 uint16_t buflen) 556 { 557 uint8_t sig; 558 int err; 559 560 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 561 if (err == 0) { 562 if (sig == OTP_INDICATOR_1) { 563 } else if (sig == OTP_INDICATOR_2) { 564 off += 0x100; /* XXX */ 565 } else { 566 err = -EINVAL; 567 } 568 if (!err) 569 err = lan78xx_otp_read_raw(sc, off, buf, buflen); 570 } 571 return (err); 572 } 573 574 /** 575 * lan78xx_setmacaddress - Set the mac address in the device 576 * @sc: driver soft context 577 * @addr: pointer to array contain at least 6 bytes of the mac 578 * 579 * LOCKING: 580 * Should be called with the MUGE lock held. 581 * 582 * RETURNS: 583 * Returns 0 on success or a negative error code. 584 */ 585 static int 586 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 587 { 588 int err; 589 uint32_t val; 590 591 muge_dbg_printf(sc, 592 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 593 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 594 595 MUGE_LOCK_ASSERT(sc, MA_OWNED); 596 597 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 598 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 599 goto done; 600 601 val = (addr[5] << 8) | addr[4]; 602 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 603 604 done: 605 return (err); 606 } 607 608 /** 609 * lan78xx_set_rx_max_frame_length 610 * @sc: driver soft context 611 * @size: pointer to array contain at least 6 bytes of the mac 612 * 613 * Sets the maximum frame length to be received. Frames bigger than 614 * this size are aborted. 615 * 616 * RETURNS: 617 * Returns 0 on success or a negative error code. 618 */ 619 static int 620 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 621 { 622 int err = 0; 623 uint32_t buf; 624 bool rxenabled; 625 626 /* First we have to disable rx before changing the length. */ 627 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 628 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 629 630 if (rxenabled) { 631 buf &= ~ETH_MAC_RX_EN_; 632 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 633 } 634 635 /* Setting max frame length. */ 636 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 637 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 638 ETH_MAC_RX_MAX_FR_SIZE_MASK_); 639 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 640 641 /* If it were enabled before, we enable it back. */ 642 643 if (rxenabled) { 644 buf |= ETH_MAC_RX_EN_; 645 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 646 } 647 648 return (0); 649 } 650 651 /** 652 * lan78xx_miibus_readreg - Read a MII/MDIO register 653 * @dev: usb ether device 654 * @phy: the number of phy reading from 655 * @reg: the register address 656 * 657 * LOCKING: 658 * Takes and releases the device mutex lock if not already held. 659 * 660 * RETURNS: 661 * Returns the 16-bits read from the MII register, if this function fails 662 * 0 is returned. 663 */ 664 static int 665 lan78xx_miibus_readreg(device_t dev, int phy, int reg) { 666 667 struct muge_softc *sc = device_get_softc(dev); 668 int locked; 669 uint32_t addr, val; 670 671 val = 0; 672 locked = mtx_owned(&sc->sc_mtx); 673 if (!locked) 674 MUGE_LOCK(sc); 675 676 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 677 0) { 678 muge_warn_printf(sc, "MII is busy\n"); 679 goto done; 680 } 681 682 addr = (phy << 11) | (reg << 6) | 683 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 684 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 685 686 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 687 0) { 688 muge_warn_printf(sc, "MII read timeout\n"); 689 goto done; 690 } 691 692 lan78xx_read_reg(sc, ETH_MII_DATA, &val); 693 val = le32toh(val); 694 695 done: 696 if (!locked) 697 MUGE_UNLOCK(sc); 698 699 return (val & 0xFFFF); 700 } 701 702 /** 703 * lan78xx_miibus_writereg - Writes a MII/MDIO register 704 * @dev: usb ether device 705 * @phy: the number of phy writing to 706 * @reg: the register address 707 * @val: the value to write 708 * 709 * Attempts to write a PHY register through the usb controller registers. 710 * 711 * LOCKING: 712 * Takes and releases the device mutex lock if not already held. 713 * 714 * RETURNS: 715 * Always returns 0 regardless of success or failure. 716 */ 717 static int 718 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 719 { 720 struct muge_softc *sc = device_get_softc(dev); 721 int locked; 722 uint32_t addr; 723 724 if (sc->sc_phyno != phy) 725 return (0); 726 727 locked = mtx_owned(&sc->sc_mtx); 728 if (!locked) 729 MUGE_LOCK(sc); 730 731 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 732 0) { 733 muge_warn_printf(sc, "MII is busy\n"); 734 goto done; 735 } 736 737 val = htole32(val); 738 lan78xx_write_reg(sc, ETH_MII_DATA, val); 739 740 addr = (phy << 11) | (reg << 6) | 741 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 742 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 743 744 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 745 muge_warn_printf(sc, "MII write timeout\n"); 746 747 done: 748 if (!locked) 749 MUGE_UNLOCK(sc); 750 return (0); 751 } 752 753 /* 754 * lan78xx_miibus_statchg - Called to detect phy status change 755 * @dev: usb ether device 756 * 757 * This function is called periodically by the system to poll for status 758 * changes of the link. 759 * 760 * LOCKING: 761 * Takes and releases the device mutex lock if not already held. 762 */ 763 static void 764 lan78xx_miibus_statchg(device_t dev) 765 { 766 struct muge_softc *sc = device_get_softc(dev); 767 struct mii_data *mii = uether_getmii(&sc->sc_ue); 768 struct ifnet *ifp; 769 int locked; 770 int err; 771 uint32_t flow = 0; 772 uint32_t fct_flow = 0; 773 774 locked = mtx_owned(&sc->sc_mtx); 775 if (!locked) 776 MUGE_LOCK(sc); 777 778 ifp = uether_getifp(&sc->sc_ue); 779 if (mii == NULL || ifp == NULL || 780 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 781 goto done; 782 783 /* Use the MII status to determine link status */ 784 sc->sc_flags &= ~MUGE_FLAG_LINK; 785 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 786 (IFM_ACTIVE | IFM_AVALID)) { 787 muge_dbg_printf(sc, "media is active\n"); 788 switch (IFM_SUBTYPE(mii->mii_media_active)) { 789 case IFM_10_T: 790 case IFM_100_TX: 791 sc->sc_flags |= MUGE_FLAG_LINK; 792 muge_dbg_printf(sc, "10/100 ethernet\n"); 793 break; 794 case IFM_1000_T: 795 sc->sc_flags |= MUGE_FLAG_LINK; 796 muge_dbg_printf(sc, "Gigabit ethernet\n"); 797 break; 798 default: 799 break; 800 } 801 } 802 /* Lost link, do nothing. */ 803 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 804 muge_dbg_printf(sc, "link flag not set\n"); 805 goto done; 806 } 807 808 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 809 if (err) { 810 muge_warn_printf(sc, 811 "failed to read initial flow control thresholds, error %d\n", 812 err); 813 goto done; 814 } 815 816 /* Enable/disable full duplex operation and TX/RX pause. */ 817 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 818 muge_dbg_printf(sc, "full duplex operation\n"); 819 820 /* Enable transmit MAC flow control function. */ 821 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 822 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 823 824 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 825 flow |= ETH_FLOW_CR_RX_FCEN_; 826 } 827 828 /* XXX Flow control settings obtained from Microchip's driver. */ 829 switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 830 case USB_SPEED_SUPER: 831 fct_flow = 0x817; 832 break; 833 case USB_SPEED_HIGH: 834 fct_flow = 0x211; 835 break; 836 default: 837 break; 838 } 839 840 err += lan78xx_write_reg(sc, ETH_FLOW, flow); 841 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 842 if (err) 843 muge_warn_printf(sc, "media change failed, error %d\n", err); 844 845 done: 846 if (!locked) 847 MUGE_UNLOCK(sc); 848 } 849 850 /* 851 * lan78xx_set_mdix_auto - Configure the device to enable automatic 852 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 853 * functionality for seamless crossover and polarity detection. 854 * 855 * @sc: driver soft context 856 * 857 * LOCKING: 858 * Takes and releases the device mutex lock if not already held. 859 */ 860 static void 861 lan78xx_set_mdix_auto(struct muge_softc *sc) 862 { 863 uint32_t buf, err; 864 865 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 866 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 867 868 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 869 MUGE_EXT_MODE_CTRL); 870 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 871 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 872 873 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 874 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 875 MUGE_EXT_MODE_CTRL, buf); 876 877 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 878 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 879 880 if (err != 0) 881 muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 882 883 sc->sc_mdix_ctl = buf; 884 } 885 886 /** 887 * lan78xx_phy_init - Initialises the in-built MUGE phy 888 * @sc: driver soft context 889 * 890 * Resets the PHY part of the chip and then initialises it to default 891 * values. The 'link down' and 'auto-negotiation complete' interrupts 892 * from the PHY are also enabled, however we don't monitor the interrupt 893 * endpoints for the moment. 894 * 895 * RETURNS: 896 * Returns 0 on success or EIO if failed to reset the PHY. 897 */ 898 static int 899 lan78xx_phy_init(struct muge_softc *sc) 900 { 901 muge_dbg_printf(sc, "Initializing PHY.\n"); 902 uint16_t bmcr, lmsr; 903 usb_ticks_t start_ticks; 904 uint32_t hw_reg; 905 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 906 907 MUGE_LOCK_ASSERT(sc, MA_OWNED); 908 909 /* Reset phy and wait for reset to complete. */ 910 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 911 BMCR_RESET); 912 913 start_ticks = ticks; 914 do { 915 uether_pause(&sc->sc_ue, hz / 100); 916 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 917 MII_BMCR); 918 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 919 920 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 921 muge_err_printf(sc, "PHY reset timed-out\n"); 922 return (EIO); 923 } 924 925 /* Setup phy to interrupt upon link down or autoneg completion. */ 926 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 927 MUGE_PHY_INTR_STAT); 928 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 929 MUGE_PHY_INTR_MASK, 930 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 931 932 /* Enable Auto-MDIX for crossover and polarity detection. */ 933 lan78xx_set_mdix_auto(sc); 934 935 /* Enable all modes. */ 936 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 937 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 938 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 939 940 /* Restart auto-negotation. */ 941 bmcr |= BMCR_STARTNEG; 942 bmcr |= BMCR_AUTOEN; 943 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 944 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 945 946 /* Configure LED Modes. */ 947 if (sc->sc_led_modes_mask != 0) { 948 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 949 MUGE_PHY_LED_MODE); 950 lmsr &= ~sc->sc_led_modes_mask; 951 lmsr |= sc->sc_led_modes; 952 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 953 MUGE_PHY_LED_MODE, lmsr); 954 } 955 956 /* Enable appropriate LEDs. */ 957 if (sc->sc_leds != 0 && 958 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 959 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 960 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 961 hw_reg |= sc->sc_leds; 962 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 963 } 964 return (0); 965 } 966 967 /** 968 * lan78xx_chip_init - Initialises the chip after power on 969 * @sc: driver soft context 970 * 971 * This initialisation sequence is modelled on the procedure in the Linux 972 * driver. 973 * 974 * RETURNS: 975 * Returns 0 on success or an error code on failure. 976 */ 977 static int 978 lan78xx_chip_init(struct muge_softc *sc) 979 { 980 int err; 981 uint32_t buf; 982 uint32_t burst_cap; 983 984 MUGE_LOCK_ASSERT(sc, MA_OWNED); 985 986 /* Enter H/W config mode. */ 987 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 988 989 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 990 0) { 991 muge_warn_printf(sc, 992 "timed-out waiting for lite reset to complete\n"); 993 goto init_failed; 994 } 995 996 /* Set the mac address. */ 997 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 998 muge_warn_printf(sc, "failed to set the MAC address\n"); 999 goto init_failed; 1000 } 1001 1002 /* Read and display the revision register. */ 1003 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 1004 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 1005 err); 1006 goto init_failed; 1007 } 1008 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 1009 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 1010 switch (sc->chipid) { 1011 case ETH_ID_REV_CHIP_ID_7800_: 1012 case ETH_ID_REV_CHIP_ID_7850_: 1013 break; 1014 default: 1015 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 1016 sc->chipid); 1017 goto init_failed; 1018 } 1019 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 1020 sc->chiprev); 1021 1022 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 1023 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 1024 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1025 goto init_failed; 1026 } 1027 buf |= ETH_USB_CFG_BIR_; 1028 lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1029 1030 /* 1031 * XXX LTM support will go here. 1032 */ 1033 1034 /* Configuring the burst cap. */ 1035 switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1036 case USB_SPEED_SUPER: 1037 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1038 break; 1039 case USB_SPEED_HIGH: 1040 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1041 break; 1042 default: 1043 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1044 } 1045 1046 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1047 1048 /* Set the default bulk in delay (same value from Linux driver). */ 1049 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1050 1051 /* Multiple ethernet frames per USB packets. */ 1052 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 1053 buf |= ETH_HW_CFG_MEF_; 1054 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1055 1056 /* Enable burst cap. */ 1057 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 1058 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1059 err); 1060 goto init_failed; 1061 } 1062 buf |= ETH_USB_CFG_BCE_; 1063 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1064 1065 /* 1066 * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1067 * already the default value. But we initialize it to the same value 1068 * anyways, as that's what the Linux driver does. 1069 * 1070 */ 1071 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 1072 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1073 1074 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 1075 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1076 1077 /* Enabling interrupts. (Not using them for now) */ 1078 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1079 1080 /* 1081 * Initializing flow control registers to 0. These registers are 1082 * properly set is handled in link-reset function in the Linux driver. 1083 */ 1084 err = lan78xx_write_reg(sc, ETH_FLOW, 0); 1085 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1086 1087 /* 1088 * Settings for the RFE, we enable broadcast and destination address 1089 * perfect filtering. 1090 */ 1091 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 1092 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 1093 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1094 1095 /* 1096 * At this point the Linux driver writes multicast tables, and enables 1097 * checksum engines. But in FreeBSD that gets done in muge_init, 1098 * which gets called when the interface is brought up. 1099 */ 1100 1101 /* Reset the PHY. */ 1102 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 1103 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 1104 ETH_PMT_CTL_PHY_RST_)) != 0) { 1105 muge_warn_printf(sc, 1106 "timed-out waiting for phy reset to complete\n"); 1107 goto init_failed; 1108 } 1109 1110 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 1111 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 1112 !lan78xx_eeprom_present(sc)) { 1113 /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 1114 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 1115 } 1116 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1117 1118 /* 1119 * Enable PHY interrupts (Not really getting used for now) 1120 * ETH_INT_EP_CTL: interrupt endpoint control register 1121 * phy events cause interrupts to be issued 1122 */ 1123 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 1124 buf |= ETH_INT_ENP_PHY_INT; 1125 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1126 1127 /* 1128 * Enables mac's transmitter. It will transmit frames from the buffer 1129 * onto the cable. 1130 */ 1131 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 1132 buf |= ETH_MAC_TX_TXEN_; 1133 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1134 1135 /* FIFO is capable of transmitting frames to MAC. */ 1136 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 1137 buf |= ETH_FCT_TX_CTL_EN_; 1138 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1139 1140 /* 1141 * Set max frame length. In linux this is dev->mtu (which by default 1142 * is 1500) + VLAN_ETH_HLEN = 1518. 1143 */ 1144 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1145 1146 /* Initialise the PHY. */ 1147 if ((err = lan78xx_phy_init(sc)) != 0) 1148 goto init_failed; 1149 1150 /* Enable MAC RX. */ 1151 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 1152 buf |= ETH_MAC_RX_EN_; 1153 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1154 1155 /* Enable FIFO controller RX. */ 1156 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 1157 buf |= ETH_FCT_TX_CTL_EN_; 1158 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1159 1160 sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1161 return (0); 1162 1163 init_failed: 1164 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1165 return (err); 1166 } 1167 1168 static void 1169 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1170 { 1171 struct muge_softc *sc = usbd_xfer_softc(xfer); 1172 struct usb_ether *ue = &sc->sc_ue; 1173 struct ifnet *ifp = uether_getifp(ue); 1174 struct mbuf *m; 1175 struct usb_page_cache *pc; 1176 uint16_t pktlen; 1177 uint32_t rx_cmd_a, rx_cmd_b; 1178 uint16_t rx_cmd_c; 1179 int off; 1180 int actlen; 1181 1182 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1183 muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1184 1185 switch (USB_GET_STATE(xfer)) { 1186 case USB_ST_TRANSFERRED: 1187 1188 /* 1189 * There is always a zero length frame after bringing the 1190 * interface up. 1191 */ 1192 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1193 goto tr_setup; 1194 1195 /* 1196 * There may be multiple packets in the USB frame. Each will 1197 * have a header and each needs to have its own mbuf allocated 1198 * and populated for it. 1199 */ 1200 pc = usbd_xfer_get_frame(xfer, 0); 1201 off = 0; 1202 1203 while (off < actlen) { 1204 1205 /* The frame header is aligned on a 4 byte boundary. */ 1206 off = ((off + 0x3) & ~0x3); 1207 1208 /* Extract RX CMD A. */ 1209 if (off + sizeof(rx_cmd_a) > actlen) 1210 goto tr_setup; 1211 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1212 off += (sizeof(rx_cmd_a)); 1213 rx_cmd_a = le32toh(rx_cmd_a); 1214 1215 1216 /* Extract RX CMD B. */ 1217 if (off + sizeof(rx_cmd_b) > actlen) 1218 goto tr_setup; 1219 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1220 off += (sizeof(rx_cmd_b)); 1221 rx_cmd_b = le32toh(rx_cmd_b); 1222 1223 1224 /* Extract RX CMD C. */ 1225 if (off + sizeof(rx_cmd_c) > actlen) 1226 goto tr_setup; 1227 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1228 off += (sizeof(rx_cmd_c)); 1229 rx_cmd_c = le16toh(rx_cmd_c); 1230 1231 if (off > actlen) 1232 goto tr_setup; 1233 1234 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1235 1236 muge_dbg_printf(sc, 1237 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1238 " pktlen %d actlen %d off %d\n", 1239 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1240 1241 if (rx_cmd_a & RX_CMD_A_RED_) { 1242 muge_dbg_printf(sc, 1243 "rx error (hdr 0x%08x)\n", rx_cmd_a); 1244 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1245 } else { 1246 /* Ethernet frame too big or too small? */ 1247 if ((pktlen < ETHER_HDR_LEN) || 1248 (pktlen > (actlen - off))) 1249 goto tr_setup; 1250 1251 /* Create a new mbuf to store the packet. */ 1252 m = uether_newbuf(); 1253 if (m == NULL) { 1254 muge_warn_printf(sc, 1255 "failed to create new mbuf\n"); 1256 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1257 1); 1258 goto tr_setup; 1259 } 1260 1261 usbd_copy_out(pc, off, mtod(m, uint8_t *), 1262 pktlen); 1263 1264 /* 1265 * Check if RX checksums are computed, and 1266 * offload them 1267 */ 1268 if ((ifp->if_capabilities & IFCAP_RXCSUM) && 1269 !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1270 struct ether_header *eh; 1271 eh = mtod(m, struct ether_header *); 1272 /* 1273 * Remove the extra 2 bytes of the csum 1274 * 1275 * The checksum appears to be 1276 * simplistically calculated over the 1277 * protocol headers up to the end of the 1278 * eth frame. Which means if the eth 1279 * frame is padded the csum calculation 1280 * is incorrectly performed over the 1281 * padding bytes as well. Therefore to 1282 * be safe we ignore the H/W csum on 1283 * frames less than or equal to 1284 * 64 bytes. 1285 * 1286 * Protocols checksummed: 1287 * TCP, UDP, ICMP, IGMP, IP 1288 */ 1289 if (pktlen > ETHER_MIN_LEN) { 1290 m->m_pkthdr.csum_flags |= 1291 CSUM_DATA_VALID; 1292 1293 /* 1294 * Copy the checksum from the 1295 * last 2 bytes of the transfer 1296 * and put in the csum_data 1297 * field. 1298 */ 1299 usbd_copy_out(pc, 1300 (off + pktlen), 1301 &m->m_pkthdr.csum_data, 2); 1302 1303 /* 1304 * The data is copied in network 1305 * order, but the csum algorithm 1306 * in the kernel expects it to 1307 * be in host network order. 1308 */ 1309 m->m_pkthdr.csum_data = 1310 ntohs(m->m_pkthdr.csum_data); 1311 1312 muge_dbg_printf(sc, 1313 "RX checksum offloaded (0x%04x)\n", 1314 m->m_pkthdr.csum_data); 1315 } 1316 } 1317 1318 /* Enqueue the mbuf on the receive queue. */ 1319 if (pktlen < (4 + ETHER_HDR_LEN)) { 1320 m_freem(m); 1321 goto tr_setup; 1322 } 1323 /* Remove 4 trailing bytes */ 1324 uether_rxmbuf(ue, m, pktlen - 4); 1325 } 1326 1327 /* 1328 * Update the offset to move to the next potential 1329 * packet. 1330 */ 1331 off += pktlen; 1332 } 1333 1334 /* FALLTHROUGH */ 1335 case USB_ST_SETUP: 1336 tr_setup: 1337 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1338 usbd_transfer_submit(xfer); 1339 uether_rxflush(ue); 1340 return; 1341 1342 default: 1343 if (error != USB_ERR_CANCELLED) { 1344 muge_warn_printf(sc, "bulk read error, %s\n", 1345 usbd_errstr(error)); 1346 usbd_xfer_set_stall(xfer); 1347 goto tr_setup; 1348 } 1349 return; 1350 } 1351 } 1352 1353 /** 1354 * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1355 * @xfer: the USB transfer 1356 * @error: error code if the transfers is in an errored state 1357 * 1358 * The main write function that pulls ethernet frames off the queue and 1359 * sends them out. 1360 * 1361 */ 1362 static void 1363 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1364 { 1365 struct muge_softc *sc = usbd_xfer_softc(xfer); 1366 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1367 struct usb_page_cache *pc; 1368 struct mbuf *m; 1369 int nframes; 1370 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1371 1372 switch (USB_GET_STATE(xfer)) { 1373 case USB_ST_TRANSFERRED: 1374 muge_dbg_printf(sc, 1375 "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1376 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1377 /* FALLTHROUGH */ 1378 case USB_ST_SETUP: 1379 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1380 tr_setup: 1381 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1382 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1383 muge_dbg_printf(sc, 1384 "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1385 (sc->sc_flags & MUGE_FLAG_LINK)); 1386 muge_dbg_printf(sc, 1387 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1388 (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1389 muge_dbg_printf(sc, 1390 "USB TRANSFER not sending: no link or controller is busy \n"); 1391 /* 1392 * Don't send anything if there is no link or 1393 * controller is busy. 1394 */ 1395 return; 1396 } 1397 for (nframes = 0; nframes < 16 && 1398 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1399 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1400 if (m == NULL) 1401 break; 1402 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1403 nframes); 1404 frm_len = 0; 1405 pc = usbd_xfer_get_frame(xfer, nframes); 1406 1407 /* 1408 * Each frame is prefixed with two 32-bit values 1409 * describing the length of the packet and buffer. 1410 */ 1411 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1412 TX_CMD_A_FCS_; 1413 tx_cmd_a = htole32(tx_cmd_a); 1414 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1415 1416 tx_cmd_b = 0; 1417 1418 /* TCP LSO Support will probably be implemented here. */ 1419 tx_cmd_b = htole32(tx_cmd_b); 1420 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1421 1422 frm_len += 8; 1423 1424 /* Next copy in the actual packet */ 1425 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1426 frm_len += m->m_pkthdr.len; 1427 1428 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1429 1430 /* 1431 * If there's a BPF listener, bounce a copy of this 1432 * frame to it. 1433 */ 1434 BPF_MTAP(ifp, m); 1435 m_freem(m); 1436 1437 /* Set frame length. */ 1438 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1439 } 1440 1441 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1442 if (nframes != 0) { 1443 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1444 usbd_xfer_set_frames(xfer, nframes); 1445 usbd_transfer_submit(xfer); 1446 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1447 } 1448 return; 1449 1450 default: 1451 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1452 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1453 1454 if (error != USB_ERR_CANCELLED) { 1455 muge_err_printf(sc, 1456 "usb error on tx: %s\n", usbd_errstr(error)); 1457 usbd_xfer_set_stall(xfer); 1458 goto tr_setup; 1459 } 1460 return; 1461 } 1462 } 1463 1464 /** 1465 * muge_set_mac_addr - Initiailizes NIC MAC address 1466 * @ue: the USB ethernet device 1467 * 1468 * Tries to obtain MAC address from number of sources: registers, 1469 * EEPROM, DTB blob. If all sources fail - generates random MAC. 1470 */ 1471 static void 1472 muge_set_mac_addr(struct usb_ether *ue) 1473 { 1474 struct muge_softc *sc = uether_getsc(ue); 1475 uint32_t mac_h, mac_l; 1476 1477 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1478 1479 uint32_t val; 1480 lan78xx_read_reg(sc, 0, &val); 1481 1482 /* Read current MAC address from RX_ADDRx registers. */ 1483 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 1484 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1485 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1486 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1487 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1488 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1489 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1490 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1491 } 1492 1493 /* 1494 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1495 * doesn't work, try OTP. Whether any of these methods work or not, try 1496 * FDT data, because it is allowed to override the EEPROM/OTP values. 1497 */ 1498 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1499 muge_dbg_printf(sc, "MAC assigned from registers\n"); 1500 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1501 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1502 ETHER_IS_VALID(ue->ue_eaddr)) { 1503 muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1504 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1505 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1506 muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1507 } 1508 1509 #ifdef FDT 1510 /* ue->ue_eaddr modified only if config exists for this dev instance. */ 1511 usb_fdt_get_mac_addr(ue->ue_dev, ue); 1512 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1513 muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1514 } 1515 #endif 1516 1517 if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1518 muge_dbg_printf(sc, "MAC assigned randomly\n"); 1519 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1520 ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1521 ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1522 } 1523 } 1524 1525 /** 1526 * muge_set_leds - Initializes NIC LEDs pattern 1527 * @ue: the USB ethernet device 1528 * 1529 * Tries to store the LED modes. 1530 * Supports only DTB blob like the Linux driver does. 1531 */ 1532 static void 1533 muge_set_leds(struct usb_ether *ue) 1534 { 1535 #ifdef FDT 1536 struct muge_softc *sc = uether_getsc(ue); 1537 phandle_t node; 1538 pcell_t modes[4]; /* 4 LEDs are possible */ 1539 ssize_t proplen; 1540 uint32_t count; 1541 1542 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1543 (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1544 sizeof(modes))) > 0) { 1545 count = proplen / sizeof( uint32_t ); 1546 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 1547 (count > 1) * ETH_HW_CFG_LED1_EN_ | 1548 (count > 2) * ETH_HW_CFG_LED2_EN_ | 1549 (count > 3) * ETH_HW_CFG_LED3_EN_; 1550 while (count-- > 0) { 1551 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 1552 sc->sc_led_modes_mask |= 0xf << (4 * count); 1553 } 1554 muge_dbg_printf(sc, "LED modes set from FDT data\n"); 1555 } 1556 #endif 1557 } 1558 1559 /** 1560 * muge_attach_post - Called after the driver attached to the USB interface 1561 * @ue: the USB ethernet device 1562 * 1563 * This is where the chip is intialised for the first time. This is 1564 * different from the muge_init() function in that that one is designed to 1565 * setup the H/W to match the UE settings and can be called after a reset. 1566 * 1567 */ 1568 static void 1569 muge_attach_post(struct usb_ether *ue) 1570 { 1571 struct muge_softc *sc = uether_getsc(ue); 1572 1573 muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1574 1575 /* Setup some of the basics */ 1576 sc->sc_phyno = 1; 1577 1578 muge_set_mac_addr(ue); 1579 muge_set_leds(ue); 1580 1581 /* Initialise the chip for the first time */ 1582 lan78xx_chip_init(sc); 1583 } 1584 1585 /** 1586 * muge_attach_post_sub - Called after attach to the USB interface 1587 * @ue: the USB ethernet device 1588 * 1589 * Most of this is boilerplate code and copied from the base USB ethernet 1590 * driver. It has been overriden so that we can indicate to the system 1591 * that the chip supports H/W checksumming. 1592 * 1593 * RETURNS: 1594 * Returns 0 on success or a negative error code. 1595 */ 1596 static int 1597 muge_attach_post_sub(struct usb_ether *ue) 1598 { 1599 struct muge_softc *sc; 1600 struct ifnet *ifp; 1601 int error; 1602 1603 sc = uether_getsc(ue); 1604 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1605 ifp = ue->ue_ifp; 1606 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1607 ifp->if_start = uether_start; 1608 ifp->if_ioctl = muge_ioctl; 1609 ifp->if_init = uether_init; 1610 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1611 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1612 IFQ_SET_READY(&ifp->if_snd); 1613 1614 /* 1615 * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1616 * however currently only RX checksum is supported in the driver 1617 * (see top of file). 1618 */ 1619 ifp->if_capabilities |= IFCAP_VLAN_MTU; 1620 ifp->if_hwassist = 0; 1621 if (MUGE_DEFAULT_RX_CSUM_ENABLE) 1622 ifp->if_capabilities |= IFCAP_RXCSUM; 1623 1624 if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1625 ifp->if_capabilities |= IFCAP_TXCSUM; 1626 1627 /* 1628 * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1629 * here, that's something related to socket buffers used in Linux. 1630 * FreeBSD doesn't have that as an interface feature. 1631 */ 1632 if (MUGE_DEFAULT_TSO_CSUM_ENABLE) 1633 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1634 1635 #if 0 1636 /* TX checksuming is disabled since not yet implemented. */ 1637 ifp->if_capabilities |= IFCAP_TXCSUM; 1638 ifp->if_capenable |= IFCAP_TXCSUM; 1639 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1640 #endif 1641 1642 ifp->if_capenable = ifp->if_capabilities; 1643 1644 mtx_lock(&Giant); 1645 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1646 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1647 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1648 mtx_unlock(&Giant); 1649 1650 return (0); 1651 } 1652 1653 /** 1654 * muge_start - Starts communication with the LAN78xx chip 1655 * @ue: USB ether interface 1656 */ 1657 static void 1658 muge_start(struct usb_ether *ue) 1659 { 1660 struct muge_softc *sc = uether_getsc(ue); 1661 1662 /* 1663 * Start the USB transfers, if not already started. 1664 */ 1665 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1666 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1667 } 1668 1669 /** 1670 * muge_ioctl - ioctl function for the device 1671 * @ifp: interface pointer 1672 * @cmd: the ioctl command 1673 * @data: data passed in the ioctl call, typically a pointer to struct 1674 * ifreq. 1675 * 1676 * The ioctl routine is overridden to detect change requests for the H/W 1677 * checksum capabilities. 1678 * 1679 * RETURNS: 1680 * 0 on success and an error code on failure. 1681 */ 1682 static int 1683 muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1684 { 1685 struct usb_ether *ue = ifp->if_softc; 1686 struct muge_softc *sc; 1687 struct ifreq *ifr; 1688 int rc; 1689 int mask; 1690 int reinit; 1691 1692 if (cmd == SIOCSIFCAP) { 1693 sc = uether_getsc(ue); 1694 ifr = (struct ifreq *)data; 1695 1696 MUGE_LOCK(sc); 1697 1698 rc = 0; 1699 reinit = 0; 1700 1701 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1702 1703 /* Modify the RX CSUM enable bits. */ 1704 if ((mask & IFCAP_RXCSUM) != 0 && 1705 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1706 ifp->if_capenable ^= IFCAP_RXCSUM; 1707 1708 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1709 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1710 reinit = 1; 1711 } 1712 } 1713 1714 MUGE_UNLOCK(sc); 1715 if (reinit) 1716 uether_init(ue); 1717 1718 } else { 1719 rc = uether_ioctl(ifp, cmd, data); 1720 } 1721 1722 return (rc); 1723 } 1724 1725 /** 1726 * muge_reset - Reset the SMSC chip 1727 * @sc: device soft context 1728 * 1729 * LOCKING: 1730 * Should be called with the SMSC lock held. 1731 */ 1732 static void 1733 muge_reset(struct muge_softc *sc) 1734 { 1735 struct usb_config_descriptor *cd; 1736 usb_error_t err; 1737 1738 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1739 1740 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1741 cd->bConfigurationValue); 1742 if (err) 1743 muge_warn_printf(sc, "reset failed (ignored)\n"); 1744 1745 /* Wait a little while for the chip to get its brains in order. */ 1746 uether_pause(&sc->sc_ue, hz / 100); 1747 1748 /* Reinitialize controller to achieve full reset. */ 1749 lan78xx_chip_init(sc); 1750 } 1751 1752 /** 1753 * muge_set_addr_filter 1754 * 1755 * @sc: device soft context 1756 * @index: index of the entry to the perfect address table 1757 * @addr: address to be written 1758 * 1759 */ 1760 static void 1761 muge_set_addr_filter(struct muge_softc *sc, int index, 1762 uint8_t addr[ETHER_ADDR_LEN]) 1763 { 1764 uint32_t tmp; 1765 1766 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1767 tmp = addr[3]; 1768 tmp |= addr[2] | (tmp << 8); 1769 tmp |= addr[1] | (tmp << 8); 1770 tmp |= addr[0] | (tmp << 8); 1771 sc->sc_pfilter_table[index][1] = tmp; 1772 tmp = addr[5]; 1773 tmp |= addr[4] | (tmp << 8); 1774 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1775 sc->sc_pfilter_table[index][0] = tmp; 1776 } 1777 } 1778 1779 /** 1780 * lan78xx_dataport_write - write to the selected RAM 1781 * @sc: The device soft context. 1782 * @ram_select: Select which RAM to access. 1783 * @addr: Starting address to write to. 1784 * @buf: word-sized buffer to write to RAM, starting at @addr. 1785 * @length: length of @buf 1786 * 1787 * 1788 * RETURNS: 1789 * 0 if write successful. 1790 */ 1791 static int 1792 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1793 uint32_t addr, uint32_t length, uint32_t *buf) 1794 { 1795 uint32_t dp_sel; 1796 int i, ret; 1797 1798 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1799 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1800 if (ret < 0) 1801 goto done; 1802 1803 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1804 1805 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1806 dp_sel |= ram_select; 1807 1808 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1809 1810 for (i = 0; i < length; i++) { 1811 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 1812 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 1813 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 1814 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1815 if (ret != 0) 1816 goto done; 1817 } 1818 1819 done: 1820 return (ret); 1821 } 1822 1823 /** 1824 * muge_multicast_write 1825 * @sc: device's soft context 1826 * 1827 * Writes perfect addres filters and hash address filters to their 1828 * corresponding registers and RAMs. 1829 * 1830 */ 1831 static void 1832 muge_multicast_write(struct muge_softc *sc) 1833 { 1834 int i, ret; 1835 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 1836 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 1837 sc->sc_mchash_table); 1838 1839 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1840 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1841 ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1842 sc->sc_pfilter_table[i][1]); 1843 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1844 sc->sc_pfilter_table[i][0]); 1845 } 1846 } 1847 1848 /** 1849 * muge_hash - Calculate the hash of a mac address 1850 * @addr: The mac address to calculate the hash on 1851 * 1852 * This function is used when configuring a range of multicast mac 1853 * addresses to filter on. The hash of the mac address is put in the 1854 * device's mac hash table. 1855 * 1856 * RETURNS: 1857 * Returns a value from 0-63 value which is the hash of the mac address. 1858 */ 1859 static inline uint32_t 1860 muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1861 { 1862 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1863 } 1864 1865 /** 1866 * muge_setmulti - Setup multicast 1867 * @ue: usb ethernet device context 1868 * 1869 * Tells the device to either accept frames with a multicast mac address, 1870 * a select group of m'cast mac addresses or just the devices mac address. 1871 * 1872 * LOCKING: 1873 * Should be called with the MUGE lock held. 1874 */ 1875 static void 1876 muge_setmulti(struct usb_ether *ue) 1877 { 1878 struct muge_softc *sc = uether_getsc(ue); 1879 struct ifnet *ifp = uether_getifp(ue); 1880 uint8_t i, *addr; 1881 struct ifmultiaddr *ifma; 1882 1883 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1884 1885 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 1886 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1887 1888 /* Initialize hash filter table. */ 1889 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1890 sc->sc_mchash_table[i] = 0; 1891 1892 /* Initialize perfect filter table. */ 1893 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1894 sc->sc_pfilter_table[i][0] = 1895 sc->sc_pfilter_table[i][1] = 0; 1896 } 1897 1898 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1899 1900 if (ifp->if_flags & IFF_PROMISC) { 1901 muge_dbg_printf(sc, "promiscuous mode enabled\n"); 1902 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1903 } else if (ifp->if_flags & IFF_ALLMULTI){ 1904 muge_dbg_printf(sc, "receive all multicast enabled\n"); 1905 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1906 } else { 1907 /* Lock the mac address list before hashing each of them. */ 1908 if_maddr_rlock(ifp); 1909 if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) { 1910 i = 1; 1911 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, 1912 ifma_link) { 1913 /* First fill up the perfect address table. */ 1914 addr = LLADDR((struct sockaddr_dl *) 1915 ifma->ifma_addr); 1916 if (i < 33 /* XXX */) { 1917 muge_set_addr_filter(sc, i, addr); 1918 } else { 1919 uint32_t bitnum = muge_hash(addr); 1920 sc->sc_mchash_table[bitnum / 32] |= 1921 (1 << (bitnum % 32)); 1922 sc->sc_rfe_ctl |= 1923 ETH_RFE_CTL_MCAST_HASH_; 1924 } 1925 i++; 1926 } 1927 } 1928 if_maddr_runlock(ifp); 1929 muge_multicast_write(sc); 1930 } 1931 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1932 } 1933 1934 /** 1935 * muge_setpromisc - Enables/disables promiscuous mode 1936 * @ue: usb ethernet device context 1937 * 1938 * LOCKING: 1939 * Should be called with the MUGE lock held. 1940 */ 1941 static void 1942 muge_setpromisc(struct usb_ether *ue) 1943 { 1944 struct muge_softc *sc = uether_getsc(ue); 1945 struct ifnet *ifp = uether_getifp(ue); 1946 1947 muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1948 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1949 1950 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1951 1952 if (ifp->if_flags & IFF_PROMISC) 1953 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1954 else 1955 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1956 1957 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1958 } 1959 1960 /** 1961 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1962 * @sc: driver soft context 1963 * 1964 * LOCKING: 1965 * Should be called with the MUGE lock held. 1966 * 1967 * RETURNS: 1968 * Returns 0 on success or a negative error code. 1969 */ 1970 static int muge_sethwcsum(struct muge_softc *sc) 1971 { 1972 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1973 int err; 1974 1975 if (!ifp) 1976 return (-EIO); 1977 1978 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1979 1980 if (ifp->if_capabilities & IFCAP_RXCSUM) { 1981 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 1982 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1983 } else { 1984 sc->sc_rfe_ctl &= 1985 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 1986 sc->sc_rfe_ctl &= 1987 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1988 } 1989 1990 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1991 1992 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1993 1994 if (err != 0) { 1995 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 1996 err); 1997 return (err); 1998 } 1999 2000 return (0); 2001 } 2002 2003 /** 2004 * muge_ifmedia_upd - Set media options 2005 * @ifp: interface pointer 2006 * 2007 * Basically boilerplate code that simply calls the mii functions to set 2008 * the media options. 2009 * 2010 * LOCKING: 2011 * The device lock must be held before this function is called. 2012 * 2013 * RETURNS: 2014 * Returns 0 on success or a negative error code. 2015 */ 2016 static int 2017 muge_ifmedia_upd(struct ifnet *ifp) 2018 { 2019 struct muge_softc *sc = ifp->if_softc; 2020 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2021 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2022 struct mii_softc *miisc; 2023 int err; 2024 2025 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2026 2027 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2028 PHY_RESET(miisc); 2029 err = mii_mediachg(mii); 2030 return (err); 2031 } 2032 2033 /** 2034 * muge_init - Initialises the LAN95xx chip 2035 * @ue: USB ether interface 2036 * 2037 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2038 * initialise the interface and the rx/tx pipes. 2039 * 2040 * LOCKING: 2041 * Should be called with the MUGE lock held. 2042 */ 2043 static void 2044 muge_init(struct usb_ether *ue) 2045 { 2046 struct muge_softc *sc = uether_getsc(ue); 2047 muge_dbg_printf(sc, "Calling muge_init.\n"); 2048 struct ifnet *ifp = uether_getifp(ue); 2049 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2050 2051 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2052 muge_dbg_printf(sc, "setting MAC address failed\n"); 2053 2054 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2055 return; 2056 2057 /* Cancel pending I/O. */ 2058 muge_stop(ue); 2059 2060 /* Reset the ethernet interface. */ 2061 muge_reset(sc); 2062 2063 /* Load the multicast filter. */ 2064 muge_setmulti(ue); 2065 2066 /* TCP/UDP checksum offload engines. */ 2067 muge_sethwcsum(sc); 2068 2069 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2070 2071 /* Indicate we are up and running. */ 2072 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2073 2074 /* Switch to selected media. */ 2075 muge_ifmedia_upd(ifp); 2076 muge_start(ue); 2077 } 2078 2079 /** 2080 * muge_stop - Stops communication with the LAN78xx chip 2081 * @ue: USB ether interface 2082 */ 2083 static void 2084 muge_stop(struct usb_ether *ue) 2085 { 2086 struct muge_softc *sc = uether_getsc(ue); 2087 struct ifnet *ifp = uether_getifp(ue); 2088 2089 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2090 2091 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2092 sc->sc_flags &= ~MUGE_FLAG_LINK; 2093 2094 /* 2095 * Stop all the transfers, if not already stopped. 2096 */ 2097 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2098 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2099 } 2100 2101 /** 2102 * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2103 * @ue: USB ether interface 2104 * 2105 * Simply calls the mii status functions to check the state of the link. 2106 * 2107 * LOCKING: 2108 * Should be called with the MUGE lock held. 2109 */ 2110 static void 2111 muge_tick(struct usb_ether *ue) 2112 { 2113 2114 struct muge_softc *sc = uether_getsc(ue); 2115 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2116 2117 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2118 2119 mii_tick(mii); 2120 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2121 lan78xx_miibus_statchg(ue->ue_dev); 2122 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2123 muge_start(ue); 2124 } 2125 } 2126 2127 /** 2128 * muge_ifmedia_sts - Report current media status 2129 * @ifp: inet interface pointer 2130 * @ifmr: interface media request 2131 * 2132 * Call the mii functions to get the media status. 2133 * 2134 * LOCKING: 2135 * Internally takes and releases the device lock. 2136 */ 2137 static void 2138 muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2139 { 2140 struct muge_softc *sc = ifp->if_softc; 2141 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2142 2143 MUGE_LOCK(sc); 2144 mii_pollstat(mii); 2145 ifmr->ifm_active = mii->mii_media_active; 2146 ifmr->ifm_status = mii->mii_media_status; 2147 MUGE_UNLOCK(sc); 2148 } 2149 2150 /** 2151 * muge_probe - Probe the interface. 2152 * @dev: muge device handle 2153 * 2154 * Checks if the device is a match for this driver. 2155 * 2156 * RETURNS: 2157 * Returns 0 on success or an error code on failure. 2158 */ 2159 static int 2160 muge_probe(device_t dev) 2161 { 2162 struct usb_attach_arg *uaa = device_get_ivars(dev); 2163 2164 if (uaa->usb_mode != USB_MODE_HOST) 2165 return (ENXIO); 2166 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2167 return (ENXIO); 2168 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2169 return (ENXIO); 2170 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2171 } 2172 2173 /** 2174 * muge_attach - Attach the interface. 2175 * @dev: muge device handle 2176 * 2177 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2178 * 2179 * RETURNS: 2180 * Returns 0 on success or a negative error code. 2181 */ 2182 static int 2183 muge_attach(device_t dev) 2184 { 2185 struct usb_attach_arg *uaa = device_get_ivars(dev); 2186 struct muge_softc *sc = device_get_softc(dev); 2187 struct usb_ether *ue = &sc->sc_ue; 2188 uint8_t iface_index; 2189 int err; 2190 2191 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2192 2193 device_set_usb_desc(dev); 2194 2195 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2196 2197 /* Setup the endpoints for the Microchip LAN78xx device. */ 2198 iface_index = MUGE_IFACE_IDX; 2199 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2200 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2201 if (err) { 2202 device_printf(dev, "error: allocating USB transfers failed\n"); 2203 goto err; 2204 } 2205 2206 ue->ue_sc = sc; 2207 ue->ue_dev = dev; 2208 ue->ue_udev = uaa->device; 2209 ue->ue_mtx = &sc->sc_mtx; 2210 ue->ue_methods = &muge_ue_methods; 2211 2212 err = uether_ifattach(ue); 2213 if (err) { 2214 device_printf(dev, "error: could not attach interface\n"); 2215 goto err_usbd; 2216 } 2217 2218 /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 2219 uether_ifattach_wait(ue); 2220 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 2221 goto err_attached; 2222 2223 return (0); 2224 2225 err_attached: 2226 uether_ifdetach(ue); 2227 err_usbd: 2228 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2229 err: 2230 mtx_destroy(&sc->sc_mtx); 2231 return (ENXIO); 2232 } 2233 2234 /** 2235 * muge_detach - Detach the interface. 2236 * @dev: muge device handle 2237 * 2238 * RETURNS: 2239 * Returns 0. 2240 */ 2241 static int 2242 muge_detach(device_t dev) 2243 { 2244 2245 struct muge_softc *sc = device_get_softc(dev); 2246 struct usb_ether *ue = &sc->sc_ue; 2247 2248 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2249 uether_ifdetach(ue); 2250 mtx_destroy(&sc->sc_mtx); 2251 2252 return (0); 2253 } 2254 2255 static device_method_t muge_methods[] = { 2256 /* Device interface */ 2257 DEVMETHOD(device_probe, muge_probe), 2258 DEVMETHOD(device_attach, muge_attach), 2259 DEVMETHOD(device_detach, muge_detach), 2260 2261 /* Bus interface */ 2262 DEVMETHOD(bus_print_child, bus_generic_print_child), 2263 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2264 2265 /* MII interface */ 2266 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2267 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2268 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2269 2270 DEVMETHOD_END 2271 }; 2272 2273 static driver_t muge_driver = { 2274 .name = "muge", 2275 .methods = muge_methods, 2276 .size = sizeof(struct muge_softc), 2277 }; 2278 2279 static devclass_t muge_devclass; 2280 2281 DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL); 2282 DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL); 2283 MODULE_DEPEND(muge, uether, 1, 1, 1); 2284 MODULE_DEPEND(muge, usb, 1, 1, 1); 2285 MODULE_DEPEND(muge, ether, 1, 1, 1); 2286 MODULE_DEPEND(muge, miibus, 1, 1, 1); 2287 MODULE_VERSION(muge, 1); 2288 USB_PNP_HOST_INFO(lan78xx_devs); 2289