1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5 * Copyright (C) 2018 The FreeBSD Foundation. 6 * 7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 /* 38 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39 * 40 * USB 3.1 to 10/100/1000 Mbps Ethernet 41 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42 * 43 * USB 2.0 to 10/100/1000 Mbps Ethernet 44 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 45 * 46 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47 * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48 * 49 * This driver is based on the if_smsc driver, with lan78xx-specific 50 * functionality modelled on Microchip's Linux lan78xx driver. 51 * 52 * UNIMPLEMENTED FEATURES 53 * ------------------ 54 * A number of features supported by the lan78xx are not yet implemented in 55 * this driver: 56 * 57 * - RX/TX checksum offloading: Nothing has been implemented yet for 58 * TX checksumming. RX checksumming works with ICMP messages, but is broken 59 * for TCP/UDP packets. 60 * - Direct address translation filtering: Implemented but untested. 61 * - VLAN tag removal. 62 * - Support for USB interrupt endpoints. 63 * - Latency Tolerance Messaging (LTM) support. 64 * - TCP LSO support. 65 * 66 */ 67 68 #include <sys/param.h> 69 #include <sys/bus.h> 70 #include <sys/callout.h> 71 #include <sys/condvar.h> 72 #include <sys/kernel.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/module.h> 76 #include <sys/mutex.h> 77 #include <sys/priv.h> 78 #include <sys/queue.h> 79 #include <sys/random.h> 80 #include <sys/socket.h> 81 #include <sys/stddef.h> 82 #include <sys/stdint.h> 83 #include <sys/sx.h> 84 #include <sys/sysctl.h> 85 #include <sys/systm.h> 86 #include <sys/unistd.h> 87 88 #include <net/if.h> 89 #include <net/if_var.h> 90 91 #include <netinet/in.h> 92 #include <netinet/ip.h> 93 94 #include "opt_platform.h" 95 96 #ifdef FDT 97 #include <dev/fdt/fdt_common.h> 98 #include <dev/ofw/ofw_bus.h> 99 #include <dev/ofw/ofw_bus_subr.h> 100 #include <dev/usb/usb_fdt_support.h> 101 #endif 102 103 #include <dev/usb/usb.h> 104 #include <dev/usb/usbdi.h> 105 #include <dev/usb/usbdi_util.h> 106 #include "usbdevs.h" 107 108 #define USB_DEBUG_VAR lan78xx_debug 109 #include <dev/usb/usb_debug.h> 110 #include <dev/usb/usb_process.h> 111 112 #include <dev/usb/net/usb_ethernet.h> 113 114 #include <dev/usb/net/if_mugereg.h> 115 116 #ifdef USB_DEBUG 117 static int muge_debug = 0; 118 119 SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0, 120 "Microchip LAN78xx USB-GigE"); 121 SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 122 "Debug level"); 123 #endif 124 125 #define MUGE_DEFAULT_RX_CSUM_ENABLE (false) 126 #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 127 #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false) 128 129 /* Supported Vendor and Product IDs. */ 130 static const struct usb_device_id lan78xx_devs[] = { 131 #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 132 MUGE_DEV(LAN7800_ETH, 0), 133 MUGE_DEV(LAN7801_ETH, 0), 134 MUGE_DEV(LAN7850_ETH, 0), 135 #undef MUGE_DEV 136 }; 137 138 #ifdef USB_DEBUG 139 #define muge_dbg_printf(sc, fmt, args...) \ 140 do { \ 141 if (muge_debug > 0) \ 142 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 143 } while(0) 144 #else 145 #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 146 #endif 147 148 #define muge_warn_printf(sc, fmt, args...) \ 149 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 150 151 #define muge_err_printf(sc, fmt, args...) \ 152 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 153 154 #define ETHER_IS_ZERO(addr) \ 155 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 156 157 #define ETHER_IS_VALID(addr) \ 158 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 159 160 /* USB endpoints. */ 161 162 enum { 163 MUGE_BULK_DT_RD, 164 MUGE_BULK_DT_WR, 165 #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 166 MUGE_INTR_DT_WR, 167 MUGE_INTR_DT_RD, 168 #endif 169 MUGE_N_TRANSFER, 170 }; 171 172 struct muge_softc { 173 struct usb_ether sc_ue; 174 struct mtx sc_mtx; 175 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 176 int sc_phyno; 177 uint32_t sc_leds; 178 uint16_t sc_led_modes; 179 uint16_t sc_led_modes_mask; 180 181 /* Settings for the mac control (MAC_CSR) register. */ 182 uint32_t sc_rfe_ctl; 183 uint32_t sc_mdix_ctl; 184 uint16_t chipid; 185 uint16_t chiprev; 186 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 187 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 188 189 uint32_t sc_flags; 190 #define MUGE_FLAG_LINK 0x0001 191 #define MUGE_FLAG_INIT_DONE 0x0002 192 }; 193 194 #define MUGE_IFACE_IDX 0 195 196 #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 197 #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 198 #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 199 200 static device_probe_t muge_probe; 201 static device_attach_t muge_attach; 202 static device_detach_t muge_detach; 203 204 static usb_callback_t muge_bulk_read_callback; 205 static usb_callback_t muge_bulk_write_callback; 206 207 static miibus_readreg_t lan78xx_miibus_readreg; 208 static miibus_writereg_t lan78xx_miibus_writereg; 209 static miibus_statchg_t lan78xx_miibus_statchg; 210 211 static int muge_attach_post_sub(struct usb_ether *ue); 212 static uether_fn_t muge_attach_post; 213 static uether_fn_t muge_init; 214 static uether_fn_t muge_stop; 215 static uether_fn_t muge_start; 216 static uether_fn_t muge_tick; 217 static uether_fn_t muge_setmulti; 218 static uether_fn_t muge_setpromisc; 219 220 static int muge_ifmedia_upd(struct ifnet *); 221 static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 222 223 static int lan78xx_chip_init(struct muge_softc *sc); 224 static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 225 226 static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 227 228 [MUGE_BULK_DT_WR] = { 229 .type = UE_BULK, 230 .endpoint = UE_ADDR_ANY, 231 .direction = UE_DIR_OUT, 232 .frames = 16, 233 .bufsize = 16 * (MCLBYTES + 16), 234 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 235 .callback = muge_bulk_write_callback, 236 .timeout = 10000, /* 10 seconds */ 237 }, 238 239 [MUGE_BULK_DT_RD] = { 240 .type = UE_BULK, 241 .endpoint = UE_ADDR_ANY, 242 .direction = UE_DIR_IN, 243 .bufsize = 20480, /* bytes */ 244 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 245 .callback = muge_bulk_read_callback, 246 .timeout = 0, /* no timeout */ 247 }, 248 /* 249 * The chip supports interrupt endpoints, however they aren't 250 * needed as we poll on the MII status. 251 */ 252 }; 253 254 static const struct usb_ether_methods muge_ue_methods = { 255 .ue_attach_post = muge_attach_post, 256 .ue_attach_post_sub = muge_attach_post_sub, 257 .ue_start = muge_start, 258 .ue_ioctl = muge_ioctl, 259 .ue_init = muge_init, 260 .ue_stop = muge_stop, 261 .ue_tick = muge_tick, 262 .ue_setmulti = muge_setmulti, 263 .ue_setpromisc = muge_setpromisc, 264 .ue_mii_upd = muge_ifmedia_upd, 265 .ue_mii_sts = muge_ifmedia_sts, 266 }; 267 268 /** 269 * lan78xx_read_reg - Read a 32-bit register on the device 270 * @sc: driver soft context 271 * @off: offset of the register 272 * @data: pointer a value that will be populated with the register value 273 * 274 * LOCKING: 275 * The device lock must be held before calling this function. 276 * 277 * RETURNS: 278 * 0 on success, a USB_ERR_?? error code on failure. 279 */ 280 static int 281 lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 282 { 283 struct usb_device_request req; 284 uint32_t buf; 285 usb_error_t err; 286 287 MUGE_LOCK_ASSERT(sc, MA_OWNED); 288 289 req.bmRequestType = UT_READ_VENDOR_DEVICE; 290 req.bRequest = UVR_READ_REG; 291 USETW(req.wValue, 0); 292 USETW(req.wIndex, off); 293 USETW(req.wLength, 4); 294 295 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 296 if (err != 0) 297 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 298 *data = le32toh(buf); 299 return (err); 300 } 301 302 /** 303 * lan78xx_write_reg - Write a 32-bit register on the device 304 * @sc: driver soft context 305 * @off: offset of the register 306 * @data: the 32-bit value to write into the register 307 * 308 * LOCKING: 309 * The device lock must be held before calling this function. 310 * 311 * RETURNS: 312 * 0 on success, a USB_ERR_?? error code on failure. 313 */ 314 static int 315 lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 316 { 317 struct usb_device_request req; 318 uint32_t buf; 319 usb_error_t err; 320 321 MUGE_LOCK_ASSERT(sc, MA_OWNED); 322 323 buf = htole32(data); 324 325 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 326 req.bRequest = UVR_WRITE_REG; 327 USETW(req.wValue, 0); 328 USETW(req.wIndex, off); 329 USETW(req.wLength, 4); 330 331 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 332 if (err != 0) 333 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 334 return (err); 335 } 336 337 /** 338 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 339 * @sc: soft context 340 * @reg: offset of the register 341 * @bits: if the bits are clear the function returns 342 * 343 * LOCKING: 344 * The device lock must be held before calling this function. 345 * 346 * RETURNS: 347 * 0 on success, or a USB_ERR_?? error code on failure. 348 */ 349 static int 350 lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 351 { 352 usb_ticks_t start_ticks; 353 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 354 uint32_t val; 355 int err; 356 357 MUGE_LOCK_ASSERT(sc, MA_OWNED); 358 359 start_ticks = (usb_ticks_t)ticks; 360 do { 361 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 362 return (err); 363 if (!(val & bits)) 364 return (0); 365 uether_pause(&sc->sc_ue, hz / 100); 366 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 367 368 return (USB_ERR_TIMEOUT); 369 } 370 371 /** 372 * lan78xx_eeprom_read_raw - Read the attached EEPROM 373 * @sc: soft context 374 * @off: the eeprom address offset 375 * @buf: stores the bytes 376 * @buflen: the number of bytes to read 377 * 378 * Simply reads bytes from an attached eeprom. 379 * 380 * LOCKING: 381 * The function takes and releases the device lock if not already held. 382 * 383 * RETURNS: 384 * 0 on success, or a USB_ERR_?? error code on failure. 385 */ 386 static int 387 lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 388 uint16_t buflen) 389 { 390 usb_ticks_t start_ticks; 391 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 392 int err, locked; 393 uint32_t val, saved; 394 uint16_t i; 395 396 locked = mtx_owned(&sc->sc_mtx); /* XXX */ 397 if (!locked) 398 MUGE_LOCK(sc); 399 400 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 401 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 402 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 403 saved = val; 404 405 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 406 err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 407 } 408 409 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 410 if (err != 0) { 411 muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 412 goto done; 413 } 414 415 /* Start reading the bytes, one at a time. */ 416 for (i = 0; i < buflen; i++) { 417 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 418 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 419 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 420 goto done; 421 422 start_ticks = (usb_ticks_t)ticks; 423 do { 424 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 425 0) 426 goto done; 427 if (!(val & ETH_E2P_CMD_BUSY_) || 428 (val & ETH_E2P_CMD_TIMEOUT_)) 429 break; 430 431 uether_pause(&sc->sc_ue, hz / 100); 432 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 433 434 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 435 muge_warn_printf(sc, "eeprom command failed\n"); 436 err = USB_ERR_IOERROR; 437 break; 438 } 439 440 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 441 goto done; 442 443 buf[i] = (val & 0xff); 444 } 445 446 done: 447 if (!locked) 448 MUGE_UNLOCK(sc); 449 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 450 /* Restore saved LED configuration. */ 451 lan78xx_write_reg(sc, ETH_HW_CFG, saved); 452 } 453 return (err); 454 } 455 456 static bool 457 lan78xx_eeprom_present(struct muge_softc *sc) 458 { 459 int ret; 460 uint8_t sig; 461 462 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 463 return (ret == 0 && sig == ETH_E2P_INDICATOR); 464 } 465 466 /** 467 * lan78xx_otp_read_raw 468 * @sc: soft context 469 * @off: the otp address offset 470 * @buf: stores the bytes 471 * @buflen: the number of bytes to read 472 * 473 * Simply reads bytes from the OTP. 474 * 475 * LOCKING: 476 * The function takes and releases the device lock if not already held. 477 * 478 * RETURNS: 479 * 0 on success, or a USB_ERR_?? error code on failure. 480 * 481 */ 482 static int 483 lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 484 uint16_t buflen) 485 { 486 int locked, err; 487 uint32_t val; 488 uint16_t i; 489 locked = mtx_owned(&sc->sc_mtx); 490 if (!locked) 491 MUGE_LOCK(sc); 492 493 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 494 495 /* Checking if bit is set. */ 496 if (val & OTP_PWR_DN_PWRDN_N) { 497 /* Clear it, then wait for it to be cleared. */ 498 lan78xx_write_reg(sc, OTP_PWR_DN, 0); 499 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 500 if (err != 0) { 501 muge_warn_printf(sc, "OTP off? failed to read data\n"); 502 goto done; 503 } 504 } 505 /* Start reading the bytes, one at a time. */ 506 for (i = 0; i < buflen; i++) { 507 err = lan78xx_write_reg(sc, OTP_ADDR1, 508 ((off + i) >> 8) & OTP_ADDR1_15_11); 509 err = lan78xx_write_reg(sc, OTP_ADDR2, 510 ((off + i) & OTP_ADDR2_10_3)); 511 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 512 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 513 514 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 515 if (err != 0) { 516 muge_warn_printf(sc, "OTP busy failed to read data\n"); 517 goto done; 518 } 519 520 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 521 goto done; 522 523 buf[i] = (uint8_t)(val & 0xff); 524 } 525 526 done: 527 if (!locked) 528 MUGE_UNLOCK(sc); 529 return (err); 530 } 531 532 /** 533 * lan78xx_otp_read 534 * @sc: soft context 535 * @off: the otp address offset 536 * @buf: stores the bytes 537 * @buflen: the number of bytes to read 538 * 539 * Simply reads bytes from the otp. 540 * 541 * LOCKING: 542 * The function takes and releases device lock if it is not already held. 543 * 544 * RETURNS: 545 * 0 on success, or a USB_ERR_?? error code on failure. 546 */ 547 static int 548 lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 549 uint16_t buflen) 550 { 551 uint8_t sig; 552 int err; 553 554 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 555 if (err == 0) { 556 if (sig == OTP_INDICATOR_1) { 557 } else if (sig == OTP_INDICATOR_2) { 558 off += 0x100; /* XXX */ 559 } else { 560 err = -EINVAL; 561 } 562 if (!err) 563 err = lan78xx_otp_read_raw(sc, off, buf, buflen); 564 } 565 return (err); 566 } 567 568 /** 569 * lan78xx_setmacaddress - Set the mac address in the device 570 * @sc: driver soft context 571 * @addr: pointer to array contain at least 6 bytes of the mac 572 * 573 * LOCKING: 574 * Should be called with the MUGE lock held. 575 * 576 * RETURNS: 577 * Returns 0 on success or a negative error code. 578 */ 579 static int 580 lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 581 { 582 int err; 583 uint32_t val; 584 585 muge_dbg_printf(sc, 586 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 587 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 588 589 MUGE_LOCK_ASSERT(sc, MA_OWNED); 590 591 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 592 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 593 goto done; 594 595 val = (addr[5] << 8) | addr[4]; 596 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 597 598 done: 599 return (err); 600 } 601 602 /** 603 * lan78xx_set_rx_max_frame_length 604 * @sc: driver soft context 605 * @size: pointer to array contain at least 6 bytes of the mac 606 * 607 * Sets the maximum frame length to be received. Frames bigger than 608 * this size are aborted. 609 * 610 * RETURNS: 611 * Returns 0 on success or a negative error code. 612 */ 613 static int 614 lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 615 { 616 int err = 0; 617 uint32_t buf; 618 bool rxenabled; 619 620 /* First we have to disable rx before changing the length. */ 621 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 622 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 623 624 if (rxenabled) { 625 buf &= ~ETH_MAC_RX_EN_; 626 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 627 } 628 629 /* Setting max frame length. */ 630 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 631 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 632 ETH_MAC_RX_MAX_FR_SIZE_MASK_); 633 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 634 635 /* If it were enabled before, we enable it back. */ 636 637 if (rxenabled) { 638 buf |= ETH_MAC_RX_EN_; 639 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 640 } 641 642 return (0); 643 } 644 645 /** 646 * lan78xx_miibus_readreg - Read a MII/MDIO register 647 * @dev: usb ether device 648 * @phy: the number of phy reading from 649 * @reg: the register address 650 * 651 * LOCKING: 652 * Takes and releases the device mutex lock if not already held. 653 * 654 * RETURNS: 655 * Returns the 16-bits read from the MII register, if this function fails 656 * 0 is returned. 657 */ 658 static int 659 lan78xx_miibus_readreg(device_t dev, int phy, int reg) { 660 661 struct muge_softc *sc = device_get_softc(dev); 662 int locked; 663 uint32_t addr, val; 664 665 val = 0; 666 locked = mtx_owned(&sc->sc_mtx); 667 if (!locked) 668 MUGE_LOCK(sc); 669 670 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 671 0) { 672 muge_warn_printf(sc, "MII is busy\n"); 673 goto done; 674 } 675 676 addr = (phy << 11) | (reg << 6) | 677 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 678 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 679 680 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 681 0) { 682 muge_warn_printf(sc, "MII read timeout\n"); 683 goto done; 684 } 685 686 lan78xx_read_reg(sc, ETH_MII_DATA, &val); 687 val = le32toh(val); 688 689 done: 690 if (!locked) 691 MUGE_UNLOCK(sc); 692 693 return (val & 0xFFFF); 694 } 695 696 /** 697 * lan78xx_miibus_writereg - Writes a MII/MDIO register 698 * @dev: usb ether device 699 * @phy: the number of phy writing to 700 * @reg: the register address 701 * @val: the value to write 702 * 703 * Attempts to write a PHY register through the usb controller registers. 704 * 705 * LOCKING: 706 * Takes and releases the device mutex lock if not already held. 707 * 708 * RETURNS: 709 * Always returns 0 regardless of success or failure. 710 */ 711 static int 712 lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 713 { 714 struct muge_softc *sc = device_get_softc(dev); 715 int locked; 716 uint32_t addr; 717 718 if (sc->sc_phyno != phy) 719 return (0); 720 721 locked = mtx_owned(&sc->sc_mtx); 722 if (!locked) 723 MUGE_LOCK(sc); 724 725 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 726 0) { 727 muge_warn_printf(sc, "MII is busy\n"); 728 goto done; 729 } 730 731 val = htole32(val); 732 lan78xx_write_reg(sc, ETH_MII_DATA, val); 733 734 addr = (phy << 11) | (reg << 6) | 735 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 736 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 737 738 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 739 muge_warn_printf(sc, "MII write timeout\n"); 740 741 done: 742 if (!locked) 743 MUGE_UNLOCK(sc); 744 return (0); 745 } 746 747 /* 748 * lan78xx_miibus_statchg - Called to detect phy status change 749 * @dev: usb ether device 750 * 751 * This function is called periodically by the system to poll for status 752 * changes of the link. 753 * 754 * LOCKING: 755 * Takes and releases the device mutex lock if not already held. 756 */ 757 static void 758 lan78xx_miibus_statchg(device_t dev) 759 { 760 struct muge_softc *sc = device_get_softc(dev); 761 struct mii_data *mii = uether_getmii(&sc->sc_ue); 762 struct ifnet *ifp; 763 int locked; 764 int err; 765 uint32_t flow = 0; 766 uint32_t fct_flow = 0; 767 768 locked = mtx_owned(&sc->sc_mtx); 769 if (!locked) 770 MUGE_LOCK(sc); 771 772 ifp = uether_getifp(&sc->sc_ue); 773 if (mii == NULL || ifp == NULL || 774 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 775 goto done; 776 777 /* Use the MII status to determine link status */ 778 sc->sc_flags &= ~MUGE_FLAG_LINK; 779 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 780 (IFM_ACTIVE | IFM_AVALID)) { 781 muge_dbg_printf(sc, "media is active\n"); 782 switch (IFM_SUBTYPE(mii->mii_media_active)) { 783 case IFM_10_T: 784 case IFM_100_TX: 785 sc->sc_flags |= MUGE_FLAG_LINK; 786 muge_dbg_printf(sc, "10/100 ethernet\n"); 787 break; 788 case IFM_1000_T: 789 sc->sc_flags |= MUGE_FLAG_LINK; 790 muge_dbg_printf(sc, "Gigabit ethernet\n"); 791 break; 792 default: 793 break; 794 } 795 } 796 /* Lost link, do nothing. */ 797 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 798 muge_dbg_printf(sc, "link flag not set\n"); 799 goto done; 800 } 801 802 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 803 if (err) { 804 muge_warn_printf(sc, 805 "failed to read initial flow control thresholds, error %d\n", 806 err); 807 goto done; 808 } 809 810 /* Enable/disable full duplex operation and TX/RX pause. */ 811 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 812 muge_dbg_printf(sc, "full duplex operation\n"); 813 814 /* Enable transmit MAC flow control function. */ 815 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 816 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 817 818 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 819 flow |= ETH_FLOW_CR_RX_FCEN_; 820 } 821 822 /* XXX Flow control settings obtained from Microchip's driver. */ 823 switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 824 case USB_SPEED_SUPER: 825 fct_flow = 0x817; 826 break; 827 case USB_SPEED_HIGH: 828 fct_flow = 0x211; 829 break; 830 default: 831 break; 832 } 833 834 err += lan78xx_write_reg(sc, ETH_FLOW, flow); 835 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 836 if (err) 837 muge_warn_printf(sc, "media change failed, error %d\n", err); 838 839 done: 840 if (!locked) 841 MUGE_UNLOCK(sc); 842 } 843 844 /* 845 * lan78xx_set_mdix_auto - Configure the device to enable automatic 846 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 847 * functionality for seamless crossover and polarity detection. 848 * 849 * @sc: driver soft context 850 * 851 * LOCKING: 852 * Takes and releases the device mutex lock if not already held. 853 */ 854 static void 855 lan78xx_set_mdix_auto(struct muge_softc *sc) 856 { 857 uint32_t buf, err; 858 859 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 860 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 861 862 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 863 MUGE_EXT_MODE_CTRL); 864 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 865 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 866 867 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 868 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 869 MUGE_EXT_MODE_CTRL, buf); 870 871 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 872 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 873 874 if (err != 0) 875 muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 876 877 sc->sc_mdix_ctl = buf; 878 } 879 880 /** 881 * lan78xx_phy_init - Initialises the in-built MUGE phy 882 * @sc: driver soft context 883 * 884 * Resets the PHY part of the chip and then initialises it to default 885 * values. The 'link down' and 'auto-negotiation complete' interrupts 886 * from the PHY are also enabled, however we don't monitor the interrupt 887 * endpoints for the moment. 888 * 889 * RETURNS: 890 * Returns 0 on success or EIO if failed to reset the PHY. 891 */ 892 static int 893 lan78xx_phy_init(struct muge_softc *sc) 894 { 895 muge_dbg_printf(sc, "Initializing PHY.\n"); 896 uint16_t bmcr, lmsr; 897 usb_ticks_t start_ticks; 898 uint32_t hw_reg; 899 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 900 901 MUGE_LOCK_ASSERT(sc, MA_OWNED); 902 903 /* Reset phy and wait for reset to complete. */ 904 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 905 BMCR_RESET); 906 907 start_ticks = ticks; 908 do { 909 uether_pause(&sc->sc_ue, hz / 100); 910 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 911 MII_BMCR); 912 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 913 914 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 915 muge_err_printf(sc, "PHY reset timed-out\n"); 916 return (EIO); 917 } 918 919 /* Setup phy to interrupt upon link down or autoneg completion. */ 920 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 921 MUGE_PHY_INTR_STAT); 922 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 923 MUGE_PHY_INTR_MASK, 924 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 925 926 /* Enable Auto-MDIX for crossover and polarity detection. */ 927 lan78xx_set_mdix_auto(sc); 928 929 /* Enable all modes. */ 930 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 931 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 932 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 933 934 /* Restart auto-negotation. */ 935 bmcr |= BMCR_STARTNEG; 936 bmcr |= BMCR_AUTOEN; 937 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 938 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 939 940 /* Configure LED Modes. */ 941 if (sc->sc_led_modes_mask != 0) { 942 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 943 MUGE_PHY_LED_MODE); 944 lmsr &= ~sc->sc_led_modes_mask; 945 lmsr |= sc->sc_led_modes; 946 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 947 MUGE_PHY_LED_MODE, lmsr); 948 } 949 950 /* Enable appropriate LEDs. */ 951 if (sc->sc_leds != 0 && 952 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 953 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 954 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 955 hw_reg |= sc->sc_leds; 956 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 957 } 958 return (0); 959 } 960 961 /** 962 * lan78xx_chip_init - Initialises the chip after power on 963 * @sc: driver soft context 964 * 965 * This initialisation sequence is modelled on the procedure in the Linux 966 * driver. 967 * 968 * RETURNS: 969 * Returns 0 on success or an error code on failure. 970 */ 971 static int 972 lan78xx_chip_init(struct muge_softc *sc) 973 { 974 int err; 975 uint32_t buf; 976 uint32_t burst_cap; 977 978 MUGE_LOCK_ASSERT(sc, MA_OWNED); 979 980 /* Enter H/W config mode. */ 981 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 982 983 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 984 0) { 985 muge_warn_printf(sc, 986 "timed-out waiting for lite reset to complete\n"); 987 goto init_failed; 988 } 989 990 /* Set the mac address. */ 991 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 992 muge_warn_printf(sc, "failed to set the MAC address\n"); 993 goto init_failed; 994 } 995 996 /* Read and display the revision register. */ 997 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 998 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 999 err); 1000 goto init_failed; 1001 } 1002 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 1003 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 1004 switch (sc->chipid) { 1005 case ETH_ID_REV_CHIP_ID_7800_: 1006 case ETH_ID_REV_CHIP_ID_7850_: 1007 break; 1008 default: 1009 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 1010 sc->chipid); 1011 goto init_failed; 1012 } 1013 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 1014 sc->chiprev); 1015 1016 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 1017 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 1018 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1019 goto init_failed; 1020 } 1021 buf |= ETH_USB_CFG_BIR_; 1022 lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1023 1024 /* 1025 * XXX LTM support will go here. 1026 */ 1027 1028 /* Configuring the burst cap. */ 1029 switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1030 case USB_SPEED_SUPER: 1031 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1032 break; 1033 case USB_SPEED_HIGH: 1034 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1035 break; 1036 default: 1037 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1038 } 1039 1040 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1041 1042 /* Set the default bulk in delay (same value from Linux driver). */ 1043 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1044 1045 /* Multiple ethernet frames per USB packets. */ 1046 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 1047 buf |= ETH_HW_CFG_MEF_; 1048 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1049 1050 /* Enable burst cap. */ 1051 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 1052 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1053 err); 1054 goto init_failed; 1055 } 1056 buf |= ETH_USB_CFG_BCE_; 1057 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1058 1059 /* 1060 * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1061 * already the default value. But we initialize it to the same value 1062 * anyways, as that's what the Linux driver does. 1063 * 1064 */ 1065 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 1066 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1067 1068 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 1069 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1070 1071 /* Enabling interrupts. (Not using them for now) */ 1072 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1073 1074 /* 1075 * Initializing flow control registers to 0. These registers are 1076 * properly set is handled in link-reset function in the Linux driver. 1077 */ 1078 err = lan78xx_write_reg(sc, ETH_FLOW, 0); 1079 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1080 1081 /* 1082 * Settings for the RFE, we enable broadcast and destination address 1083 * perfect filtering. 1084 */ 1085 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 1086 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 1087 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1088 1089 /* 1090 * At this point the Linux driver writes multicast tables, and enables 1091 * checksum engines. But in FreeBSD that gets done in muge_init, 1092 * which gets called when the interface is brought up. 1093 */ 1094 1095 /* Reset the PHY. */ 1096 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 1097 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 1098 ETH_PMT_CTL_PHY_RST_)) != 0) { 1099 muge_warn_printf(sc, 1100 "timed-out waiting for phy reset to complete\n"); 1101 goto init_failed; 1102 } 1103 1104 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 1105 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 1106 !lan78xx_eeprom_present(sc)) { 1107 /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 1108 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 1109 } 1110 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1111 1112 /* 1113 * Enable PHY interrupts (Not really getting used for now) 1114 * ETH_INT_EP_CTL: interrupt endpoint control register 1115 * phy events cause interrupts to be issued 1116 */ 1117 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 1118 buf |= ETH_INT_ENP_PHY_INT; 1119 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1120 1121 /* 1122 * Enables mac's transmitter. It will transmit frames from the buffer 1123 * onto the cable. 1124 */ 1125 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 1126 buf |= ETH_MAC_TX_TXEN_; 1127 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1128 1129 /* FIFO is capable of transmitting frames to MAC. */ 1130 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 1131 buf |= ETH_FCT_TX_CTL_EN_; 1132 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1133 1134 /* 1135 * Set max frame length. In linux this is dev->mtu (which by default 1136 * is 1500) + VLAN_ETH_HLEN = 1518. 1137 */ 1138 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1139 1140 /* Initialise the PHY. */ 1141 if ((err = lan78xx_phy_init(sc)) != 0) 1142 goto init_failed; 1143 1144 /* Enable MAC RX. */ 1145 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 1146 buf |= ETH_MAC_RX_EN_; 1147 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1148 1149 /* Enable FIFO controller RX. */ 1150 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 1151 buf |= ETH_FCT_TX_CTL_EN_; 1152 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1153 1154 sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1155 return (0); 1156 1157 init_failed: 1158 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1159 return (err); 1160 } 1161 1162 static void 1163 muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1164 { 1165 struct muge_softc *sc = usbd_xfer_softc(xfer); 1166 struct usb_ether *ue = &sc->sc_ue; 1167 struct ifnet *ifp = uether_getifp(ue); 1168 struct mbuf *m; 1169 struct usb_page_cache *pc; 1170 uint16_t pktlen; 1171 uint32_t rx_cmd_a, rx_cmd_b; 1172 uint16_t rx_cmd_c; 1173 int off; 1174 int actlen; 1175 1176 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1177 muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1178 1179 switch (USB_GET_STATE(xfer)) { 1180 case USB_ST_TRANSFERRED: 1181 1182 /* 1183 * There is always a zero length frame after bringing the 1184 * interface up. 1185 */ 1186 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1187 goto tr_setup; 1188 1189 /* 1190 * There may be multiple packets in the USB frame. Each will 1191 * have a header and each needs to have its own mbuf allocated 1192 * and populated for it. 1193 */ 1194 pc = usbd_xfer_get_frame(xfer, 0); 1195 off = 0; 1196 1197 while (off < actlen) { 1198 1199 /* The frame header is aligned on a 4 byte boundary. */ 1200 off = ((off + 0x3) & ~0x3); 1201 1202 /* Extract RX CMD A. */ 1203 if (off + sizeof(rx_cmd_a) > actlen) 1204 goto tr_setup; 1205 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1206 off += (sizeof(rx_cmd_a)); 1207 rx_cmd_a = le32toh(rx_cmd_a); 1208 1209 1210 /* Extract RX CMD B. */ 1211 if (off + sizeof(rx_cmd_b) > actlen) 1212 goto tr_setup; 1213 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1214 off += (sizeof(rx_cmd_b)); 1215 rx_cmd_b = le32toh(rx_cmd_b); 1216 1217 1218 /* Extract RX CMD C. */ 1219 if (off + sizeof(rx_cmd_c) > actlen) 1220 goto tr_setup; 1221 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1222 off += (sizeof(rx_cmd_c)); 1223 rx_cmd_c = le16toh(rx_cmd_c); 1224 1225 if (off > actlen) 1226 goto tr_setup; 1227 1228 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1229 1230 muge_dbg_printf(sc, 1231 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1232 " pktlen %d actlen %d off %d\n", 1233 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1234 1235 if (rx_cmd_a & RX_CMD_A_RED_) { 1236 muge_dbg_printf(sc, 1237 "rx error (hdr 0x%08x)\n", rx_cmd_a); 1238 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1239 } else { 1240 /* Ethernet frame too big or too small? */ 1241 if ((pktlen < ETHER_HDR_LEN) || 1242 (pktlen > (actlen - off))) 1243 goto tr_setup; 1244 1245 /* Create a new mbuf to store the packet. */ 1246 m = uether_newbuf(); 1247 if (m == NULL) { 1248 muge_warn_printf(sc, 1249 "failed to create new mbuf\n"); 1250 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1251 1); 1252 goto tr_setup; 1253 } 1254 1255 usbd_copy_out(pc, off, mtod(m, uint8_t *), 1256 pktlen); 1257 1258 /* 1259 * Check if RX checksums are computed, and 1260 * offload them 1261 */ 1262 if ((ifp->if_capabilities & IFCAP_RXCSUM) && 1263 !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1264 struct ether_header *eh; 1265 eh = mtod(m, struct ether_header *); 1266 /* 1267 * Remove the extra 2 bytes of the csum 1268 * 1269 * The checksum appears to be 1270 * simplistically calculated over the 1271 * protocol headers up to the end of the 1272 * eth frame. Which means if the eth 1273 * frame is padded the csum calculation 1274 * is incorrectly performed over the 1275 * padding bytes as well. Therefore to 1276 * be safe we ignore the H/W csum on 1277 * frames less than or equal to 1278 * 64 bytes. 1279 * 1280 * Protocols checksummed: 1281 * TCP, UDP, ICMP, IGMP, IP 1282 */ 1283 if (pktlen > ETHER_MIN_LEN) { 1284 m->m_pkthdr.csum_flags |= 1285 CSUM_DATA_VALID; 1286 1287 /* 1288 * Copy the checksum from the 1289 * last 2 bytes of the transfer 1290 * and put in the csum_data 1291 * field. 1292 */ 1293 usbd_copy_out(pc, 1294 (off + pktlen), 1295 &m->m_pkthdr.csum_data, 2); 1296 1297 /* 1298 * The data is copied in network 1299 * order, but the csum algorithm 1300 * in the kernel expects it to 1301 * be in host network order. 1302 */ 1303 m->m_pkthdr.csum_data = 1304 ntohs(m->m_pkthdr.csum_data); 1305 1306 muge_dbg_printf(sc, 1307 "RX checksum offloaded (0x%04x)\n", 1308 m->m_pkthdr.csum_data); 1309 } 1310 } 1311 1312 /* Enqueue the mbuf on the receive queue. */ 1313 if (pktlen < (4 + ETHER_HDR_LEN)) { 1314 m_freem(m); 1315 goto tr_setup; 1316 } 1317 /* Remove 4 trailing bytes */ 1318 uether_rxmbuf(ue, m, pktlen - 4); 1319 } 1320 1321 /* 1322 * Update the offset to move to the next potential 1323 * packet. 1324 */ 1325 off += pktlen; 1326 } 1327 1328 /* FALLTHROUGH */ 1329 case USB_ST_SETUP: 1330 tr_setup: 1331 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1332 usbd_transfer_submit(xfer); 1333 uether_rxflush(ue); 1334 return; 1335 1336 default: 1337 if (error != USB_ERR_CANCELLED) { 1338 muge_warn_printf(sc, "bulk read error, %s\n", 1339 usbd_errstr(error)); 1340 usbd_xfer_set_stall(xfer); 1341 goto tr_setup; 1342 } 1343 return; 1344 } 1345 } 1346 1347 /** 1348 * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1349 * @xfer: the USB transfer 1350 * @error: error code if the transfers is in an errored state 1351 * 1352 * The main write function that pulls ethernet frames off the queue and 1353 * sends them out. 1354 * 1355 */ 1356 static void 1357 muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1358 { 1359 struct muge_softc *sc = usbd_xfer_softc(xfer); 1360 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1361 struct usb_page_cache *pc; 1362 struct mbuf *m; 1363 int nframes; 1364 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1365 1366 switch (USB_GET_STATE(xfer)) { 1367 case USB_ST_TRANSFERRED: 1368 muge_dbg_printf(sc, 1369 "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1370 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1371 /* FALLTHROUGH */ 1372 case USB_ST_SETUP: 1373 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1374 tr_setup: 1375 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1376 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1377 muge_dbg_printf(sc, 1378 "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1379 (sc->sc_flags & MUGE_FLAG_LINK)); 1380 muge_dbg_printf(sc, 1381 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1382 (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1383 muge_dbg_printf(sc, 1384 "USB TRANSFER not sending: no link or controller is busy \n"); 1385 /* 1386 * Don't send anything if there is no link or 1387 * controller is busy. 1388 */ 1389 return; 1390 } 1391 for (nframes = 0; nframes < 16 && 1392 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1393 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1394 if (m == NULL) 1395 break; 1396 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1397 nframes); 1398 frm_len = 0; 1399 pc = usbd_xfer_get_frame(xfer, nframes); 1400 1401 /* 1402 * Each frame is prefixed with two 32-bit values 1403 * describing the length of the packet and buffer. 1404 */ 1405 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1406 TX_CMD_A_FCS_; 1407 tx_cmd_a = htole32(tx_cmd_a); 1408 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1409 1410 tx_cmd_b = 0; 1411 1412 /* TCP LSO Support will probably be implemented here. */ 1413 tx_cmd_b = htole32(tx_cmd_b); 1414 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1415 1416 frm_len += 8; 1417 1418 /* Next copy in the actual packet */ 1419 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1420 frm_len += m->m_pkthdr.len; 1421 1422 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1423 1424 /* 1425 * If there's a BPF listener, bounce a copy of this 1426 * frame to it. 1427 */ 1428 BPF_MTAP(ifp, m); 1429 m_freem(m); 1430 1431 /* Set frame length. */ 1432 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1433 } 1434 1435 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1436 if (nframes != 0) { 1437 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1438 usbd_xfer_set_frames(xfer, nframes); 1439 usbd_transfer_submit(xfer); 1440 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1441 } 1442 return; 1443 1444 default: 1445 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1446 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1447 1448 if (error != USB_ERR_CANCELLED) { 1449 muge_err_printf(sc, 1450 "usb error on tx: %s\n", usbd_errstr(error)); 1451 usbd_xfer_set_stall(xfer); 1452 goto tr_setup; 1453 } 1454 return; 1455 } 1456 } 1457 1458 /** 1459 * muge_set_mac_addr - Initiailizes NIC MAC address 1460 * @ue: the USB ethernet device 1461 * 1462 * Tries to obtain MAC address from number of sources: registers, 1463 * EEPROM, DTB blob. If all sources fail - generates random MAC. 1464 */ 1465 static void 1466 muge_set_mac_addr(struct usb_ether *ue) 1467 { 1468 struct muge_softc *sc = uether_getsc(ue); 1469 uint32_t mac_h, mac_l; 1470 1471 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1472 1473 uint32_t val; 1474 lan78xx_read_reg(sc, 0, &val); 1475 1476 /* Read current MAC address from RX_ADDRx registers. */ 1477 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 1478 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1479 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1480 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1481 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1482 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1483 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1484 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1485 } 1486 1487 /* 1488 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1489 * doesn't work, try OTP. Whether any of these methods work or not, try 1490 * FDT data, because it is allowed to override the EEPROM/OTP values. 1491 */ 1492 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1493 muge_dbg_printf(sc, "MAC assigned from registers\n"); 1494 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1495 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1496 ETHER_IS_VALID(ue->ue_eaddr)) { 1497 muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1498 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1499 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1500 muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1501 } 1502 1503 #ifdef FDT 1504 /* ue->ue_eaddr modified only if config exists for this dev instance. */ 1505 usb_fdt_get_mac_addr(ue->ue_dev, ue); 1506 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1507 muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1508 } 1509 #endif 1510 1511 if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1512 muge_dbg_printf(sc, "MAC assigned randomly\n"); 1513 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1514 ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1515 ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1516 } 1517 } 1518 1519 /** 1520 * muge_set_leds - Initializes NIC LEDs pattern 1521 * @ue: the USB ethernet device 1522 * 1523 * Tries to store the LED modes. 1524 * Supports only DTB blob like the Linux driver does. 1525 */ 1526 static void 1527 muge_set_leds(struct usb_ether *ue) 1528 { 1529 #ifdef FDT 1530 struct muge_softc *sc = uether_getsc(ue); 1531 phandle_t node; 1532 pcell_t modes[4]; /* 4 LEDs are possible */ 1533 ssize_t proplen; 1534 uint32_t count; 1535 1536 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1537 (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1538 sizeof(modes))) > 0) { 1539 count = proplen / sizeof( uint32_t ); 1540 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 1541 (count > 1) * ETH_HW_CFG_LED1_EN_ | 1542 (count > 2) * ETH_HW_CFG_LED2_EN_ | 1543 (count > 3) * ETH_HW_CFG_LED3_EN_; 1544 while (count-- > 0) { 1545 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 1546 sc->sc_led_modes_mask |= 0xf << (4 * count); 1547 } 1548 muge_dbg_printf(sc, "LED modes set from FDT data\n"); 1549 } 1550 #endif 1551 } 1552 1553 /** 1554 * muge_attach_post - Called after the driver attached to the USB interface 1555 * @ue: the USB ethernet device 1556 * 1557 * This is where the chip is intialised for the first time. This is 1558 * different from the muge_init() function in that that one is designed to 1559 * setup the H/W to match the UE settings and can be called after a reset. 1560 * 1561 */ 1562 static void 1563 muge_attach_post(struct usb_ether *ue) 1564 { 1565 struct muge_softc *sc = uether_getsc(ue); 1566 1567 muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1568 1569 /* Setup some of the basics */ 1570 sc->sc_phyno = 1; 1571 1572 muge_set_mac_addr(ue); 1573 muge_set_leds(ue); 1574 1575 /* Initialise the chip for the first time */ 1576 lan78xx_chip_init(sc); 1577 } 1578 1579 /** 1580 * muge_attach_post_sub - Called after attach to the USB interface 1581 * @ue: the USB ethernet device 1582 * 1583 * Most of this is boilerplate code and copied from the base USB ethernet 1584 * driver. It has been overriden so that we can indicate to the system 1585 * that the chip supports H/W checksumming. 1586 * 1587 * RETURNS: 1588 * Returns 0 on success or a negative error code. 1589 */ 1590 static int 1591 muge_attach_post_sub(struct usb_ether *ue) 1592 { 1593 struct muge_softc *sc; 1594 struct ifnet *ifp; 1595 int error; 1596 1597 sc = uether_getsc(ue); 1598 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1599 ifp = ue->ue_ifp; 1600 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1601 ifp->if_start = uether_start; 1602 ifp->if_ioctl = muge_ioctl; 1603 ifp->if_init = uether_init; 1604 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1605 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1606 IFQ_SET_READY(&ifp->if_snd); 1607 1608 /* 1609 * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1610 * however currently only RX checksum is supported in the driver 1611 * (see top of file). 1612 */ 1613 ifp->if_hwassist = 0; 1614 if (MUGE_DEFAULT_RX_CSUM_ENABLE) 1615 ifp->if_capabilities |= IFCAP_RXCSUM; 1616 1617 if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1618 ifp->if_capabilities |= IFCAP_TXCSUM; 1619 1620 /* 1621 * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1622 * here, that's something related to socket buffers used in Linux. 1623 * FreeBSD doesn't have that as an interface feature. 1624 */ 1625 if (MUGE_DEFAULT_TSO_CSUM_ENABLE) 1626 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1627 1628 #if 0 1629 /* TX checksuming is disabled since not yet implemented. */ 1630 ifp->if_capabilities |= IFCAP_TXCSUM; 1631 ifp->if_capenable |= IFCAP_TXCSUM; 1632 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1633 #endif 1634 1635 ifp->if_capenable = ifp->if_capabilities; 1636 1637 mtx_lock(&Giant); 1638 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1639 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1640 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1641 mtx_unlock(&Giant); 1642 1643 return (0); 1644 } 1645 1646 /** 1647 * muge_start - Starts communication with the LAN78xx chip 1648 * @ue: USB ether interface 1649 */ 1650 static void 1651 muge_start(struct usb_ether *ue) 1652 { 1653 struct muge_softc *sc = uether_getsc(ue); 1654 1655 /* 1656 * Start the USB transfers, if not already started. 1657 */ 1658 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1659 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1660 } 1661 1662 /** 1663 * muge_ioctl - ioctl function for the device 1664 * @ifp: interface pointer 1665 * @cmd: the ioctl command 1666 * @data: data passed in the ioctl call, typically a pointer to struct 1667 * ifreq. 1668 * 1669 * The ioctl routine is overridden to detect change requests for the H/W 1670 * checksum capabilities. 1671 * 1672 * RETURNS: 1673 * 0 on success and an error code on failure. 1674 */ 1675 static int 1676 muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1677 { 1678 struct usb_ether *ue = ifp->if_softc; 1679 struct muge_softc *sc; 1680 struct ifreq *ifr; 1681 int rc; 1682 int mask; 1683 int reinit; 1684 1685 if (cmd == SIOCSIFCAP) { 1686 sc = uether_getsc(ue); 1687 ifr = (struct ifreq *)data; 1688 1689 MUGE_LOCK(sc); 1690 1691 rc = 0; 1692 reinit = 0; 1693 1694 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1695 1696 /* Modify the RX CSUM enable bits. */ 1697 if ((mask & IFCAP_RXCSUM) != 0 && 1698 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1699 ifp->if_capenable ^= IFCAP_RXCSUM; 1700 1701 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1702 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1703 reinit = 1; 1704 } 1705 } 1706 1707 MUGE_UNLOCK(sc); 1708 if (reinit) 1709 uether_init(ue); 1710 1711 } else { 1712 rc = uether_ioctl(ifp, cmd, data); 1713 } 1714 1715 return (rc); 1716 } 1717 1718 /** 1719 * muge_reset - Reset the SMSC chip 1720 * @sc: device soft context 1721 * 1722 * LOCKING: 1723 * Should be called with the SMSC lock held. 1724 */ 1725 static void 1726 muge_reset(struct muge_softc *sc) 1727 { 1728 struct usb_config_descriptor *cd; 1729 usb_error_t err; 1730 1731 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1732 1733 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1734 cd->bConfigurationValue); 1735 if (err) 1736 muge_warn_printf(sc, "reset failed (ignored)\n"); 1737 1738 /* Wait a little while for the chip to get its brains in order. */ 1739 uether_pause(&sc->sc_ue, hz / 100); 1740 1741 /* Reinitialize controller to achieve full reset. */ 1742 lan78xx_chip_init(sc); 1743 } 1744 1745 /** 1746 * muge_set_addr_filter 1747 * 1748 * @sc: device soft context 1749 * @index: index of the entry to the perfect address table 1750 * @addr: address to be written 1751 * 1752 */ 1753 static void 1754 muge_set_addr_filter(struct muge_softc *sc, int index, 1755 uint8_t addr[ETHER_ADDR_LEN]) 1756 { 1757 uint32_t tmp; 1758 1759 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1760 tmp = addr[3]; 1761 tmp |= addr[2] | (tmp << 8); 1762 tmp |= addr[1] | (tmp << 8); 1763 tmp |= addr[0] | (tmp << 8); 1764 sc->sc_pfilter_table[index][1] = tmp; 1765 tmp = addr[5]; 1766 tmp |= addr[4] | (tmp << 8); 1767 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1768 sc->sc_pfilter_table[index][0] = tmp; 1769 } 1770 } 1771 1772 /** 1773 * lan78xx_dataport_write - write to the selected RAM 1774 * @sc: The device soft context. 1775 * @ram_select: Select which RAM to access. 1776 * @addr: Starting address to write to. 1777 * @buf: word-sized buffer to write to RAM, starting at @addr. 1778 * @length: length of @buf 1779 * 1780 * 1781 * RETURNS: 1782 * 0 if write successful. 1783 */ 1784 static int 1785 lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1786 uint32_t addr, uint32_t length, uint32_t *buf) 1787 { 1788 uint32_t dp_sel; 1789 int i, ret; 1790 1791 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1792 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1793 if (ret < 0) 1794 goto done; 1795 1796 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1797 1798 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1799 dp_sel |= ram_select; 1800 1801 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1802 1803 for (i = 0; i < length; i++) { 1804 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 1805 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 1806 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 1807 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1808 if (ret != 0) 1809 goto done; 1810 } 1811 1812 done: 1813 return (ret); 1814 } 1815 1816 /** 1817 * muge_multicast_write 1818 * @sc: device's soft context 1819 * 1820 * Writes perfect addres filters and hash address filters to their 1821 * corresponding registers and RAMs. 1822 * 1823 */ 1824 static void 1825 muge_multicast_write(struct muge_softc *sc) 1826 { 1827 int i, ret; 1828 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 1829 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 1830 sc->sc_mchash_table); 1831 1832 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1833 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1834 ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1835 sc->sc_pfilter_table[i][1]); 1836 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1837 sc->sc_pfilter_table[i][0]); 1838 } 1839 } 1840 1841 /** 1842 * muge_hash - Calculate the hash of a mac address 1843 * @addr: The mac address to calculate the hash on 1844 * 1845 * This function is used when configuring a range of multicast mac 1846 * addresses to filter on. The hash of the mac address is put in the 1847 * device's mac hash table. 1848 * 1849 * RETURNS: 1850 * Returns a value from 0-63 value which is the hash of the mac address. 1851 */ 1852 static inline uint32_t 1853 muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1854 { 1855 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1856 } 1857 1858 /** 1859 * muge_setmulti - Setup multicast 1860 * @ue: usb ethernet device context 1861 * 1862 * Tells the device to either accept frames with a multicast mac address, 1863 * a select group of m'cast mac addresses or just the devices mac address. 1864 * 1865 * LOCKING: 1866 * Should be called with the MUGE lock held. 1867 */ 1868 static void 1869 muge_setmulti(struct usb_ether *ue) 1870 { 1871 struct muge_softc *sc = uether_getsc(ue); 1872 struct ifnet *ifp = uether_getifp(ue); 1873 uint8_t i, *addr; 1874 struct ifmultiaddr *ifma; 1875 1876 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1877 1878 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 1879 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1880 1881 /* Initialize hash filter table. */ 1882 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1883 sc->sc_mchash_table[i] = 0; 1884 1885 /* Initialize perfect filter table. */ 1886 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1887 sc->sc_pfilter_table[i][0] = 1888 sc->sc_pfilter_table[i][1] = 0; 1889 } 1890 1891 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1892 1893 if (ifp->if_flags & IFF_PROMISC) { 1894 muge_dbg_printf(sc, "promiscuous mode enabled\n"); 1895 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1896 } else if (ifp->if_flags & IFF_ALLMULTI){ 1897 muge_dbg_printf(sc, "receive all multicast enabled\n"); 1898 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1899 } else { 1900 /* Lock the mac address list before hashing each of them. */ 1901 if_maddr_rlock(ifp); 1902 if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) { 1903 i = 1; 1904 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, 1905 ifma_link) { 1906 /* First fill up the perfect address table. */ 1907 addr = LLADDR((struct sockaddr_dl *) 1908 ifma->ifma_addr); 1909 if (i < 33 /* XXX */) { 1910 muge_set_addr_filter(sc, i, addr); 1911 } else { 1912 uint32_t bitnum = muge_hash(addr); 1913 sc->sc_mchash_table[bitnum / 32] |= 1914 (1 << (bitnum % 32)); 1915 sc->sc_rfe_ctl |= 1916 ETH_RFE_CTL_MCAST_HASH_; 1917 } 1918 i++; 1919 } 1920 } 1921 if_maddr_runlock(ifp); 1922 muge_multicast_write(sc); 1923 } 1924 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1925 } 1926 1927 /** 1928 * muge_setpromisc - Enables/disables promiscuous mode 1929 * @ue: usb ethernet device context 1930 * 1931 * LOCKING: 1932 * Should be called with the MUGE lock held. 1933 */ 1934 static void 1935 muge_setpromisc(struct usb_ether *ue) 1936 { 1937 struct muge_softc *sc = uether_getsc(ue); 1938 struct ifnet *ifp = uether_getifp(ue); 1939 1940 muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1941 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1942 1943 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1944 1945 if (ifp->if_flags & IFF_PROMISC) 1946 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1947 else 1948 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1949 1950 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1951 } 1952 1953 /** 1954 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1955 * @sc: driver soft context 1956 * 1957 * LOCKING: 1958 * Should be called with the MUGE lock held. 1959 * 1960 * RETURNS: 1961 * Returns 0 on success or a negative error code. 1962 */ 1963 static int muge_sethwcsum(struct muge_softc *sc) 1964 { 1965 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1966 int err; 1967 1968 if (!ifp) 1969 return (-EIO); 1970 1971 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1972 1973 if (ifp->if_capabilities & IFCAP_RXCSUM) { 1974 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 1975 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1976 } else { 1977 sc->sc_rfe_ctl &= 1978 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 1979 sc->sc_rfe_ctl &= 1980 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1981 } 1982 1983 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1984 1985 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1986 1987 if (err != 0) { 1988 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 1989 err); 1990 return (err); 1991 } 1992 1993 return (0); 1994 } 1995 1996 /** 1997 * muge_ifmedia_upd - Set media options 1998 * @ifp: interface pointer 1999 * 2000 * Basically boilerplate code that simply calls the mii functions to set 2001 * the media options. 2002 * 2003 * LOCKING: 2004 * The device lock must be held before this function is called. 2005 * 2006 * RETURNS: 2007 * Returns 0 on success or a negative error code. 2008 */ 2009 static int 2010 muge_ifmedia_upd(struct ifnet *ifp) 2011 { 2012 struct muge_softc *sc = ifp->if_softc; 2013 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2014 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2015 struct mii_softc *miisc; 2016 int err; 2017 2018 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2019 2020 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2021 PHY_RESET(miisc); 2022 err = mii_mediachg(mii); 2023 return (err); 2024 } 2025 2026 /** 2027 * muge_init - Initialises the LAN95xx chip 2028 * @ue: USB ether interface 2029 * 2030 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2031 * initialise the interface and the rx/tx pipes. 2032 * 2033 * LOCKING: 2034 * Should be called with the MUGE lock held. 2035 */ 2036 static void 2037 muge_init(struct usb_ether *ue) 2038 { 2039 struct muge_softc *sc = uether_getsc(ue); 2040 muge_dbg_printf(sc, "Calling muge_init.\n"); 2041 struct ifnet *ifp = uether_getifp(ue); 2042 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2043 2044 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2045 muge_dbg_printf(sc, "setting MAC address failed\n"); 2046 2047 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2048 return; 2049 2050 /* Cancel pending I/O. */ 2051 muge_stop(ue); 2052 2053 /* Reset the ethernet interface. */ 2054 muge_reset(sc); 2055 2056 /* Load the multicast filter. */ 2057 muge_setmulti(ue); 2058 2059 /* TCP/UDP checksum offload engines. */ 2060 muge_sethwcsum(sc); 2061 2062 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2063 2064 /* Indicate we are up and running. */ 2065 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2066 2067 /* Switch to selected media. */ 2068 muge_ifmedia_upd(ifp); 2069 muge_start(ue); 2070 } 2071 2072 /** 2073 * muge_stop - Stops communication with the LAN78xx chip 2074 * @ue: USB ether interface 2075 */ 2076 static void 2077 muge_stop(struct usb_ether *ue) 2078 { 2079 struct muge_softc *sc = uether_getsc(ue); 2080 struct ifnet *ifp = uether_getifp(ue); 2081 2082 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2083 2084 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2085 sc->sc_flags &= ~MUGE_FLAG_LINK; 2086 2087 /* 2088 * Stop all the transfers, if not already stopped. 2089 */ 2090 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2091 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2092 } 2093 2094 /** 2095 * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2096 * @ue: USB ether interface 2097 * 2098 * Simply calls the mii status functions to check the state of the link. 2099 * 2100 * LOCKING: 2101 * Should be called with the MUGE lock held. 2102 */ 2103 static void 2104 muge_tick(struct usb_ether *ue) 2105 { 2106 2107 struct muge_softc *sc = uether_getsc(ue); 2108 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2109 2110 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2111 2112 mii_tick(mii); 2113 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2114 lan78xx_miibus_statchg(ue->ue_dev); 2115 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2116 muge_start(ue); 2117 } 2118 } 2119 2120 /** 2121 * muge_ifmedia_sts - Report current media status 2122 * @ifp: inet interface pointer 2123 * @ifmr: interface media request 2124 * 2125 * Call the mii functions to get the media status. 2126 * 2127 * LOCKING: 2128 * Internally takes and releases the device lock. 2129 */ 2130 static void 2131 muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2132 { 2133 struct muge_softc *sc = ifp->if_softc; 2134 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2135 2136 MUGE_LOCK(sc); 2137 mii_pollstat(mii); 2138 ifmr->ifm_active = mii->mii_media_active; 2139 ifmr->ifm_status = mii->mii_media_status; 2140 MUGE_UNLOCK(sc); 2141 } 2142 2143 /** 2144 * muge_probe - Probe the interface. 2145 * @dev: muge device handle 2146 * 2147 * Checks if the device is a match for this driver. 2148 * 2149 * RETURNS: 2150 * Returns 0 on success or an error code on failure. 2151 */ 2152 static int 2153 muge_probe(device_t dev) 2154 { 2155 struct usb_attach_arg *uaa = device_get_ivars(dev); 2156 2157 if (uaa->usb_mode != USB_MODE_HOST) 2158 return (ENXIO); 2159 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2160 return (ENXIO); 2161 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2162 return (ENXIO); 2163 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2164 } 2165 2166 /** 2167 * muge_attach - Attach the interface. 2168 * @dev: muge device handle 2169 * 2170 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2171 * 2172 * RETURNS: 2173 * Returns 0 on success or a negative error code. 2174 */ 2175 static int 2176 muge_attach(device_t dev) 2177 { 2178 struct usb_attach_arg *uaa = device_get_ivars(dev); 2179 struct muge_softc *sc = device_get_softc(dev); 2180 struct usb_ether *ue = &sc->sc_ue; 2181 uint8_t iface_index; 2182 int err; 2183 2184 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2185 2186 device_set_usb_desc(dev); 2187 2188 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2189 2190 /* Setup the endpoints for the Microchip LAN78xx device. */ 2191 iface_index = MUGE_IFACE_IDX; 2192 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2193 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2194 if (err) { 2195 device_printf(dev, "error: allocating USB transfers failed\n"); 2196 goto err; 2197 } 2198 2199 ue->ue_sc = sc; 2200 ue->ue_dev = dev; 2201 ue->ue_udev = uaa->device; 2202 ue->ue_mtx = &sc->sc_mtx; 2203 ue->ue_methods = &muge_ue_methods; 2204 2205 err = uether_ifattach(ue); 2206 if (err) { 2207 device_printf(dev, "error: could not attach interface\n"); 2208 goto err_usbd; 2209 } 2210 2211 /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 2212 uether_ifattach_wait(ue); 2213 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 2214 goto err_attached; 2215 2216 return (0); 2217 2218 err_attached: 2219 uether_ifdetach(ue); 2220 err_usbd: 2221 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2222 err: 2223 mtx_destroy(&sc->sc_mtx); 2224 return (ENXIO); 2225 } 2226 2227 /** 2228 * muge_detach - Detach the interface. 2229 * @dev: muge device handle 2230 * 2231 * RETURNS: 2232 * Returns 0. 2233 */ 2234 static int 2235 muge_detach(device_t dev) 2236 { 2237 2238 struct muge_softc *sc = device_get_softc(dev); 2239 struct usb_ether *ue = &sc->sc_ue; 2240 2241 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2242 uether_ifdetach(ue); 2243 mtx_destroy(&sc->sc_mtx); 2244 2245 return (0); 2246 } 2247 2248 static device_method_t muge_methods[] = { 2249 /* Device interface */ 2250 DEVMETHOD(device_probe, muge_probe), 2251 DEVMETHOD(device_attach, muge_attach), 2252 DEVMETHOD(device_detach, muge_detach), 2253 2254 /* Bus interface */ 2255 DEVMETHOD(bus_print_child, bus_generic_print_child), 2256 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2257 2258 /* MII interface */ 2259 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2260 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2261 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2262 2263 DEVMETHOD_END 2264 }; 2265 2266 static driver_t muge_driver = { 2267 .name = "muge", 2268 .methods = muge_methods, 2269 .size = sizeof(struct muge_softc), 2270 }; 2271 2272 static devclass_t muge_devclass; 2273 2274 DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL); 2275 DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL); 2276 MODULE_DEPEND(muge, uether, 1, 1, 1); 2277 MODULE_DEPEND(muge, usb, 1, 1, 1); 2278 MODULE_DEPEND(muge, ether, 1, 1, 1); 2279 MODULE_DEPEND(muge, miibus, 1, 1, 1); 2280 MODULE_VERSION(muge, 1); 2281 USB_PNP_HOST_INFO(lan78xx_devs); 2282