xref: /freebsd/sys/dev/usb/net/if_muge.c (revision e5151258c86028ed71650518c9845a3fde8af7aa)
1d30c739cSEd Maste /*-
2d30c739cSEd Maste  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3d30c739cSEd Maste  *
4d30c739cSEd Maste  * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>.
5d30c739cSEd Maste  * Copyright (C) 2018 The FreeBSD Foundation.
6d30c739cSEd Maste  *
7d30c739cSEd Maste  * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com>
8d30c739cSEd Maste  * under sponsorship from the FreeBSD Foundation.
9d30c739cSEd Maste  *
10d30c739cSEd Maste  * Redistribution and use in source and binary forms, with or without
11d30c739cSEd Maste  * modification, are permitted provided that the following conditions
12d30c739cSEd Maste  * are met:
13d30c739cSEd Maste  * 1. Redistributions of source code must retain the above copyright
14d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer.
15d30c739cSEd Maste  * 2. Redistributions in binary form must reproduce the above copyright
16d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer in the
17d30c739cSEd Maste  *    documentation and/or other materials provided with the distribution.
18d30c739cSEd Maste  *
19d30c739cSEd Maste  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20d30c739cSEd Maste  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21d30c739cSEd Maste  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22d30c739cSEd Maste  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23d30c739cSEd Maste  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24d30c739cSEd Maste  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25d30c739cSEd Maste  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26d30c739cSEd Maste  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27d30c739cSEd Maste  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28d30c739cSEd Maste  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29d30c739cSEd Maste  * SUCH DAMAGE.
30d30c739cSEd Maste  *
31d30c739cSEd Maste  * $FreeBSD$
32d30c739cSEd Maste  */
33d30c739cSEd Maste 
34d30c739cSEd Maste #include <sys/cdefs.h>
35d30c739cSEd Maste __FBSDID("$FreeBSD$");
36d30c739cSEd Maste 
37d30c739cSEd Maste /*
38d30c739cSEd Maste  * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families.
39d30c739cSEd Maste  *
40d30c739cSEd Maste  * USB 3.1 to 10/100/1000 Mbps Ethernet
41d30c739cSEd Maste  * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800
42d30c739cSEd Maste  *
43d30c739cSEd Maste  * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub
44d30c739cSEd Maste  * LAN7515 (no datasheet available, but probes and functions as LAN7800)
45d30c739cSEd Maste  *
46d30c739cSEd Maste  * This driver is based on the if_smsc driver, with lan78xx-specific
47d30c739cSEd Maste  * functionality modelled on Microchip's Linux lan78xx driver.
48d30c739cSEd Maste  *
49d30c739cSEd Maste  * UNIMPLEMENTED FEATURES
50d30c739cSEd Maste  * ------------------
51d30c739cSEd Maste  * A number of features supported by the lan78xx are not yet implemented in
52d30c739cSEd Maste  * this driver:
53d30c739cSEd Maste  *
54d30c739cSEd Maste  * 1. RX/TX checksum offloading: Nothing has been implemented yet for
55d30c739cSEd Maste  *    TX checksumming. RX checksumming works with ICMP messages, but is broken
56d30c739cSEd Maste  *    for TCP/UDP packets.
57d30c739cSEd Maste  * 2. Direct address translation filtering: Implemented but untested.
58d30c739cSEd Maste  * 3. VLAN tag removal.
59d30c739cSEd Maste  * 4. Reading MAC address from the device tree: Specific to the RPi 3B+.
60d30c739cSEd Maste  *    Currently, the driver assigns a random MAC address itself.
61d30c739cSEd Maste  * 5. Support for USB interrupt endpoints.
62d30c739cSEd Maste  * 6. Latency Tolerance Messaging (LTM) support.
63d30c739cSEd Maste  * 7. TCP LSO support.
64d30c739cSEd Maste  *
65d30c739cSEd Maste  */
66d30c739cSEd Maste 
67d30c739cSEd Maste #include <sys/param.h>
68d30c739cSEd Maste #include <sys/bus.h>
69d30c739cSEd Maste #include <sys/callout.h>
70d30c739cSEd Maste #include <sys/condvar.h>
71d30c739cSEd Maste #include <sys/kernel.h>
72d30c739cSEd Maste #include <sys/lock.h>
73d30c739cSEd Maste #include <sys/malloc.h>
74d30c739cSEd Maste #include <sys/module.h>
75d30c739cSEd Maste #include <sys/mutex.h>
76d30c739cSEd Maste #include <sys/priv.h>
77d30c739cSEd Maste #include <sys/queue.h>
78d30c739cSEd Maste #include <sys/random.h>
79d30c739cSEd Maste #include <sys/socket.h>
80d30c739cSEd Maste #include <sys/stddef.h>
81d30c739cSEd Maste #include <sys/stdint.h>
82d30c739cSEd Maste #include <sys/sx.h>
83d30c739cSEd Maste #include <sys/sysctl.h>
84d30c739cSEd Maste #include <sys/systm.h>
85d30c739cSEd Maste #include <sys/unistd.h>
86d30c739cSEd Maste 
87d30c739cSEd Maste #include <net/if.h>
88d30c739cSEd Maste #include <net/if_var.h>
89d30c739cSEd Maste 
90d30c739cSEd Maste #include <netinet/in.h>
91d30c739cSEd Maste #include <netinet/ip.h>
92d30c739cSEd Maste 
93d30c739cSEd Maste #include "opt_platform.h"
94d30c739cSEd Maste 
95d30c739cSEd Maste #include <dev/usb/usb.h>
96d30c739cSEd Maste #include <dev/usb/usbdi.h>
97d30c739cSEd Maste #include <dev/usb/usbdi_util.h>
98d30c739cSEd Maste #include "usbdevs.h"
99d30c739cSEd Maste 
100d30c739cSEd Maste #define USB_DEBUG_VAR lan78xx_debug
101d30c739cSEd Maste #include <dev/usb/usb_debug.h>
102d30c739cSEd Maste #include <dev/usb/usb_process.h>
103d30c739cSEd Maste 
104d30c739cSEd Maste #include <dev/usb/net/usb_ethernet.h>
105d30c739cSEd Maste 
106d30c739cSEd Maste #include <dev/usb/net/if_mugereg.h>
107d30c739cSEd Maste 
108d30c739cSEd Maste #ifdef USB_DEBUG
109d30c739cSEd Maste static int muge_debug = 0;
110d30c739cSEd Maste 
111d30c739cSEd Maste SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0,
112d30c739cSEd Maste     "Microchip LAN78xx USB-GigE");
113d30c739cSEd Maste SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0,
114d30c739cSEd Maste     "Debug level");
115d30c739cSEd Maste #endif
116d30c739cSEd Maste 
117d30c739cSEd Maste #define MUGE_DEFAULT_RX_CSUM_ENABLE (false)
118d30c739cSEd Maste #define MUGE_DEFAULT_TX_CSUM_ENABLE (false)
119d30c739cSEd Maste #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false)
120d30c739cSEd Maste 
121d30c739cSEd Maste /* Supported Vendor and Product IDs. */
122d30c739cSEd Maste static const struct usb_device_id lan78xx_devs[] = {
123d30c739cSEd Maste #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
124d30c739cSEd Maste 	MUGE_DEV(LAN7800_ETH, 0),
125d30c739cSEd Maste #undef MUGE_DEV
126d30c739cSEd Maste };
127d30c739cSEd Maste 
128d30c739cSEd Maste #ifdef USB_DEBUG
129087522b8SAndreas Tobler #define muge_dbg_printf(sc, fmt, args...) \
130d30c739cSEd Maste do { \
131d30c739cSEd Maste 	if (muge_debug > 0) \
132d30c739cSEd Maste 		device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
133d30c739cSEd Maste } while(0)
134d30c739cSEd Maste #else
135d30c739cSEd Maste #define muge_dbg_printf(sc, fmt, args...) do { } while (0)
136d30c739cSEd Maste #endif
137d30c739cSEd Maste 
138d30c739cSEd Maste #define muge_warn_printf(sc, fmt, args...) \
139d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
140d30c739cSEd Maste 
141d30c739cSEd Maste #define muge_err_printf(sc, fmt, args...) \
142d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
143d30c739cSEd Maste 
144d30c739cSEd Maste #define ETHER_IS_ZERO(addr) \
145d30c739cSEd Maste 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
146d30c739cSEd Maste 
147d30c739cSEd Maste #define ETHER_IS_VALID(addr) \
148d30c739cSEd Maste 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
149d30c739cSEd Maste 
150d30c739cSEd Maste /* USB endpoints. */
151d30c739cSEd Maste 
152d30c739cSEd Maste enum {
153d30c739cSEd Maste 	MUGE_BULK_DT_RD,
154d30c739cSEd Maste 	MUGE_BULK_DT_WR,
155*e5151258SEd Maste #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */
156*e5151258SEd Maste 	MUGE_INTR_DT_WR,
157*e5151258SEd Maste 	MUGE_INTR_DT_RD,
158*e5151258SEd Maste #endif
159d30c739cSEd Maste 	MUGE_N_TRANSFER,
160d30c739cSEd Maste };
161d30c739cSEd Maste 
162d30c739cSEd Maste struct muge_softc {
163d30c739cSEd Maste 	struct usb_ether	sc_ue;
164d30c739cSEd Maste 	struct mtx		sc_mtx;
165d30c739cSEd Maste 	struct usb_xfer		*sc_xfer[MUGE_N_TRANSFER];
166d30c739cSEd Maste 	int			sc_phyno;
167d30c739cSEd Maste 
168d30c739cSEd Maste 	/* Settings for the mac control (MAC_CSR) register. */
169d30c739cSEd Maste 	uint32_t		sc_rfe_ctl;
170d30c739cSEd Maste 	uint32_t		sc_mdix_ctl;
171d30c739cSEd Maste 	uint32_t		sc_rev_id;
17248bc1758SEd Maste 	uint32_t		sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN];
173d30c739cSEd Maste 	uint32_t		sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2];
174d30c739cSEd Maste 
175d30c739cSEd Maste 	uint32_t		sc_flags;
176d30c739cSEd Maste #define MUGE_FLAG_LINK	0x0001
177d30c739cSEd Maste };
178d30c739cSEd Maste 
179d30c739cSEd Maste #define MUGE_IFACE_IDX		0
180d30c739cSEd Maste 
181d30c739cSEd Maste #define MUGE_LOCK(_sc)			mtx_lock(&(_sc)->sc_mtx)
182d30c739cSEd Maste #define MUGE_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
183d30c739cSEd Maste #define MUGE_LOCK_ASSERT(_sc, t)	mtx_assert(&(_sc)->sc_mtx, t)
184d30c739cSEd Maste 
185d30c739cSEd Maste static device_probe_t muge_probe;
186d30c739cSEd Maste static device_attach_t muge_attach;
187d30c739cSEd Maste static device_detach_t muge_detach;
188d30c739cSEd Maste 
189d30c739cSEd Maste static usb_callback_t muge_bulk_read_callback;
190d30c739cSEd Maste static usb_callback_t muge_bulk_write_callback;
191d30c739cSEd Maste 
192d30c739cSEd Maste static miibus_readreg_t lan78xx_miibus_readreg;
193d30c739cSEd Maste static miibus_writereg_t lan78xx_miibus_writereg;
194d30c739cSEd Maste static miibus_statchg_t lan78xx_miibus_statchg;
195d30c739cSEd Maste 
196d30c739cSEd Maste static int muge_attach_post_sub(struct usb_ether *ue);
197d30c739cSEd Maste static uether_fn_t muge_attach_post;
198d30c739cSEd Maste static uether_fn_t muge_init;
199d30c739cSEd Maste static uether_fn_t muge_stop;
200d30c739cSEd Maste static uether_fn_t muge_start;
201d30c739cSEd Maste static uether_fn_t muge_tick;
202d30c739cSEd Maste static uether_fn_t muge_setmulti;
203d30c739cSEd Maste static uether_fn_t muge_setpromisc;
204d30c739cSEd Maste 
205d30c739cSEd Maste static int muge_ifmedia_upd(struct ifnet *);
206d30c739cSEd Maste static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
207d30c739cSEd Maste 
208d30c739cSEd Maste static int lan78xx_chip_init(struct muge_softc *sc);
209d30c739cSEd Maste static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
210d30c739cSEd Maste 
211d30c739cSEd Maste static const struct usb_config muge_config[MUGE_N_TRANSFER] = {
212d30c739cSEd Maste 
213d30c739cSEd Maste 	[MUGE_BULK_DT_WR] = {
214d30c739cSEd Maste 		.type = UE_BULK,
215d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
216d30c739cSEd Maste 		.direction = UE_DIR_OUT,
217d30c739cSEd Maste 		.frames = 16,
218d30c739cSEd Maste 		.bufsize = 16 * (MCLBYTES + 16),
219d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
220d30c739cSEd Maste 		.callback = muge_bulk_write_callback,
221d30c739cSEd Maste 		.timeout = 10000,	/* 10 seconds */
222d30c739cSEd Maste 	},
223d30c739cSEd Maste 
224d30c739cSEd Maste 	[MUGE_BULK_DT_RD] = {
225d30c739cSEd Maste 		.type = UE_BULK,
226d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
227d30c739cSEd Maste 		.direction = UE_DIR_IN,
228d30c739cSEd Maste 		.bufsize = 20480,	/* bytes */
229d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
230d30c739cSEd Maste 		.callback = muge_bulk_read_callback,
231d30c739cSEd Maste 		.timeout = 0,	/* no timeout */
232d30c739cSEd Maste 	},
233d30c739cSEd Maste 	/*
234d30c739cSEd Maste 	 * The chip supports interrupt endpoints, however they aren't
235d30c739cSEd Maste 	 * needed as we poll on the MII status.
236d30c739cSEd Maste 	 */
237d30c739cSEd Maste };
238d30c739cSEd Maste 
239d30c739cSEd Maste static const struct usb_ether_methods muge_ue_methods = {
240d30c739cSEd Maste 	.ue_attach_post = muge_attach_post,
241d30c739cSEd Maste 	.ue_attach_post_sub = muge_attach_post_sub,
242d30c739cSEd Maste 	.ue_start = muge_start,
243d30c739cSEd Maste 	.ue_ioctl = muge_ioctl,
244d30c739cSEd Maste 	.ue_init = muge_init,
245d30c739cSEd Maste 	.ue_stop = muge_stop,
246d30c739cSEd Maste 	.ue_tick = muge_tick,
247d30c739cSEd Maste 	.ue_setmulti = muge_setmulti,
248d30c739cSEd Maste 	.ue_setpromisc = muge_setpromisc,
249d30c739cSEd Maste 	.ue_mii_upd = muge_ifmedia_upd,
250d30c739cSEd Maste 	.ue_mii_sts = muge_ifmedia_sts,
251d30c739cSEd Maste };
252d30c739cSEd Maste 
253d30c739cSEd Maste /**
254d30c739cSEd Maste  *	lan78xx_read_reg - Read a 32-bit register on the device
255d30c739cSEd Maste  *	@sc: driver soft context
256d30c739cSEd Maste  *	@off: offset of the register
257d30c739cSEd Maste  *	@data: pointer a value that will be populated with the register value
258d30c739cSEd Maste  *
259d30c739cSEd Maste  *	LOCKING:
260d30c739cSEd Maste  *	The device lock must be held before calling this function.
261d30c739cSEd Maste  *
262d30c739cSEd Maste  *	RETURNS:
263d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
264d30c739cSEd Maste  */
265d30c739cSEd Maste static int
266d30c739cSEd Maste lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data)
267d30c739cSEd Maste {
268d30c739cSEd Maste 	struct usb_device_request req;
269d30c739cSEd Maste 	uint32_t buf;
270d30c739cSEd Maste 	usb_error_t err;
271d30c739cSEd Maste 
272d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
273d30c739cSEd Maste 
274d30c739cSEd Maste 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
275d30c739cSEd Maste 	req.bRequest = UVR_READ_REG;
276d30c739cSEd Maste 	USETW(req.wValue, 0);
277d30c739cSEd Maste 	USETW(req.wIndex, off);
278d30c739cSEd Maste 	USETW(req.wLength, 4);
279d30c739cSEd Maste 
280d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
281d30c739cSEd Maste 	if (err != 0)
282d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to read register 0x%0x\n", off);
283d30c739cSEd Maste 	*data = le32toh(buf);
284d30c739cSEd Maste 	return (err);
285d30c739cSEd Maste }
286d30c739cSEd Maste 
287d30c739cSEd Maste /**
288d30c739cSEd Maste  *	lan78xx_write_reg - Write a 32-bit register on the device
289d30c739cSEd Maste  *	@sc: driver soft context
290d30c739cSEd Maste  *	@off: offset of the register
291d30c739cSEd Maste  *	@data: the 32-bit value to write into the register
292d30c739cSEd Maste  *
293d30c739cSEd Maste  *	LOCKING:
294d30c739cSEd Maste  *	The device lock must be held before calling this function.
295d30c739cSEd Maste  *
296d30c739cSEd Maste  *	RETURNS:
297d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
298d30c739cSEd Maste  */
299d30c739cSEd Maste static int
300d30c739cSEd Maste lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data)
301d30c739cSEd Maste {
302d30c739cSEd Maste 	struct usb_device_request req;
303d30c739cSEd Maste 	uint32_t buf;
304d30c739cSEd Maste 	usb_error_t err;
305d30c739cSEd Maste 
306d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
307d30c739cSEd Maste 
308d30c739cSEd Maste 	buf = htole32(data);
309d30c739cSEd Maste 
310d30c739cSEd Maste 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
311d30c739cSEd Maste 	req.bRequest = UVR_WRITE_REG;
312d30c739cSEd Maste 	USETW(req.wValue, 0);
313d30c739cSEd Maste 	USETW(req.wIndex, off);
314d30c739cSEd Maste 	USETW(req.wLength, 4);
315d30c739cSEd Maste 
316d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
317d30c739cSEd Maste 	if (err != 0)
318d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to write register 0x%0x\n", off);
319d30c739cSEd Maste 	return (err);
320d30c739cSEd Maste }
321d30c739cSEd Maste 
322d30c739cSEd Maste /**
323d30c739cSEd Maste  *	lan78xx_wait_for_bits - Poll on a register value until bits are cleared
324d30c739cSEd Maste  *	@sc: soft context
325d30c739cSEd Maste  *	@reg: offset of the register
326d30c739cSEd Maste  *	@bits: if the bits are clear the function returns
327d30c739cSEd Maste  *
328d30c739cSEd Maste  *	LOCKING:
329d30c739cSEd Maste  *	The device lock must be held before calling this function.
330d30c739cSEd Maste  *
331d30c739cSEd Maste  *	RETURNS:
332d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
333d30c739cSEd Maste  */
334d30c739cSEd Maste static int
335d30c739cSEd Maste lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits)
336d30c739cSEd Maste {
337d30c739cSEd Maste 	usb_ticks_t start_ticks;
338d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
339d30c739cSEd Maste 	uint32_t val;
340d30c739cSEd Maste 	int err;
341d30c739cSEd Maste 
342d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
343d30c739cSEd Maste 
344d30c739cSEd Maste 	start_ticks = (usb_ticks_t)ticks;
345d30c739cSEd Maste 	do {
346d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
347d30c739cSEd Maste 			return (err);
348d30c739cSEd Maste 		if (!(val & bits))
349d30c739cSEd Maste 			return (0);
350d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
351d30c739cSEd Maste 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
352d30c739cSEd Maste 
353d30c739cSEd Maste 	return (USB_ERR_TIMEOUT);
354d30c739cSEd Maste }
355d30c739cSEd Maste 
356d30c739cSEd Maste /**
357d30c739cSEd Maste  *	lan78xx_eeprom_read_raw - Read the attached EEPROM
358d30c739cSEd Maste  *	@sc: soft context
359d30c739cSEd Maste  *	@off: the eeprom address offset
360d30c739cSEd Maste  *	@buf: stores the bytes
361d30c739cSEd Maste  *	@buflen: the number of bytes to read
362d30c739cSEd Maste  *
363d30c739cSEd Maste  *	Simply reads bytes from an attached eeprom.
364d30c739cSEd Maste  *
365d30c739cSEd Maste  *	LOCKING:
366d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
367d30c739cSEd Maste  *
368d30c739cSEd Maste  *	RETURNS:
369d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
370d30c739cSEd Maste  */
371d30c739cSEd Maste static int
372d30c739cSEd Maste lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
373d30c739cSEd Maste     uint16_t buflen)
374d30c739cSEd Maste {
375d30c739cSEd Maste 	usb_ticks_t start_ticks;
376d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
377d30c739cSEd Maste 	int err, locked;
378d30c739cSEd Maste 	uint32_t val, saved;
379d30c739cSEd Maste 	uint16_t i;
380d30c739cSEd Maste 
381d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx); /* XXX */
382d30c739cSEd Maste 	if (!locked)
383d30c739cSEd Maste 		MUGE_LOCK(sc);
384d30c739cSEd Maste 
38548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
386d30c739cSEd Maste 	saved = val;
387d30c739cSEd Maste 
38848bc1758SEd Maste 	val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
38948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
390d30c739cSEd Maste 
39148bc1758SEd Maste 	err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_);
392d30c739cSEd Maste 	if (err != 0) {
393d30c739cSEd Maste 		muge_warn_printf(sc, "eeprom busy, failed to read data\n");
394d30c739cSEd Maste 		goto done;
395d30c739cSEd Maste 	}
396d30c739cSEd Maste 
397d30c739cSEd Maste 	/* Start reading the bytes, one at a time. */
398d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
39948bc1758SEd Maste 		val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
40048bc1758SEd Maste 		val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
40148bc1758SEd Maste 		if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
402d30c739cSEd Maste 			goto done;
403d30c739cSEd Maste 
404d30c739cSEd Maste 		start_ticks = (usb_ticks_t)ticks;
405d30c739cSEd Maste 		do {
40648bc1758SEd Maste 			if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
40748bc1758SEd Maste 			    0)
408d30c739cSEd Maste 				goto done;
40948bc1758SEd Maste 			if (!(val & ETH_E2P_CMD_BUSY_) ||
41048bc1758SEd Maste 			    (val & ETH_E2P_CMD_TIMEOUT_))
411d30c739cSEd Maste 				break;
412d30c739cSEd Maste 
413d30c739cSEd Maste 			uether_pause(&sc->sc_ue, hz / 100);
414d30c739cSEd Maste 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
415d30c739cSEd Maste 
41648bc1758SEd Maste 		if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
417d30c739cSEd Maste 			muge_warn_printf(sc, "eeprom command failed\n");
418d30c739cSEd Maste 			err = USB_ERR_IOERROR;
419d30c739cSEd Maste 			break;
420d30c739cSEd Maste 		}
421d30c739cSEd Maste 
42248bc1758SEd Maste 		if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
423d30c739cSEd Maste 			goto done;
424d30c739cSEd Maste 
425d30c739cSEd Maste 		buf[i] = (val & 0xff);
426d30c739cSEd Maste 	}
427d30c739cSEd Maste 
428d30c739cSEd Maste done:
429d30c739cSEd Maste 	if (!locked)
430d30c739cSEd Maste 		MUGE_UNLOCK(sc);
43148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_HW_CFG, saved);
432d30c739cSEd Maste 	return (err);
433d30c739cSEd Maste }
434d30c739cSEd Maste 
435d30c739cSEd Maste /**
436d30c739cSEd Maste  *	lan78xx_eeprom_read - Read EEPROM and confirm it is programmed
437d30c739cSEd Maste  *	@sc: soft context
438d30c739cSEd Maste  *	@off: the eeprom address offset
439d30c739cSEd Maste  *	@buf: stores the bytes
440d30c739cSEd Maste  *	@buflen: the number of bytes to read
441d30c739cSEd Maste  *
442d30c739cSEd Maste  *	RETURNS:
443d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
444d30c739cSEd Maste  */
445d30c739cSEd Maste static int
446d30c739cSEd Maste lan78xx_eeprom_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
447d30c739cSEd Maste     uint16_t buflen)
448d30c739cSEd Maste {
449d30c739cSEd Maste 	uint8_t sig;
450d30c739cSEd Maste 	int ret;
451d30c739cSEd Maste 
45248bc1758SEd Maste 	ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1);
45348bc1758SEd Maste 	if ((ret == 0) && (sig == ETH_E2P_INDICATOR)) {
454d30c739cSEd Maste 		ret = lan78xx_eeprom_read_raw(sc, off, buf, buflen);
455d30c739cSEd Maste 		muge_dbg_printf(sc, "EEPROM present\n");
456d30c739cSEd Maste 	} else {
457d30c739cSEd Maste 		ret = -EINVAL;
458d30c739cSEd Maste 		muge_dbg_printf(sc, "EEPROM not present\n");
459d30c739cSEd Maste 	}
460*e5151258SEd Maste 	return (ret);
461d30c739cSEd Maste }
462d30c739cSEd Maste 
463d30c739cSEd Maste /**
464d30c739cSEd Maste  *	lan78xx_otp_read_raw
465d30c739cSEd Maste  *	@sc: soft context
466d30c739cSEd Maste  *	@off: the otp address offset
467d30c739cSEd Maste  *	@buf: stores the bytes
468d30c739cSEd Maste  *	@buflen: the number of bytes to read
469d30c739cSEd Maste  *
470d30c739cSEd Maste  *	Simply reads bytes from the OTP.
471d30c739cSEd Maste  *
472d30c739cSEd Maste  *	LOCKING:
473d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
474d30c739cSEd Maste  *
475d30c739cSEd Maste  *	RETURNS:
476d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
477d30c739cSEd Maste  *
478d30c739cSEd Maste  */
479d30c739cSEd Maste static int
480d30c739cSEd Maste lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
481d30c739cSEd Maste     uint16_t buflen)
482d30c739cSEd Maste {
483d30c739cSEd Maste 	int locked, err;
484d30c739cSEd Maste 	uint32_t val;
485d30c739cSEd Maste 	uint16_t i;
486d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
487d30c739cSEd Maste 	if (!locked)
488d30c739cSEd Maste 		MUGE_LOCK(sc);
489d30c739cSEd Maste 
490d30c739cSEd Maste 	err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
491d30c739cSEd Maste 
492*e5151258SEd Maste 	/* Checking if bit is set. */
493d30c739cSEd Maste 	if (val & OTP_PWR_DN_PWRDN_N) {
494*e5151258SEd Maste 		/* Clear it, then wait for it to be cleared. */
495d30c739cSEd Maste 		lan78xx_write_reg(sc, OTP_PWR_DN, 0);
496d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N);
497d30c739cSEd Maste 		if (err != 0) {
498d30c739cSEd Maste 			muge_warn_printf(sc, "OTP off? failed to read data\n");
499d30c739cSEd Maste 			goto done;
500d30c739cSEd Maste 		}
501d30c739cSEd Maste 	}
502*e5151258SEd Maste 	/* Start reading the bytes, one at a time. */
503d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
504d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR1,
505d30c739cSEd Maste 		    ((off + i) >> 8) & OTP_ADDR1_15_11);
506d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR2,
507d30c739cSEd Maste 		    ((off + i) & OTP_ADDR2_10_3));
508d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
509d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_);
510d30c739cSEd Maste 
511d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_);
512d30c739cSEd Maste 		if (err != 0) {
513d30c739cSEd Maste 			muge_warn_printf(sc, "OTP busy failed to read data\n");
514d30c739cSEd Maste 			goto done;
515d30c739cSEd Maste 		}
516d30c739cSEd Maste 
517d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
518d30c739cSEd Maste 			goto done;
519d30c739cSEd Maste 
520d30c739cSEd Maste 		buf[i] = (uint8_t)(val & 0xff);
521d30c739cSEd Maste 	}
522d30c739cSEd Maste 
523d30c739cSEd Maste done:
524d30c739cSEd Maste 	if (!locked)
525d30c739cSEd Maste 		MUGE_UNLOCK(sc);
526d30c739cSEd Maste 	return (err);
527d30c739cSEd Maste }
528d30c739cSEd Maste 
529d30c739cSEd Maste /**
530d30c739cSEd Maste  *	lan78xx_otp_read
531d30c739cSEd Maste  *	@sc: soft context
532d30c739cSEd Maste  *	@off: the otp address offset
533d30c739cSEd Maste  *	@buf: stores the bytes
534d30c739cSEd Maste  *	@buflen: the number of bytes to read
535d30c739cSEd Maste  *
536d30c739cSEd Maste  *	Simply reads bytes from the otp.
537d30c739cSEd Maste  *
538d30c739cSEd Maste  *	LOCKING:
539d30c739cSEd Maste  *	The function takes and releases device lock if it is not already held.
540d30c739cSEd Maste  *
541d30c739cSEd Maste  *	RETURNS:
542d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
543d30c739cSEd Maste  */
544d30c739cSEd Maste static int
545d30c739cSEd Maste lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
546d30c739cSEd Maste     uint16_t buflen)
547d30c739cSEd Maste {
548d30c739cSEd Maste 	uint8_t sig;
549d30c739cSEd Maste 	int err;
550d30c739cSEd Maste 
551d30c739cSEd Maste 	err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1);
552d30c739cSEd Maste 	if (err == 0) {
553d30c739cSEd Maste 		if (sig == OTP_INDICATOR_1) {
554d30c739cSEd Maste 		} else if (sig == OTP_INDICATOR_2) {
555*e5151258SEd Maste 			off += 0x100; /* XXX */
556d30c739cSEd Maste 		} else {
557d30c739cSEd Maste 			err = -EINVAL;
558d30c739cSEd Maste 		}
559d30c739cSEd Maste 		if (!err)
560d30c739cSEd Maste 			err = lan78xx_otp_read_raw(sc, off, buf, buflen);
561d30c739cSEd Maste 	}
562*e5151258SEd Maste 	return (err);
563d30c739cSEd Maste }
564d30c739cSEd Maste 
565d30c739cSEd Maste /**
566d30c739cSEd Maste  *	lan78xx_setmacaddress - Set the mac address in the device
567d30c739cSEd Maste  *	@sc: driver soft context
568d30c739cSEd Maste  *	@addr: pointer to array contain at least 6 bytes of the mac
569d30c739cSEd Maste  *
570d30c739cSEd Maste  *	LOCKING:
571d30c739cSEd Maste  *	Should be called with the MUGE lock held.
572d30c739cSEd Maste  *
573d30c739cSEd Maste  *	RETURNS:
574d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
575d30c739cSEd Maste  */
576d30c739cSEd Maste static int
577d30c739cSEd Maste lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr)
578d30c739cSEd Maste {
579d30c739cSEd Maste 	int err;
580d30c739cSEd Maste 	uint32_t val;
581d30c739cSEd Maste 
582d30c739cSEd Maste 	muge_dbg_printf(sc,
583d30c739cSEd Maste 	    "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
584d30c739cSEd Maste 	    addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
585d30c739cSEd Maste 
586d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
587d30c739cSEd Maste 
588d30c739cSEd Maste 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
58948bc1758SEd Maste 	if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
590d30c739cSEd Maste 		goto done;
591d30c739cSEd Maste 
592d30c739cSEd Maste 	val = (addr[5] << 8) | addr[4];
59348bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
594d30c739cSEd Maste 
595d30c739cSEd Maste done:
596d30c739cSEd Maste 	return (err);
597d30c739cSEd Maste }
598d30c739cSEd Maste 
599d30c739cSEd Maste /**
600d30c739cSEd Maste  *	lan78xx_set_rx_max_frame_length
601d30c739cSEd Maste  *	@sc: driver soft context
602d30c739cSEd Maste  *	@size: pointer to array contain at least 6 bytes of the mac
603d30c739cSEd Maste  *
604d30c739cSEd Maste  *	Sets the maximum frame length to be received. Frames bigger than
605d30c739cSEd Maste  *	this size are aborted.
606d30c739cSEd Maste  *
607d30c739cSEd Maste  *	RETURNS:
608d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
609d30c739cSEd Maste  */
610d30c739cSEd Maste static int
611d30c739cSEd Maste lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size)
612d30c739cSEd Maste {
613d30c739cSEd Maste 	int err = 0;
614d30c739cSEd Maste 	uint32_t buf;
615d30c739cSEd Maste 	bool rxenabled;
616d30c739cSEd Maste 
617*e5151258SEd Maste 	/* First we have to disable rx before changing the length. */
61848bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
61948bc1758SEd Maste 	rxenabled = ((buf & ETH_MAC_RX_EN_) != 0);
620d30c739cSEd Maste 
621d30c739cSEd Maste 	if (rxenabled) {
62248bc1758SEd Maste 		buf &= ~ETH_MAC_RX_EN_;
62348bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
624d30c739cSEd Maste 	}
625d30c739cSEd Maste 
626*e5151258SEd Maste 	/* Setting max frame length. */
62748bc1758SEd Maste 	buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_;
62848bc1758SEd Maste 	buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) &
62948bc1758SEd Maste 	    ETH_MAC_RX_MAX_FR_SIZE_MASK_);
63048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
631d30c739cSEd Maste 
632d30c739cSEd Maste 	/* If it were enabled before, we enable it back. */
633d30c739cSEd Maste 
634d30c739cSEd Maste 	if (rxenabled) {
63548bc1758SEd Maste 		buf |= ETH_MAC_RX_EN_;
63648bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
637d30c739cSEd Maste 	}
638d30c739cSEd Maste 
639*e5151258SEd Maste 	return (0);
640d30c739cSEd Maste }
641d30c739cSEd Maste 
642d30c739cSEd Maste /**
643d30c739cSEd Maste  *	lan78xx_miibus_readreg - Read a MII/MDIO register
644d30c739cSEd Maste  *	@dev: usb ether device
645d30c739cSEd Maste  *	@phy: the number of phy reading from
646d30c739cSEd Maste  *	@reg: the register address
647d30c739cSEd Maste  *
648d30c739cSEd Maste  *	LOCKING:
649d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
650d30c739cSEd Maste  *
651d30c739cSEd Maste  *	RETURNS:
652d30c739cSEd Maste  *	Returns the 16-bits read from the MII register, if this function fails
653d30c739cSEd Maste  *	0 is returned.
654d30c739cSEd Maste  */
655d30c739cSEd Maste static int
656d30c739cSEd Maste lan78xx_miibus_readreg(device_t dev, int phy, int reg) {
657d30c739cSEd Maste 
658d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
659d30c739cSEd Maste 	int locked;
660d30c739cSEd Maste 	uint32_t addr, val;
661d30c739cSEd Maste 
662d30c739cSEd Maste 	val = 0;
663d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
664d30c739cSEd Maste 	if (!locked)
665d30c739cSEd Maste 		MUGE_LOCK(sc);
666d30c739cSEd Maste 
66748bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
66848bc1758SEd Maste 	    0) {
669d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
670d30c739cSEd Maste 		goto done;
671d30c739cSEd Maste 	}
672d30c739cSEd Maste 
67348bc1758SEd Maste 	addr = (phy << 11) | (reg << 6) |
67448bc1758SEd Maste 	    ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_;
67548bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
676d30c739cSEd Maste 
67748bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
67848bc1758SEd Maste 	    0) {
679d30c739cSEd Maste 		muge_warn_printf(sc, "MII read timeout\n");
680d30c739cSEd Maste 		goto done;
681d30c739cSEd Maste 	}
682d30c739cSEd Maste 
68348bc1758SEd Maste 	lan78xx_read_reg(sc, ETH_MII_DATA, &val);
684d30c739cSEd Maste 	val = le32toh(val);
685d30c739cSEd Maste 
686d30c739cSEd Maste done:
687d30c739cSEd Maste 	if (!locked)
688d30c739cSEd Maste 		MUGE_UNLOCK(sc);
689d30c739cSEd Maste 
690d30c739cSEd Maste 	return (val & 0xFFFF);
691d30c739cSEd Maste }
692d30c739cSEd Maste 
693d30c739cSEd Maste /**
694d30c739cSEd Maste  *	lan78xx_miibus_writereg - Writes a MII/MDIO register
695d30c739cSEd Maste  *	@dev: usb ether device
696d30c739cSEd Maste  *	@phy: the number of phy writing to
697d30c739cSEd Maste  *	@reg: the register address
698d30c739cSEd Maste  *	@val: the value to write
699d30c739cSEd Maste  *
700d30c739cSEd Maste  *	Attempts to write a PHY register through the usb controller registers.
701d30c739cSEd Maste  *
702d30c739cSEd Maste  *	LOCKING:
703d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
704d30c739cSEd Maste  *
705d30c739cSEd Maste  *	RETURNS:
706d30c739cSEd Maste  *	Always returns 0 regardless of success or failure.
707d30c739cSEd Maste  */
708d30c739cSEd Maste static int
709d30c739cSEd Maste lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
710d30c739cSEd Maste {
711d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
712d30c739cSEd Maste 	int locked;
713d30c739cSEd Maste 	uint32_t addr;
714d30c739cSEd Maste 
715d30c739cSEd Maste 	if (sc->sc_phyno != phy)
716d30c739cSEd Maste 		return (0);
717d30c739cSEd Maste 
718d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
719d30c739cSEd Maste 	if (!locked)
720d30c739cSEd Maste 		MUGE_LOCK(sc);
721d30c739cSEd Maste 
72248bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
72348bc1758SEd Maste 	    0) {
724d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
725d30c739cSEd Maste 		goto done;
726d30c739cSEd Maste 	}
727d30c739cSEd Maste 
728d30c739cSEd Maste 	val = htole32(val);
72948bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_DATA, val);
730d30c739cSEd Maste 
731*e5151258SEd Maste 	addr = (phy << 11) | (reg << 6) |
732*e5151258SEd Maste 	    ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_;
73348bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
734d30c739cSEd Maste 
73548bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0)
736d30c739cSEd Maste 		muge_warn_printf(sc, "MII write timeout\n");
737d30c739cSEd Maste 
738d30c739cSEd Maste done:
739d30c739cSEd Maste 	if (!locked)
740d30c739cSEd Maste 		MUGE_UNLOCK(sc);
741d30c739cSEd Maste 	return (0);
742d30c739cSEd Maste }
743d30c739cSEd Maste 
744d30c739cSEd Maste /*
745d30c739cSEd Maste  *	lan78xx_miibus_statchg - Called to detect phy status change
746d30c739cSEd Maste  *	@dev: usb ether device
747d30c739cSEd Maste  *
748d30c739cSEd Maste  *	This function is called periodically by the system to poll for status
749d30c739cSEd Maste  *	changes of the link.
750d30c739cSEd Maste  *
751d30c739cSEd Maste  *	LOCKING:
752d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
753d30c739cSEd Maste  */
754d30c739cSEd Maste static void
755d30c739cSEd Maste lan78xx_miibus_statchg(device_t dev)
756d30c739cSEd Maste {
757d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
758d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
759d30c739cSEd Maste 	struct ifnet *ifp;
760d30c739cSEd Maste 	int locked;
761d30c739cSEd Maste 	int err;
762d30c739cSEd Maste 	uint32_t flow = 0;
763d30c739cSEd Maste 	uint32_t fct_flow = 0;
764d30c739cSEd Maste 
765d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
766d30c739cSEd Maste 	if (!locked)
767d30c739cSEd Maste 		MUGE_LOCK(sc);
768d30c739cSEd Maste 
769d30c739cSEd Maste 	ifp = uether_getifp(&sc->sc_ue);
770d30c739cSEd Maste 	if (mii == NULL || ifp == NULL ||
771d30c739cSEd Maste 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
772d30c739cSEd Maste 		goto done;
773d30c739cSEd Maste 
774d30c739cSEd Maste 	/* Use the MII status to determine link status */
775d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
776d30c739cSEd Maste 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
777d30c739cSEd Maste 	    (IFM_ACTIVE | IFM_AVALID)) {
778d30c739cSEd Maste 		muge_dbg_printf(sc, "media is active\n");
779d30c739cSEd Maste 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
780d30c739cSEd Maste 		case IFM_10_T:
781d30c739cSEd Maste 		case IFM_100_TX:
782d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
783d30c739cSEd Maste 			muge_dbg_printf(sc, "10/100 ethernet\n");
784d30c739cSEd Maste 			break;
785d30c739cSEd Maste 		case IFM_1000_T:
786d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
787d30c739cSEd Maste 			muge_dbg_printf(sc, "Gigabit ethernet\n");
788d30c739cSEd Maste 			break;
789d30c739cSEd Maste 		default:
790d30c739cSEd Maste 			break;
791d30c739cSEd Maste 		}
792d30c739cSEd Maste 	}
793d30c739cSEd Maste 	/* Lost link, do nothing. */
794d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
795d30c739cSEd Maste 		muge_dbg_printf(sc, "link flag not set\n");
796d30c739cSEd Maste 		goto done;
797d30c739cSEd Maste 	}
798d30c739cSEd Maste 
79948bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow);
800d30c739cSEd Maste 	if (err) {
801d30c739cSEd Maste 		muge_warn_printf(sc,
802d30c739cSEd Maste 		   "failed to read initial flow control thresholds, error %d\n",
803d30c739cSEd Maste 		    err);
804d30c739cSEd Maste 		goto done;
805d30c739cSEd Maste 	}
806d30c739cSEd Maste 
807*e5151258SEd Maste 	/* Enable/disable full duplex operation and TX/RX pause. */
808d30c739cSEd Maste 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
809d30c739cSEd Maste 		muge_dbg_printf(sc, "full duplex operation\n");
810d30c739cSEd Maste 
811*e5151258SEd Maste 		/* Enable transmit MAC flow control function. */
812d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
81348bc1758SEd Maste 			flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF;
814d30c739cSEd Maste 
815d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
81648bc1758SEd Maste 			flow |= ETH_FLOW_CR_RX_FCEN_;
817d30c739cSEd Maste 	}
818d30c739cSEd Maste 
819*e5151258SEd Maste 	/* XXX Flow control settings obtained from Microchip's driver. */
820d30c739cSEd Maste 	switch(usbd_get_speed(sc->sc_ue.ue_udev)) {
821d30c739cSEd Maste 	case USB_SPEED_SUPER:
822*e5151258SEd Maste 		fct_flow = 0x817;
823d30c739cSEd Maste 		break;
824d30c739cSEd Maste 	case USB_SPEED_HIGH:
825*e5151258SEd Maste 		fct_flow = 0x211;
826d30c739cSEd Maste 		break;
827d30c739cSEd Maste 	default:
828d30c739cSEd Maste 		break;
829d30c739cSEd Maste 	}
830d30c739cSEd Maste 
83148bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FLOW, flow);
83248bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow);
833d30c739cSEd Maste 	if (err)
834d30c739cSEd Maste 		muge_warn_printf(sc, "media change failed, error %d\n", err);
835d30c739cSEd Maste 
836d30c739cSEd Maste done:
837d30c739cSEd Maste 	if (!locked)
838d30c739cSEd Maste 		MUGE_UNLOCK(sc);
839d30c739cSEd Maste }
840d30c739cSEd Maste 
841d30c739cSEd Maste /*
842d30c739cSEd Maste  *	lan78xx_set_mdix_auto - Configure the device to enable automatic
843d30c739cSEd Maste  *	crossover and polarity detection.  LAN7800 provides HP Auto-MDIX
844d30c739cSEd Maste  *	functionality for seamless crossover and polarity detection.
845d30c739cSEd Maste  *
846d30c739cSEd Maste  *	@sc: driver soft context
847d30c739cSEd Maste  *
848d30c739cSEd Maste  *	LOCKING:
849d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
850d30c739cSEd Maste  */
851d30c739cSEd Maste static void
852d30c739cSEd Maste lan78xx_set_mdix_auto(struct muge_softc *sc)
853d30c739cSEd Maste {
854d30c739cSEd Maste 	uint32_t buf, err;
855d30c739cSEd Maste 
856d30c739cSEd Maste 	err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
857d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1);
858d30c739cSEd Maste 
859d30c739cSEd Maste 	buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
860d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL);
861d30c739cSEd Maste 	buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_;
862d30c739cSEd Maste 	buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_;
863d30c739cSEd Maste 
864d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
865d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
866d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL, buf);
867d30c739cSEd Maste 
868d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
869d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0);
870d30c739cSEd Maste 
871d30c739cSEd Maste 	if (err != 0)
872d30c739cSEd Maste 		muge_warn_printf(sc, "error setting PHY's MDIX status\n");
873d30c739cSEd Maste 
874d30c739cSEd Maste 	sc->sc_mdix_ctl = buf;
875d30c739cSEd Maste }
876d30c739cSEd Maste 
877d30c739cSEd Maste /**
878d30c739cSEd Maste  *	lan78xx_phy_init - Initialises the in-built MUGE phy
879d30c739cSEd Maste  *	@sc: driver soft context
880d30c739cSEd Maste  *
881d30c739cSEd Maste  *	Resets the PHY part of the chip and then initialises it to default
882d30c739cSEd Maste  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
883d30c739cSEd Maste  *	from the PHY are also enabled, however we don't monitor the interrupt
884d30c739cSEd Maste  *	endpoints for the moment.
885d30c739cSEd Maste  *
886d30c739cSEd Maste  *	RETURNS:
887d30c739cSEd Maste  *	Returns 0 on success or EIO if failed to reset the PHY.
888d30c739cSEd Maste  */
889d30c739cSEd Maste static int
890d30c739cSEd Maste lan78xx_phy_init(struct muge_softc *sc)
891d30c739cSEd Maste {
892d30c739cSEd Maste 	muge_dbg_printf(sc, "Initializing PHY.\n");
893d30c739cSEd Maste 	uint16_t bmcr;
894d30c739cSEd Maste 	usb_ticks_t start_ticks;
895d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
896d30c739cSEd Maste 
897d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
898d30c739cSEd Maste 
899*e5151258SEd Maste 	/* Reset phy and wait for reset to complete. */
900d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,
901d30c739cSEd Maste 	    BMCR_RESET);
902d30c739cSEd Maste 
903d30c739cSEd Maste 	start_ticks = ticks;
904d30c739cSEd Maste 	do {
905d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
906d30c739cSEd Maste 		bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
907d30c739cSEd Maste 		    MII_BMCR);
908d30c739cSEd Maste 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
909d30c739cSEd Maste 
910d30c739cSEd Maste 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
911d30c739cSEd Maste 		muge_err_printf(sc, "PHY reset timed-out\n");
912d30c739cSEd Maste 		return (EIO);
913d30c739cSEd Maste 	}
914d30c739cSEd Maste 
915d30c739cSEd Maste 	/* Setup phy to interrupt upon link down or autoneg completion. */
916d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
917d30c739cSEd Maste 	    MUGE_PHY_INTR_STAT);
918d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
919d30c739cSEd Maste 	    MUGE_PHY_INTR_MASK,
920d30c739cSEd Maste 	    (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE));
921d30c739cSEd Maste 
922d30c739cSEd Maste 	/* Enable Auto-MDIX for crossover and polarity detection. */
923d30c739cSEd Maste 	lan78xx_set_mdix_auto(sc);
924d30c739cSEd Maste 
925d30c739cSEd Maste 	/* Enable all modes. */
926d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
927d30c739cSEd Maste 	    ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |
928d30c739cSEd Maste 	    ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM);
929d30c739cSEd Maste 
930*e5151258SEd Maste 	/* Restart auto-negotation. */
931d30c739cSEd Maste 	bmcr |= BMCR_STARTNEG;
932d30c739cSEd Maste 	bmcr |= BMCR_AUTOEN;
933d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
934d30c739cSEd Maste 	bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
935d30c739cSEd Maste 	return (0);
936d30c739cSEd Maste }
937d30c739cSEd Maste 
938d30c739cSEd Maste /**
939d30c739cSEd Maste  *	lan78xx_chip_init - Initialises the chip after power on
940d30c739cSEd Maste  *	@sc: driver soft context
941d30c739cSEd Maste  *
942d30c739cSEd Maste  *	This initialisation sequence is modelled on the procedure in the Linux
943d30c739cSEd Maste  *	driver.
944d30c739cSEd Maste  *
945d30c739cSEd Maste  *	RETURNS:
946d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
947d30c739cSEd Maste  */
948d30c739cSEd Maste static int
949d30c739cSEd Maste lan78xx_chip_init(struct muge_softc *sc)
950d30c739cSEd Maste {
951d30c739cSEd Maste 	int err;
952d30c739cSEd Maste 	int locked;
953d30c739cSEd Maste 	uint32_t buf;
954d30c739cSEd Maste 	uint32_t burst_cap;
955d30c739cSEd Maste 
956d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
957d30c739cSEd Maste 	if (!locked)
958d30c739cSEd Maste 		MUGE_LOCK(sc);
959d30c739cSEd Maste 
960*e5151258SEd Maste 	/* Enter H/W config mode. */
96148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_);
962d30c739cSEd Maste 
96348bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) !=
96448bc1758SEd Maste 	    0) {
965d30c739cSEd Maste 		muge_warn_printf(sc,
966d30c739cSEd Maste 		    "timed-out waiting for lite reset to complete\n");
967d30c739cSEd Maste 		goto init_failed;
968d30c739cSEd Maste 	}
969d30c739cSEd Maste 
970*e5151258SEd Maste 	/* Set the mac address. */
971d30c739cSEd Maste 	if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
972d30c739cSEd Maste 		muge_warn_printf(sc, "failed to set the MAC address\n");
973d30c739cSEd Maste 		goto init_failed;
974d30c739cSEd Maste 	}
975d30c739cSEd Maste 
976*e5151258SEd Maste 	/* Read and display the revision register. */
97748bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &sc->sc_rev_id)) < 0) {
97848bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n",
97948bc1758SEd Maste 		    err);
980d30c739cSEd Maste 		goto init_failed;
981d30c739cSEd Maste 	}
982d30c739cSEd Maste 
983d30c739cSEd Maste 	device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n",
98448bc1758SEd Maste 		(sc->sc_rev_id & ETH_ID_REV_CHIP_ID_MASK_) >> 16,
98548bc1758SEd Maste 		(sc->sc_rev_id & ETH_ID_REV_CHIP_REV_MASK_));
986d30c739cSEd Maste 
987d30c739cSEd Maste 	/* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */
98848bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) {
98948bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err);
990d30c739cSEd Maste 		goto init_failed;
991d30c739cSEd Maste 	}
99248bc1758SEd Maste 	buf |= ETH_USB_CFG_BIR_;
99348bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
994d30c739cSEd Maste 
995d30c739cSEd Maste 	/*
996*e5151258SEd Maste 	 * XXX LTM support will go here.
997d30c739cSEd Maste 	 */
998d30c739cSEd Maste 
999d30c739cSEd Maste 	/* Configuring the burst cap. */
1000d30c739cSEd Maste 	switch (usbd_get_speed(sc->sc_ue.ue_udev)) {
1001d30c739cSEd Maste 	case USB_SPEED_SUPER:
1002d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE;
1003d30c739cSEd Maste 		break;
1004d30c739cSEd Maste 	case USB_SPEED_HIGH:
1005d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE;
1006d30c739cSEd Maste 		break;
1007d30c739cSEd Maste 	default:
1008d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE;
1009d30c739cSEd Maste 	}
1010d30c739cSEd Maste 
101148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap);
1012d30c739cSEd Maste 
1013*e5151258SEd Maste 	/* Set the default bulk in delay (same value from Linux driver). */
101448bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY);
1015d30c739cSEd Maste 
1016*e5151258SEd Maste 	/* Multiple ethernet frames per USB packets. */
101748bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf);
101848bc1758SEd Maste 	buf |= ETH_HW_CFG_MEF_;
101948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_HW_CFG, buf);
1020d30c739cSEd Maste 
1021d30c739cSEd Maste 	/* Enable burst cap. */
102248bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) {
102348bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n",
1024d30c739cSEd Maste 		    err);
1025d30c739cSEd Maste 		goto init_failed;
1026d30c739cSEd Maste 	}
102748bc1758SEd Maste 	buf |= ETH_USB_CFG_BCE_;
102848bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1029d30c739cSEd Maste 
1030d30c739cSEd Maste 	/*
1031d30c739cSEd Maste 	 * Set FCL's RX and TX FIFO sizes: according to data sheet this is
1032d30c739cSEd Maste 	 * already the default value. But we initialize it to the same value
1033d30c739cSEd Maste 	 * anyways, as that's what the Linux driver does.
1034d30c739cSEd Maste 	 *
1035d30c739cSEd Maste 	 */
1036d30c739cSEd Maste 	buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512;
103748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf);
1038d30c739cSEd Maste 
1039d30c739cSEd Maste 	buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512;
104048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf);
1041d30c739cSEd Maste 
1042d30c739cSEd Maste 	/* Enabling interrupts. (Not using them for now) */
104348bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_);
1044d30c739cSEd Maste 
1045d30c739cSEd Maste 	/*
1046d30c739cSEd Maste 	 * Initializing flow control registers to 0.  These registers are
1047d30c739cSEd Maste 	 * properly set is handled in link-reset function in the Linux driver.
1048d30c739cSEd Maste 	 */
104948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FLOW, 0);
105048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0);
1051d30c739cSEd Maste 
1052d30c739cSEd Maste 	/*
1053d30c739cSEd Maste 	 * Settings for the RFE, we enable broadcast and destination address
1054d30c739cSEd Maste 	 * perfect filtering.
1055d30c739cSEd Maste 	 */
105648bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf);
105748bc1758SEd Maste 	buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_;
105848bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf);
1059d30c739cSEd Maste 
1060d30c739cSEd Maste 	/*
1061d30c739cSEd Maste 	 * At this point the Linux driver writes multicast tables, and enables
1062d30c739cSEd Maste 	 * checksum engines. But in FreeBSD that gets done in muge_init,
1063d30c739cSEd Maste 	 * which gets called when the interface is brought up.
1064d30c739cSEd Maste 	 */
1065d30c739cSEd Maste 
1066d30c739cSEd Maste 	/* Reset the PHY. */
106748bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_);
106848bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL,
106948bc1758SEd Maste 	    ETH_PMT_CTL_PHY_RST_)) != 0) {
1070d30c739cSEd Maste 		muge_warn_printf(sc,
1071d30c739cSEd Maste 		    "timed-out waiting for phy reset to complete\n");
1072d30c739cSEd Maste 		goto init_failed;
1073d30c739cSEd Maste 	}
1074d30c739cSEd Maste 
1075d30c739cSEd Maste 	/* Enable automatic duplex detection and automatic speed detection. */
107648bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf);
107748bc1758SEd Maste 	buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_;
107848bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_CR, buf);
1079d30c739cSEd Maste 
1080d30c739cSEd Maste 	/*
1081d30c739cSEd Maste 	 * Enable PHY interrupts (Not really getting used for now)
108248bc1758SEd Maste 	 * ETH_INT_EP_CTL: interrupt endpoint control register
1083d30c739cSEd Maste 	 * phy events cause interrupts to be issued
1084d30c739cSEd Maste 	 */
108548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf);
108648bc1758SEd Maste 	buf |= ETH_INT_ENP_PHY_INT;
108748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf);
1088d30c739cSEd Maste 
1089d30c739cSEd Maste 	/*
1090d30c739cSEd Maste 	 * Enables mac's transmitter.  It will transmit frames from the buffer
1091d30c739cSEd Maste 	 * onto the cable.
1092d30c739cSEd Maste 	 */
109348bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf);
109448bc1758SEd Maste 	buf |= ETH_MAC_TX_TXEN_;
109548bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_TX, buf);
1096d30c739cSEd Maste 
1097*e5151258SEd Maste 	/* FIFO is capable of transmitting frames to MAC. */
109848bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf);
109948bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
110048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf);
1101d30c739cSEd Maste 
1102d30c739cSEd Maste 	/*
1103d30c739cSEd Maste 	 * Set max frame length.  In linux this is dev->mtu (which by default
1104*e5151258SEd Maste 	 * is 1500) + VLAN_ETH_HLEN = 1518.
1105d30c739cSEd Maste 	 */
1106d30c739cSEd Maste 	err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN);
1107d30c739cSEd Maste 
1108*e5151258SEd Maste 	/* Initialise the PHY. */
1109d30c739cSEd Maste 	if ((err = lan78xx_phy_init(sc)) != 0)
1110d30c739cSEd Maste 		goto init_failed;
1111d30c739cSEd Maste 
1112*e5151258SEd Maste 	/* Enable MAC RX. */
111348bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
111448bc1758SEd Maste 	buf |= ETH_MAC_RX_EN_;
111548bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
1116d30c739cSEd Maste 
1117*e5151258SEd Maste 	/* Enable FIFO controller RX. */
111848bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf);
111948bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
112048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf);
1121d30c739cSEd Maste 
1122*e5151258SEd Maste 	return (0);
1123d30c739cSEd Maste 
1124d30c739cSEd Maste init_failed:
1125d30c739cSEd Maste 	if (!locked)
1126d30c739cSEd Maste 		MUGE_UNLOCK(sc);
1127d30c739cSEd Maste 
1128d30c739cSEd Maste 	muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err);
1129d30c739cSEd Maste 	return (err);
1130d30c739cSEd Maste }
1131d30c739cSEd Maste 
1132d30c739cSEd Maste static void
1133d30c739cSEd Maste muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
1134d30c739cSEd Maste {
1135d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1136d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
1137d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1138d30c739cSEd Maste 	struct mbuf *m;
1139d30c739cSEd Maste 	struct usb_page_cache *pc;
1140d30c739cSEd Maste 	uint16_t pktlen;
1141d30c739cSEd Maste 	uint32_t rx_cmd_a, rx_cmd_b;
1142d30c739cSEd Maste 	uint16_t rx_cmd_c;
1143d30c739cSEd Maste 	int off;
1144d30c739cSEd Maste 	int actlen;
1145d30c739cSEd Maste 
1146d30c739cSEd Maste 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
1147d30c739cSEd Maste 	muge_dbg_printf(sc, "rx : actlen %d\n", actlen);
1148d30c739cSEd Maste 
1149d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1150d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1151d30c739cSEd Maste 
1152d30c739cSEd Maste 		/*
1153d30c739cSEd Maste 		 * There is always a zero length frame after bringing the
1154d30c739cSEd Maste 		 * interface up.
1155d30c739cSEd Maste 		 */
1156d30c739cSEd Maste 		if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN))
1157d30c739cSEd Maste 			goto tr_setup;
1158d30c739cSEd Maste 
1159d30c739cSEd Maste 		/*
1160d30c739cSEd Maste 		 * There may be multiple packets in the USB frame.  Each will
1161d30c739cSEd Maste 		 * have a header and each needs to have its own mbuf allocated
1162d30c739cSEd Maste 		 * and populated for it.
1163d30c739cSEd Maste 		 */
1164d30c739cSEd Maste 		pc = usbd_xfer_get_frame(xfer, 0);
1165d30c739cSEd Maste 		off = 0;
1166d30c739cSEd Maste 
1167d30c739cSEd Maste 		while (off < actlen) {
1168d30c739cSEd Maste 
1169d30c739cSEd Maste 			/* The frame header is aligned on a 4 byte boundary. */
1170d30c739cSEd Maste 			off = ((off + 0x3) & ~0x3);
1171d30c739cSEd Maste 
1172d30c739cSEd Maste 			/* Extract RX CMD A. */
1173d30c739cSEd Maste 			if (off + sizeof(rx_cmd_a) > actlen)
1174d30c739cSEd Maste 				goto tr_setup;
1175d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a));
1176d30c739cSEd Maste 			off += (sizeof(rx_cmd_a));
1177d30c739cSEd Maste 			rx_cmd_a = le32toh(rx_cmd_a);
1178d30c739cSEd Maste 
1179d30c739cSEd Maste 
1180d30c739cSEd Maste 			/* Extract RX CMD B. */
1181d30c739cSEd Maste 			if (off + sizeof(rx_cmd_b) > actlen)
1182d30c739cSEd Maste 				goto tr_setup;
1183d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b));
1184d30c739cSEd Maste 			off += (sizeof(rx_cmd_b));
1185d30c739cSEd Maste 			rx_cmd_b = le32toh(rx_cmd_b);
1186d30c739cSEd Maste 
1187d30c739cSEd Maste 
1188d30c739cSEd Maste 			/* Extract RX CMD C. */
1189d30c739cSEd Maste 			if (off + sizeof(rx_cmd_c) > actlen)
1190d30c739cSEd Maste 				goto tr_setup;
1191d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c));
1192d30c739cSEd Maste 			off += (sizeof(rx_cmd_c));
1193d30c739cSEd Maste 			rx_cmd_c = le32toh(rx_cmd_c);
1194d30c739cSEd Maste 
1195d30c739cSEd Maste 			if (off > actlen)
1196d30c739cSEd Maste 				goto tr_setup;
1197d30c739cSEd Maste 
1198d30c739cSEd Maste 			pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
1199d30c739cSEd Maste 
1200d30c739cSEd Maste 			muge_dbg_printf(sc,
1201d30c739cSEd Maste 			    "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x "
1202d30c739cSEd Maste 			    " pktlen %d actlen %d off %d\n",
1203d30c739cSEd Maste 			    rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off);
1204d30c739cSEd Maste 
1205d30c739cSEd Maste 			if (rx_cmd_a & RX_CMD_A_RED_) {
1206d30c739cSEd Maste 				muge_dbg_printf(sc,
1207d30c739cSEd Maste 				     "rx error (hdr 0x%08x)\n", rx_cmd_a);
1208d30c739cSEd Maste 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1209d30c739cSEd Maste 			} else {
1210d30c739cSEd Maste 				/* Ethernet frame too big or too small? */
1211d30c739cSEd Maste 				if ((pktlen < ETHER_HDR_LEN) ||
1212d30c739cSEd Maste 				    (pktlen > (actlen - off)))
1213d30c739cSEd Maste 					goto tr_setup;
1214d30c739cSEd Maste 
1215*e5151258SEd Maste 				/* Create a new mbuf to store the packet. */
1216d30c739cSEd Maste 				m = uether_newbuf();
1217d30c739cSEd Maste 				if (m == NULL) {
1218d30c739cSEd Maste 					muge_warn_printf(sc,
1219d30c739cSEd Maste 					    "failed to create new mbuf\n");
1220d30c739cSEd Maste 					if_inc_counter(ifp, IFCOUNTER_IQDROPS,
1221d30c739cSEd Maste 					    1);
1222d30c739cSEd Maste 					goto tr_setup;
1223d30c739cSEd Maste 				}
1224d30c739cSEd Maste 
1225d30c739cSEd Maste 				usbd_copy_out(pc, off, mtod(m, uint8_t *),
1226d30c739cSEd Maste 				    pktlen);
1227d30c739cSEd Maste 
1228d30c739cSEd Maste 				/*
1229d30c739cSEd Maste 				 * Check if RX checksums are computed, and
1230d30c739cSEd Maste 				 * offload them
1231d30c739cSEd Maste 				 */
1232d30c739cSEd Maste 				if ((ifp->if_capabilities & IFCAP_RXCSUM) &&
1233d30c739cSEd Maste 				    !(rx_cmd_a & RX_CMD_A_ICSM_)) {
1234d30c739cSEd Maste 					struct ether_header *eh;
1235d30c739cSEd Maste 					eh = mtod(m, struct ether_header *);
1236d30c739cSEd Maste 					/*
1237d30c739cSEd Maste 					 * Remove the extra 2 bytes of the csum
1238d30c739cSEd Maste 					 *
1239d30c739cSEd Maste 					 * The checksum appears to be
1240d30c739cSEd Maste 					 * simplistically calculated over the
1241d30c739cSEd Maste 					 * protocol headers up to the end of the
1242d30c739cSEd Maste 					 * eth frame.  Which means if the eth
1243d30c739cSEd Maste 					 * frame is padded the csum calculation
1244d30c739cSEd Maste 					 * is incorrectly performed over the
1245d30c739cSEd Maste 					 * padding bytes as well.  Therefore to
1246d30c739cSEd Maste 					 * be safe we ignore the H/W csum on
1247d30c739cSEd Maste 					 * frames less than or equal to
1248d30c739cSEd Maste 					 * 64 bytes.
1249d30c739cSEd Maste 					 *
1250d30c739cSEd Maste 					 * Protocols checksummed:
1251d30c739cSEd Maste 					 * TCP, UDP, ICMP, IGMP, IP
1252d30c739cSEd Maste 					 */
1253d30c739cSEd Maste 					if (pktlen > ETHER_MIN_LEN) {
1254d30c739cSEd Maste 						m->m_pkthdr.csum_flags |=
1255d30c739cSEd Maste 						    CSUM_DATA_VALID;
1256d30c739cSEd Maste 
1257d30c739cSEd Maste 						/*
1258d30c739cSEd Maste 						 * Copy the checksum from the
1259d30c739cSEd Maste 						 * last 2 bytes of the transfer
1260d30c739cSEd Maste 						 * and put in the csum_data
1261d30c739cSEd Maste 						 * field.
1262d30c739cSEd Maste 						 */
1263d30c739cSEd Maste 						usbd_copy_out(pc,
1264d30c739cSEd Maste 						    (off + pktlen),
1265d30c739cSEd Maste 						    &m->m_pkthdr.csum_data, 2);
1266d30c739cSEd Maste 
1267d30c739cSEd Maste 						/*
1268d30c739cSEd Maste 						 * The data is copied in network
1269d30c739cSEd Maste 						 * order, but the csum algorithm
1270d30c739cSEd Maste 						 * in the kernel expects it to
1271d30c739cSEd Maste 						 * be in host network order.
1272d30c739cSEd Maste 						 */
1273d30c739cSEd Maste 						m->m_pkthdr.csum_data =
1274d30c739cSEd Maste 						   ntohs(m->m_pkthdr.csum_data);
1275d30c739cSEd Maste 
1276d30c739cSEd Maste 						muge_dbg_printf(sc,
1277d30c739cSEd Maste 						    "RX checksum offloaded (0x%04x)\n",
1278d30c739cSEd Maste 						    m->m_pkthdr.csum_data);
1279d30c739cSEd Maste 					}
1280d30c739cSEd Maste 				}
1281d30c739cSEd Maste 
1282d30c739cSEd Maste 				/* Enqueue the mbuf on the receive queue. */
1283d30c739cSEd Maste 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1284d30c739cSEd Maste 					m_freem(m);
1285d30c739cSEd Maste 					goto tr_setup;
1286d30c739cSEd Maste 				}
1287d30c739cSEd Maste 				/* Remove 4 trailing bytes */
1288d30c739cSEd Maste 				uether_rxmbuf(ue, m, pktlen - 4);
1289d30c739cSEd Maste 			}
1290d30c739cSEd Maste 
1291d30c739cSEd Maste 			/*
1292d30c739cSEd Maste 			 * Update the offset to move to the next potential
1293d30c739cSEd Maste 			 * packet.
1294d30c739cSEd Maste 			 */
1295d30c739cSEd Maste 			off += pktlen;
1296d30c739cSEd Maste 		}
1297d30c739cSEd Maste 
1298d30c739cSEd Maste 		/* FALLTHROUGH */
1299d30c739cSEd Maste 	case USB_ST_SETUP:
1300d30c739cSEd Maste tr_setup:
1301d30c739cSEd Maste 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1302d30c739cSEd Maste 		usbd_transfer_submit(xfer);
1303d30c739cSEd Maste 		uether_rxflush(ue);
1304d30c739cSEd Maste 		return;
1305d30c739cSEd Maste 
1306d30c739cSEd Maste 	default:
1307d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1308d30c739cSEd Maste 			muge_warn_printf(sc, "bulk read error, %s\n",
1309d30c739cSEd Maste 			    usbd_errstr(error));
1310d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1311d30c739cSEd Maste 			goto tr_setup;
1312d30c739cSEd Maste 		}
1313d30c739cSEd Maste 		return;
1314d30c739cSEd Maste 	}
1315d30c739cSEd Maste }
1316d30c739cSEd Maste 
1317d30c739cSEd Maste /**
1318d30c739cSEd Maste  *	muge_bulk_write_callback - Write callback used to send ethernet frame(s)
1319d30c739cSEd Maste  *	@xfer: the USB transfer
1320d30c739cSEd Maste  *	@error: error code if the transfers is in an errored state
1321d30c739cSEd Maste  *
1322d30c739cSEd Maste  *	The main write function that pulls ethernet frames off the queue and
1323d30c739cSEd Maste  *	sends them out.
1324d30c739cSEd Maste  *
1325d30c739cSEd Maste  */
1326d30c739cSEd Maste static void
1327d30c739cSEd Maste muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1328d30c739cSEd Maste {
1329d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1330d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1331d30c739cSEd Maste 	struct usb_page_cache *pc;
1332d30c739cSEd Maste 	struct mbuf *m;
1333d30c739cSEd Maste 	int nframes;
1334d30c739cSEd Maste 	uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0;
1335d30c739cSEd Maste 
1336d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1337d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1338d30c739cSEd Maste 		muge_dbg_printf(sc,
1339d30c739cSEd Maste 		    "USB TRANSFER status: USB_ST_TRANSFERRED\n");
1340d30c739cSEd Maste 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1341d30c739cSEd Maste 		/* FALLTHROUGH */
1342d30c739cSEd Maste 	case USB_ST_SETUP:
1343d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n");
1344d30c739cSEd Maste tr_setup:
1345d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 ||
1346d30c739cSEd Maste 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1347d30c739cSEd Maste 			muge_dbg_printf(sc,
1348d30c739cSEd Maste 			    "sc->sc_flags & MUGE_FLAG_LINK: %d\n",
1349d30c739cSEd Maste 			    (sc->sc_flags & MUGE_FLAG_LINK));
1350d30c739cSEd Maste 			muge_dbg_printf(sc,
1351d30c739cSEd Maste 			    "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n",
1352d30c739cSEd Maste 			    (ifp->if_drv_flags & IFF_DRV_OACTIVE));
1353d30c739cSEd Maste 			muge_dbg_printf(sc,
1354d30c739cSEd Maste 			    "USB TRANSFER not sending: no link or controller is busy \n");
1355d30c739cSEd Maste 			/*
1356d30c739cSEd Maste 			 * Don't send anything if there is no link or
1357d30c739cSEd Maste 			 * controller is busy.
1358d30c739cSEd Maste 			 */
1359d30c739cSEd Maste 			return;
1360d30c739cSEd Maste 		}
1361d30c739cSEd Maste 		for (nframes = 0; nframes < 16 &&
1362d30c739cSEd Maste 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1363d30c739cSEd Maste 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1364d30c739cSEd Maste 			if (m == NULL)
1365d30c739cSEd Maste 				break;
1366d30c739cSEd Maste 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1367d30c739cSEd Maste 				nframes);
1368d30c739cSEd Maste 			frm_len = 0;
1369d30c739cSEd Maste 			pc = usbd_xfer_get_frame(xfer, nframes);
1370d30c739cSEd Maste 
1371d30c739cSEd Maste 			/*
1372d30c739cSEd Maste 			 * Each frame is prefixed with two 32-bit values
1373d30c739cSEd Maste 			 * describing the length of the packet and buffer.
1374d30c739cSEd Maste 			 */
1375d30c739cSEd Maste 			tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) |
1376d30c739cSEd Maste 			     TX_CMD_A_FCS_;
1377d30c739cSEd Maste 			tx_cmd_a = htole32(tx_cmd_a);
1378d30c739cSEd Maste 			usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a));
1379d30c739cSEd Maste 
1380d30c739cSEd Maste 			tx_cmd_b = 0;
1381d30c739cSEd Maste 
1382d30c739cSEd Maste 			/* TCP LSO Support will probably be implemented here. */
1383d30c739cSEd Maste 			tx_cmd_b = htole32(tx_cmd_b);
1384d30c739cSEd Maste 			usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b));
1385d30c739cSEd Maste 
1386d30c739cSEd Maste 			frm_len += 8;
1387d30c739cSEd Maste 
1388d30c739cSEd Maste 			/* Next copy in the actual packet */
1389d30c739cSEd Maste 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1390d30c739cSEd Maste 			frm_len += m->m_pkthdr.len;
1391d30c739cSEd Maste 
1392d30c739cSEd Maste 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1393d30c739cSEd Maste 
1394d30c739cSEd Maste 			/*
1395d30c739cSEd Maste 			 * If there's a BPF listener, bounce a copy of this
1396d30c739cSEd Maste 			 * frame to it.
1397d30c739cSEd Maste 			 */
1398d30c739cSEd Maste 			BPF_MTAP(ifp, m);
1399d30c739cSEd Maste 			m_freem(m);
1400d30c739cSEd Maste 
1401d30c739cSEd Maste 			/* Set frame length. */
1402d30c739cSEd Maste 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1403d30c739cSEd Maste 		}
1404d30c739cSEd Maste 
1405d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes);
1406d30c739cSEd Maste 		if (nframes != 0) {
1407d30c739cSEd Maste 			muge_dbg_printf(sc, "USB TRANSFER submit attempt\n");
1408d30c739cSEd Maste 			usbd_xfer_set_frames(xfer, nframes);
1409d30c739cSEd Maste 			usbd_transfer_submit(xfer);
1410d30c739cSEd Maste 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1411d30c739cSEd Maste 		}
1412d30c739cSEd Maste 		return;
1413d30c739cSEd Maste 
1414d30c739cSEd Maste 	default:
1415d30c739cSEd Maste 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1416d30c739cSEd Maste 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1417d30c739cSEd Maste 
1418d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1419d30c739cSEd Maste 			muge_err_printf(sc,
1420d30c739cSEd Maste 			    "usb error on tx: %s\n", usbd_errstr(error));
1421d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1422d30c739cSEd Maste 			goto tr_setup;
1423d30c739cSEd Maste 		}
1424d30c739cSEd Maste 		return;
1425d30c739cSEd Maste 	}
1426d30c739cSEd Maste }
1427d30c739cSEd Maste 
1428d30c739cSEd Maste /**
1429d30c739cSEd Maste  *	muge_attach_post - Called after the driver attached to the USB interface
1430d30c739cSEd Maste  *	@ue: the USB ethernet device
1431d30c739cSEd Maste  *
1432d30c739cSEd Maste  *	This is where the chip is intialised for the first time.  This is
1433d30c739cSEd Maste  *	different from the muge_init() function in that that one is designed to
1434d30c739cSEd Maste  *	setup the H/W to match the UE settings and can be called after a reset.
1435d30c739cSEd Maste  *
1436d30c739cSEd Maste  */
1437d30c739cSEd Maste static void
1438d30c739cSEd Maste muge_attach_post(struct usb_ether *ue)
1439d30c739cSEd Maste {
1440d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1441d30c739cSEd Maste 	uint32_t mac_h, mac_l;
1442d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_attach_post.\n");
1443d30c739cSEd Maste 
1444d30c739cSEd Maste 	/* Setup some of the basics */
1445d30c739cSEd Maste 	sc->sc_phyno = 1;
1446d30c739cSEd Maste 
1447d30c739cSEd Maste 	/*
1448d30c739cSEd Maste 	 * Attempt to get the mac address, if an EEPROM is not attached this
1449d30c739cSEd Maste 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1450d30c739cSEd Maste 	 * address based on urandom.
1451d30c739cSEd Maste 	 */
1452d30c739cSEd Maste 	memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN);
1453d30c739cSEd Maste 
1454d30c739cSEd Maste 	uint32_t val;
1455d30c739cSEd Maste 	lan78xx_read_reg(sc, 0, &val);
1456d30c739cSEd Maste 
1457*e5151258SEd Maste 	/* Read current MAC address from RX_ADDRx registers. */
145848bc1758SEd Maste 	if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) &&
145948bc1758SEd Maste 	    (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) {
1460d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1461d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1462d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1463d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1464d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1465d30c739cSEd Maste 		sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1466d30c739cSEd Maste 	}
1467d30c739cSEd Maste 
1468*e5151258SEd Maste 	/* If RX_ADDRx did not provide a valid MAC address, try EEPROM. */
1469d30c739cSEd Maste 	if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
147048bc1758SEd Maste 		if ((lan78xx_eeprom_read(sc, ETH_E2P_MAC_OFFSET,
1471d30c739cSEd Maste 		    sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN) == 0) ||
1472d30c739cSEd Maste 		    (lan78xx_otp_read(sc, OTP_MAC_OFFSET,
1473d30c739cSEd Maste 		    sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN) == 0)) {
1474d30c739cSEd Maste 			if (ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
1475d30c739cSEd Maste 				muge_dbg_printf(sc, "MAC read from EEPROM\n");
1476d30c739cSEd Maste 			} else {
1477d30c739cSEd Maste 				muge_dbg_printf(sc, "MAC assigned randomly\n");
1478d30c739cSEd Maste 				read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1479d30c739cSEd Maste 				sc->sc_ue.ue_eaddr[0] &= ~0x01;	/* unicast */
1480d30c739cSEd Maste 				sc->sc_ue.ue_eaddr[0] |= 0x02;/* locally administered */
1481d30c739cSEd Maste 			}
1482d30c739cSEd Maste 		} else {
1483d30c739cSEd Maste 			muge_dbg_printf(sc, "MAC assigned randomly\n");
1484d30c739cSEd Maste 			arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0);
1485d30c739cSEd Maste 			sc->sc_ue.ue_eaddr[0] &= ~0x01;	/* unicast */
1486d30c739cSEd Maste 			sc->sc_ue.ue_eaddr[0] |= 0x02;	/* locally administered */
1487d30c739cSEd Maste 		}
1488d30c739cSEd Maste 	} else {
1489d30c739cSEd Maste 		muge_dbg_printf(sc, "MAC assigned from registers\n");
1490d30c739cSEd Maste 	}
1491d30c739cSEd Maste 
1492d30c739cSEd Maste 	/* Initialise the chip for the first time */
1493d30c739cSEd Maste 	lan78xx_chip_init(sc);
1494d30c739cSEd Maste }
1495d30c739cSEd Maste 
1496d30c739cSEd Maste /**
1497d30c739cSEd Maste  *	muge_attach_post_sub - Called after attach to the USB interface
1498d30c739cSEd Maste  *	@ue: the USB ethernet device
1499d30c739cSEd Maste  *
1500d30c739cSEd Maste  *	Most of this is boilerplate code and copied from the base USB ethernet
1501d30c739cSEd Maste  *	driver.  It has been overriden so that we can indicate to the system
1502d30c739cSEd Maste  *	that the chip supports H/W checksumming.
1503d30c739cSEd Maste  *
1504d30c739cSEd Maste  *	RETURNS:
1505d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1506d30c739cSEd Maste  */
1507d30c739cSEd Maste static int
1508d30c739cSEd Maste muge_attach_post_sub(struct usb_ether *ue)
1509d30c739cSEd Maste {
1510d30c739cSEd Maste 	struct muge_softc *sc;
1511d30c739cSEd Maste 	struct ifnet *ifp;
1512d30c739cSEd Maste 	int error;
1513d30c739cSEd Maste 
1514d30c739cSEd Maste 	sc = uether_getsc(ue);
1515d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n");
1516d30c739cSEd Maste 	ifp = ue->ue_ifp;
1517d30c739cSEd Maste 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1518d30c739cSEd Maste 	ifp->if_start = uether_start;
1519d30c739cSEd Maste 	ifp->if_ioctl = muge_ioctl;
1520d30c739cSEd Maste 	ifp->if_init = uether_init;
1521d30c739cSEd Maste 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1522d30c739cSEd Maste 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1523d30c739cSEd Maste 	IFQ_SET_READY(&ifp->if_snd);
1524d30c739cSEd Maste 
1525d30c739cSEd Maste 	/*
1526d30c739cSEd Maste 	 * The chip supports TCP/UDP checksum offloading on TX and RX paths,
1527d30c739cSEd Maste 	 * however currently only RX checksum is supported in the driver
1528d30c739cSEd Maste 	 * (see top of file).
1529d30c739cSEd Maste 	 */
1530d30c739cSEd Maste 	ifp->if_hwassist = 0;
1531d30c739cSEd Maste 	if (MUGE_DEFAULT_RX_CSUM_ENABLE)
1532d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_RXCSUM;
1533d30c739cSEd Maste 
1534d30c739cSEd Maste 	if (MUGE_DEFAULT_TX_CSUM_ENABLE)
1535d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_TXCSUM;
1536d30c739cSEd Maste 
1537d30c739cSEd Maste 	/*
1538d30c739cSEd Maste 	 * In the Linux driver they also enable scatter/gather (NETIF_F_SG)
1539d30c739cSEd Maste 	 * here, that's something related to socket buffers used in Linux.
1540d30c739cSEd Maste 	 * FreeBSD doesn't have that as an interface feature.
1541d30c739cSEd Maste 	 */
1542d30c739cSEd Maste 	if (MUGE_DEFAULT_TSO_CSUM_ENABLE)
1543d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6;
1544d30c739cSEd Maste 
1545d30c739cSEd Maste #if 0
1546d30c739cSEd Maste 	/* TX checksuming is disabled since not yet implemented. */
1547d30c739cSEd Maste 	ifp->if_capabilities |= IFCAP_TXCSUM;
1548d30c739cSEd Maste 	ifp->if_capenable |= IFCAP_TXCSUM;
1549d30c739cSEd Maste 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1550d30c739cSEd Maste #endif
1551d30c739cSEd Maste 
1552d30c739cSEd Maste 	ifp->if_capenable = ifp->if_capabilities;
1553d30c739cSEd Maste 
1554d30c739cSEd Maste 	mtx_lock(&Giant);
1555d30c739cSEd Maste 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1556d30c739cSEd Maste 		uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1557d30c739cSEd Maste 		BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1558d30c739cSEd Maste 	mtx_unlock(&Giant);
1559d30c739cSEd Maste 
1560*e5151258SEd Maste 	return (0);
1561d30c739cSEd Maste }
1562d30c739cSEd Maste 
1563d30c739cSEd Maste /**
1564d30c739cSEd Maste  *	muge_start - Starts communication with the LAN78xx chip
1565d30c739cSEd Maste  *	@ue: USB ether interface
1566d30c739cSEd Maste  */
1567d30c739cSEd Maste static void
1568d30c739cSEd Maste muge_start(struct usb_ether *ue)
1569d30c739cSEd Maste {
1570d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1571d30c739cSEd Maste 
1572d30c739cSEd Maste 	/*
1573d30c739cSEd Maste 	 * Start the USB transfers, if not already started.
1574d30c739cSEd Maste 	 */
1575d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]);
1576d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]);
1577d30c739cSEd Maste }
1578d30c739cSEd Maste 
1579d30c739cSEd Maste /**
1580d30c739cSEd Maste  *	muge_ioctl - ioctl function for the device
1581d30c739cSEd Maste  *	@ifp: interface pointer
1582d30c739cSEd Maste  *	@cmd: the ioctl command
1583d30c739cSEd Maste  *	@data: data passed in the ioctl call, typically a pointer to struct
1584d30c739cSEd Maste  *	ifreq.
1585d30c739cSEd Maste  *
1586d30c739cSEd Maste  *	The ioctl routine is overridden to detect change requests for the H/W
1587d30c739cSEd Maste  *	checksum capabilities.
1588d30c739cSEd Maste  *
1589d30c739cSEd Maste  *	RETURNS:
1590d30c739cSEd Maste  *	0 on success and an error code on failure.
1591d30c739cSEd Maste  */
1592d30c739cSEd Maste static int
1593d30c739cSEd Maste muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1594d30c739cSEd Maste {
1595d30c739cSEd Maste 	struct usb_ether *ue = ifp->if_softc;
1596d30c739cSEd Maste 	struct muge_softc *sc;
1597d30c739cSEd Maste 	struct ifreq *ifr;
1598d30c739cSEd Maste 	int rc;
1599d30c739cSEd Maste 	int mask;
1600d30c739cSEd Maste 	int reinit;
1601d30c739cSEd Maste 
1602d30c739cSEd Maste 	if (cmd == SIOCSIFCAP) {
1603d30c739cSEd Maste 		sc = uether_getsc(ue);
1604d30c739cSEd Maste 		ifr = (struct ifreq *)data;
1605d30c739cSEd Maste 
1606d30c739cSEd Maste 		MUGE_LOCK(sc);
1607d30c739cSEd Maste 
1608d30c739cSEd Maste 		rc = 0;
1609d30c739cSEd Maste 		reinit = 0;
1610d30c739cSEd Maste 
1611d30c739cSEd Maste 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1612d30c739cSEd Maste 
1613*e5151258SEd Maste 		/* Modify the RX CSUM enable bits. */
1614d30c739cSEd Maste 		if ((mask & IFCAP_RXCSUM) != 0 &&
1615d30c739cSEd Maste 			(ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1616d30c739cSEd Maste 			ifp->if_capenable ^= IFCAP_RXCSUM;
1617d30c739cSEd Maste 
1618d30c739cSEd Maste 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1619d30c739cSEd Maste 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1620d30c739cSEd Maste 				reinit = 1;
1621d30c739cSEd Maste 			}
1622d30c739cSEd Maste 		}
1623d30c739cSEd Maste 
1624d30c739cSEd Maste 		MUGE_UNLOCK(sc);
1625d30c739cSEd Maste 		if (reinit)
1626d30c739cSEd Maste 			uether_init(ue);
1627d30c739cSEd Maste 
1628d30c739cSEd Maste 	} else {
1629d30c739cSEd Maste 		rc = uether_ioctl(ifp, cmd, data);
1630d30c739cSEd Maste 	}
1631d30c739cSEd Maste 
1632d30c739cSEd Maste 	return (rc);
1633d30c739cSEd Maste }
1634d30c739cSEd Maste 
1635d30c739cSEd Maste /**
1636d30c739cSEd Maste  *	muge_reset - Reset the SMSC chip
1637d30c739cSEd Maste  *	@sc: device soft context
1638d30c739cSEd Maste  *
1639d30c739cSEd Maste  *	LOCKING:
1640d30c739cSEd Maste  *	Should be called with the SMSC lock held.
1641d30c739cSEd Maste  */
1642d30c739cSEd Maste static void
1643d30c739cSEd Maste muge_reset(struct muge_softc *sc)
1644d30c739cSEd Maste {
1645d30c739cSEd Maste 	struct usb_config_descriptor *cd;
1646d30c739cSEd Maste 	usb_error_t err;
1647d30c739cSEd Maste 
1648d30c739cSEd Maste 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
1649d30c739cSEd Maste 
1650d30c739cSEd Maste 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
1651d30c739cSEd Maste 	    cd->bConfigurationValue);
1652d30c739cSEd Maste 	if (err)
1653d30c739cSEd Maste 		muge_warn_printf(sc, "reset failed (ignored)\n");
1654d30c739cSEd Maste 
1655d30c739cSEd Maste 	/* Wait a little while for the chip to get its brains in order. */
1656d30c739cSEd Maste 	uether_pause(&sc->sc_ue, hz / 100);
1657d30c739cSEd Maste 
1658d30c739cSEd Maste 	/* Reinitialize controller to achieve full reset. */
1659d30c739cSEd Maste 	lan78xx_chip_init(sc);
1660d30c739cSEd Maste }
1661d30c739cSEd Maste 
1662d30c739cSEd Maste /**
1663d30c739cSEd Maste  * muge_set_addr_filter
1664d30c739cSEd Maste  *
1665d30c739cSEd Maste  *	@sc: device soft context
1666d30c739cSEd Maste  *	@index: index of the entry to the perfect address table
1667d30c739cSEd Maste  *	@addr: address to be written
1668d30c739cSEd Maste  *
1669d30c739cSEd Maste  */
1670d30c739cSEd Maste static void
1671d30c739cSEd Maste muge_set_addr_filter(struct muge_softc *sc, int index,
1672d30c739cSEd Maste     uint8_t addr[ETHER_ADDR_LEN])
1673d30c739cSEd Maste {
1674d30c739cSEd Maste 	uint32_t tmp;
1675d30c739cSEd Maste 
1676d30c739cSEd Maste 	if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) {
1677d30c739cSEd Maste 		tmp = addr[3];
1678d30c739cSEd Maste 		tmp |= addr[2] | (tmp << 8);
1679d30c739cSEd Maste 		tmp |= addr[1] | (tmp << 8);
1680d30c739cSEd Maste 		tmp |= addr[0] | (tmp << 8);
1681d30c739cSEd Maste 		sc->sc_pfilter_table[index][1] = tmp;
1682d30c739cSEd Maste 		tmp = addr[5];
1683d30c739cSEd Maste 		tmp |= addr[4] | (tmp << 8);
168448bc1758SEd Maste 		tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_;
1685d30c739cSEd Maste 		sc->sc_pfilter_table[index][0] = tmp;
1686d30c739cSEd Maste 	}
1687d30c739cSEd Maste }
1688d30c739cSEd Maste 
1689d30c739cSEd Maste /**
1690d30c739cSEd Maste  *	lan78xx_dataport_write - write to the selected RAM
1691d30c739cSEd Maste  *	@sc: The device soft context.
1692d30c739cSEd Maste  *	@ram_select: Select which RAM to access.
1693d30c739cSEd Maste  *	@addr: Starting address to write to.
1694d30c739cSEd Maste  *	@buf: word-sized buffer to write to RAM, starting at @addr.
1695d30c739cSEd Maste  *	@length: length of @buf
1696d30c739cSEd Maste  *
1697d30c739cSEd Maste  *
1698d30c739cSEd Maste  *	RETURNS:
1699d30c739cSEd Maste  *	0 if write successful.
1700d30c739cSEd Maste  */
1701d30c739cSEd Maste static int
1702d30c739cSEd Maste lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select,
1703d30c739cSEd Maste     uint32_t addr, uint32_t length, uint32_t *buf)
1704d30c739cSEd Maste {
1705d30c739cSEd Maste 	uint32_t dp_sel;
1706d30c739cSEd Maste 	int i, ret;
1707d30c739cSEd Maste 
1708d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
170948bc1758SEd Maste 	ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1710d30c739cSEd Maste 	if (ret < 0)
1711d30c739cSEd Maste 		goto done;
1712d30c739cSEd Maste 
171348bc1758SEd Maste 	ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel);
1714d30c739cSEd Maste 
171548bc1758SEd Maste 	dp_sel &= ~ETH_DP_SEL_RSEL_MASK_;
1716d30c739cSEd Maste 	dp_sel |= ram_select;
1717d30c739cSEd Maste 
171848bc1758SEd Maste 	ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel);
1719d30c739cSEd Maste 
1720d30c739cSEd Maste 	for (i = 0; i < length; i++) {
172148bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i);
172248bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]);
172348bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_);
172448bc1758SEd Maste 		ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1725d30c739cSEd Maste 		if (ret != 0)
1726d30c739cSEd Maste 			goto done;
1727d30c739cSEd Maste 	}
1728d30c739cSEd Maste 
1729d30c739cSEd Maste done:
1730*e5151258SEd Maste 	return (ret);
1731d30c739cSEd Maste }
1732d30c739cSEd Maste 
1733d30c739cSEd Maste /**
1734d30c739cSEd Maste  * muge_multicast_write
1735d30c739cSEd Maste  * @sc: device's soft context
1736d30c739cSEd Maste  *
1737d30c739cSEd Maste  * Writes perfect addres filters and hash address filters to their
1738d30c739cSEd Maste  * corresponding registers and RAMs.
1739d30c739cSEd Maste  *
1740d30c739cSEd Maste  */
1741d30c739cSEd Maste static void
1742d30c739cSEd Maste muge_multicast_write(struct muge_softc *sc)
1743d30c739cSEd Maste {
1744d30c739cSEd Maste 	int i, ret;
174548bc1758SEd Maste 	lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_,
174648bc1758SEd Maste 	    ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN,
174748bc1758SEd Maste 	    sc->sc_mchash_table);
1748d30c739cSEd Maste 
1749d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1750d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0);
1751d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_LO(i),
1752d30c739cSEd Maste 		    sc->sc_pfilter_table[i][1]);
1753d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_HI(i),
1754d30c739cSEd Maste 		    sc->sc_pfilter_table[i][0]);
1755d30c739cSEd Maste 	}
1756d30c739cSEd Maste }
1757d30c739cSEd Maste 
1758d30c739cSEd Maste /**
1759d30c739cSEd Maste  *	muge_hash - Calculate the hash of a mac address
1760d30c739cSEd Maste  *	@addr: The mac address to calculate the hash on
1761d30c739cSEd Maste  *
1762d30c739cSEd Maste  *	This function is used when configuring a range of multicast mac
1763d30c739cSEd Maste  *	addresses to filter on.  The hash of the mac address is put in the
1764d30c739cSEd Maste  *	device's mac hash table.
1765d30c739cSEd Maste  *
1766d30c739cSEd Maste  *	RETURNS:
1767d30c739cSEd Maste  *	Returns a value from 0-63 value which is the hash of the mac address.
1768d30c739cSEd Maste  */
1769d30c739cSEd Maste static inline uint32_t
1770d30c739cSEd Maste muge_hash(uint8_t addr[ETHER_ADDR_LEN])
1771d30c739cSEd Maste {
1772d30c739cSEd Maste 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
1773d30c739cSEd Maste }
1774d30c739cSEd Maste 
1775d30c739cSEd Maste /**
1776d30c739cSEd Maste  *	muge_setmulti - Setup multicast
1777d30c739cSEd Maste  *	@ue: usb ethernet device context
1778d30c739cSEd Maste  *
1779d30c739cSEd Maste  *	Tells the device to either accept frames with a multicast mac address,
1780d30c739cSEd Maste  *	a select group of m'cast mac addresses or just the devices mac address.
1781d30c739cSEd Maste  *
1782d30c739cSEd Maste  *	LOCKING:
1783d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1784d30c739cSEd Maste  */
1785d30c739cSEd Maste static void
1786d30c739cSEd Maste muge_setmulti(struct usb_ether *ue)
1787d30c739cSEd Maste {
1788d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1789d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1790d30c739cSEd Maste 	uint8_t i, *addr;
1791d30c739cSEd Maste 	struct ifmultiaddr *ifma;
1792d30c739cSEd Maste 
1793d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1794d30c739cSEd Maste 
179548bc1758SEd Maste 	sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ |
179648bc1758SEd Maste 		ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_);
1797d30c739cSEd Maste 
1798*e5151258SEd Maste 	/* Initialize hash filter table. */
179948bc1758SEd Maste 	for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++)
1800d30c739cSEd Maste 		sc->sc_mchash_table[i] = 0;
1801d30c739cSEd Maste 
1802*e5151258SEd Maste 	/* Initialize perfect filter table. */
1803d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1804d30c739cSEd Maste 		sc->sc_pfilter_table[i][0] =
1805d30c739cSEd Maste 		sc->sc_pfilter_table[i][1] = 0;
1806d30c739cSEd Maste 	}
1807d30c739cSEd Maste 
180848bc1758SEd Maste 	sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_;
1809d30c739cSEd Maste 
1810d30c739cSEd Maste 	if (ifp->if_flags & IFF_PROMISC) {
1811d30c739cSEd Maste 		muge_dbg_printf(sc, "promiscuous mode enabled\n");
181248bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1813d30c739cSEd Maste 	} else if (ifp->if_flags & IFF_ALLMULTI){
1814d30c739cSEd Maste 		muge_dbg_printf(sc, "receive all multicast enabled\n");
181548bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_;
1816d30c739cSEd Maste 	} else {
1817*e5151258SEd Maste 		/* Lock the mac address list before hashing each of them. */
1818d30c739cSEd Maste 		if_maddr_rlock(ifp);
1819d30c739cSEd Maste 		if (!TAILQ_EMPTY(&ifp->if_multiaddrs)) {
1820d30c739cSEd Maste 			i = 1;
1821d30c739cSEd Maste 			TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1822*e5151258SEd Maste 				/* First fill up the perfect address table. */
1823d30c739cSEd Maste 				addr = LLADDR((struct sockaddr_dl *)
1824d30c739cSEd Maste 				    ifma->ifma_addr);
1825d30c739cSEd Maste 				if (i < 33 /* XXX */) {
1826d30c739cSEd Maste 					muge_set_addr_filter(sc, i, addr);
1827d30c739cSEd Maste 				} else {
1828d30c739cSEd Maste 					uint32_t bitnum = muge_hash(addr);
1829d30c739cSEd Maste 					sc->sc_mchash_table[bitnum / 32] |=
1830d30c739cSEd Maste 					    (1 << (bitnum % 32));
183148bc1758SEd Maste 					sc->sc_rfe_ctl |=
183248bc1758SEd Maste 					    ETH_RFE_CTL_MCAST_HASH_;
1833d30c739cSEd Maste 				}
1834d30c739cSEd Maste 				i++;
1835d30c739cSEd Maste 			}
1836d30c739cSEd Maste 		}
1837d30c739cSEd Maste 		if_maddr_runlock(ifp);
1838d30c739cSEd Maste 		muge_multicast_write(sc);
1839d30c739cSEd Maste 	}
184048bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1841d30c739cSEd Maste }
1842d30c739cSEd Maste 
1843d30c739cSEd Maste /**
1844d30c739cSEd Maste  *	muge_setpromisc - Enables/disables promiscuous mode
1845d30c739cSEd Maste  *	@ue: usb ethernet device context
1846d30c739cSEd Maste  *
1847d30c739cSEd Maste  *	LOCKING:
1848d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1849d30c739cSEd Maste  */
1850d30c739cSEd Maste static void
1851d30c739cSEd Maste muge_setpromisc(struct usb_ether *ue)
1852d30c739cSEd Maste {
1853d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1854d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1855d30c739cSEd Maste 
1856d30c739cSEd Maste 	muge_dbg_printf(sc, "promiscuous mode %sabled\n",
1857d30c739cSEd Maste 	    (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
1858d30c739cSEd Maste 
1859d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1860d30c739cSEd Maste 
1861d30c739cSEd Maste 	if (ifp->if_flags & IFF_PROMISC)
186248bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1863d30c739cSEd Maste 	else
186448bc1758SEd Maste 		sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_);
1865d30c739cSEd Maste 
186648bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1867d30c739cSEd Maste }
1868d30c739cSEd Maste 
1869d30c739cSEd Maste /**
1870d30c739cSEd Maste  *	muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming
1871d30c739cSEd Maste  *	@sc: driver soft context
1872d30c739cSEd Maste  *
1873d30c739cSEd Maste  *	LOCKING:
1874d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1875d30c739cSEd Maste  *
1876d30c739cSEd Maste  *	RETURNS:
1877d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1878d30c739cSEd Maste  */
1879d30c739cSEd Maste static int muge_sethwcsum(struct muge_softc *sc)
1880d30c739cSEd Maste {
1881d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1882d30c739cSEd Maste 	int err;
1883d30c739cSEd Maste 
1884d30c739cSEd Maste 	if (!ifp)
1885d30c739cSEd Maste 		return (-EIO);
1886d30c739cSEd Maste 
1887d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1888d30c739cSEd Maste 
1889d30c739cSEd Maste 	if (ifp->if_capabilities & IFCAP_RXCSUM) {
189048bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_;
189148bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_;
1892d30c739cSEd Maste 	} else {
189348bc1758SEd Maste 		sc->sc_rfe_ctl &=
189448bc1758SEd Maste 		    ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_);
189548bc1758SEd Maste 		sc->sc_rfe_ctl &=
189648bc1758SEd Maste 		     ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_);
1897d30c739cSEd Maste 	}
1898d30c739cSEd Maste 
189948bc1758SEd Maste 	sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_;
1900d30c739cSEd Maste 
190148bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1902d30c739cSEd Maste 
1903d30c739cSEd Maste 	if (err != 0) {
190448bc1758SEd Maste 		muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n",
190548bc1758SEd Maste 		    err);
1906d30c739cSEd Maste 		return (err);
1907d30c739cSEd Maste 	}
1908d30c739cSEd Maste 
1909d30c739cSEd Maste 	return (0);
1910d30c739cSEd Maste }
1911d30c739cSEd Maste 
1912d30c739cSEd Maste /**
1913d30c739cSEd Maste  *	muge_ifmedia_upd - Set media options
1914d30c739cSEd Maste  *	@ifp: interface pointer
1915d30c739cSEd Maste  *
1916d30c739cSEd Maste  *	Basically boilerplate code that simply calls the mii functions to set
1917d30c739cSEd Maste  *	the media options.
1918d30c739cSEd Maste  *
1919d30c739cSEd Maste  *	LOCKING:
1920d30c739cSEd Maste  *	The device lock must be held before this function is called.
1921d30c739cSEd Maste  *
1922d30c739cSEd Maste  *	RETURNS:
1923d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1924d30c739cSEd Maste  */
1925d30c739cSEd Maste static int
1926d30c739cSEd Maste muge_ifmedia_upd(struct ifnet *ifp)
1927d30c739cSEd Maste {
1928d30c739cSEd Maste 	struct muge_softc *sc = ifp->if_softc;
1929d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n");
1930d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
1931d30c739cSEd Maste 	struct mii_softc *miisc;
1932d30c739cSEd Maste 	int err;
1933d30c739cSEd Maste 
1934d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1935d30c739cSEd Maste 
1936d30c739cSEd Maste 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1937d30c739cSEd Maste 		PHY_RESET(miisc);
1938d30c739cSEd Maste 	err = mii_mediachg(mii);
1939d30c739cSEd Maste 	return (err);
1940d30c739cSEd Maste }
1941d30c739cSEd Maste 
1942d30c739cSEd Maste /**
1943d30c739cSEd Maste  *	muge_init - Initialises the LAN95xx chip
1944d30c739cSEd Maste  *	@ue: USB ether interface
1945d30c739cSEd Maste  *
1946d30c739cSEd Maste  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
1947d30c739cSEd Maste  *	initialise the interface and the rx/tx pipes.
1948d30c739cSEd Maste  *
1949d30c739cSEd Maste  *	LOCKING:
1950d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1951d30c739cSEd Maste  */
1952d30c739cSEd Maste static void
1953d30c739cSEd Maste muge_init(struct usb_ether *ue)
1954d30c739cSEd Maste {
1955d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1956d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_init.\n");
1957d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1958d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1959d30c739cSEd Maste 
1960d30c739cSEd Maste 	if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp)))
1961d30c739cSEd Maste 		muge_dbg_printf(sc, "setting MAC address failed\n");
1962d30c739cSEd Maste 
1963d30c739cSEd Maste 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
1964d30c739cSEd Maste 		return;
1965d30c739cSEd Maste 
1966*e5151258SEd Maste 	/* Cancel pending I/O. */
1967d30c739cSEd Maste 	muge_stop(ue);
1968d30c739cSEd Maste 
1969d30c739cSEd Maste 	/* Reset the ethernet interface. */
1970d30c739cSEd Maste 	muge_reset(sc);
1971d30c739cSEd Maste 
1972d30c739cSEd Maste 	/* Load the multicast filter. */
1973d30c739cSEd Maste 	muge_setmulti(ue);
1974d30c739cSEd Maste 
1975d30c739cSEd Maste 	/* TCP/UDP checksum offload engines. */
1976d30c739cSEd Maste 	muge_sethwcsum(sc);
1977d30c739cSEd Maste 
1978d30c739cSEd Maste 	usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]);
1979d30c739cSEd Maste 
1980d30c739cSEd Maste 	/* Indicate we are up and running. */
1981d30c739cSEd Maste 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1982d30c739cSEd Maste 
1983d30c739cSEd Maste 	/* Switch to selected media. */
1984d30c739cSEd Maste 	muge_ifmedia_upd(ifp);
1985d30c739cSEd Maste 	muge_start(ue);
1986d30c739cSEd Maste }
1987d30c739cSEd Maste 
1988d30c739cSEd Maste /**
1989d30c739cSEd Maste  *	muge_stop - Stops communication with the LAN78xx chip
1990d30c739cSEd Maste  *	@ue: USB ether interface
1991d30c739cSEd Maste  */
1992d30c739cSEd Maste static void
1993d30c739cSEd Maste muge_stop(struct usb_ether *ue)
1994d30c739cSEd Maste {
1995d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1996d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1997d30c739cSEd Maste 
1998d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1999d30c739cSEd Maste 
2000d30c739cSEd Maste 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2001d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
2002d30c739cSEd Maste 
2003d30c739cSEd Maste 	/*
2004*e5151258SEd Maste 	 * Stop all the transfers, if not already stopped.
2005d30c739cSEd Maste 	 */
2006d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]);
2007d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]);
2008d30c739cSEd Maste }
2009d30c739cSEd Maste 
2010d30c739cSEd Maste /**
2011d30c739cSEd Maste  *	muge_tick - Called periodically to monitor the state of the LAN95xx chip
2012d30c739cSEd Maste  *	@ue: USB ether interface
2013d30c739cSEd Maste  *
2014d30c739cSEd Maste  *	Simply calls the mii status functions to check the state of the link.
2015d30c739cSEd Maste  *
2016d30c739cSEd Maste  *	LOCKING:
2017d30c739cSEd Maste  *	Should be called with the MUGE lock held.
2018d30c739cSEd Maste  */
2019d30c739cSEd Maste static void
2020d30c739cSEd Maste muge_tick(struct usb_ether *ue)
2021d30c739cSEd Maste {
2022d30c739cSEd Maste 
2023d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2024d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2025d30c739cSEd Maste 
2026d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2027d30c739cSEd Maste 
2028d30c739cSEd Maste 	mii_tick(mii);
2029d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
2030d30c739cSEd Maste 		lan78xx_miibus_statchg(ue->ue_dev);
2031d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) != 0)
2032d30c739cSEd Maste 			muge_start(ue);
2033d30c739cSEd Maste 	}
2034d30c739cSEd Maste }
2035d30c739cSEd Maste 
2036d30c739cSEd Maste /**
2037d30c739cSEd Maste  *	muge_ifmedia_sts - Report current media status
2038d30c739cSEd Maste  *	@ifp: inet interface pointer
2039d30c739cSEd Maste  *	@ifmr: interface media request
2040d30c739cSEd Maste  *
2041*e5151258SEd Maste  *	Call the mii functions to get the media status.
2042d30c739cSEd Maste  *
2043d30c739cSEd Maste  *	LOCKING:
2044d30c739cSEd Maste  *	Internally takes and releases the device lock.
2045d30c739cSEd Maste  */
2046d30c739cSEd Maste static void
2047d30c739cSEd Maste muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
2048d30c739cSEd Maste {
2049d30c739cSEd Maste 	struct muge_softc *sc = ifp->if_softc;
2050d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2051d30c739cSEd Maste 
2052d30c739cSEd Maste 	MUGE_LOCK(sc);
2053d30c739cSEd Maste 	mii_pollstat(mii);
2054d30c739cSEd Maste 	ifmr->ifm_active = mii->mii_media_active;
2055d30c739cSEd Maste 	ifmr->ifm_status = mii->mii_media_status;
2056d30c739cSEd Maste 	MUGE_UNLOCK(sc);
2057d30c739cSEd Maste }
2058d30c739cSEd Maste 
2059d30c739cSEd Maste /**
2060d30c739cSEd Maste  *	muge_probe - Probe the interface.
2061d30c739cSEd Maste  *	@dev: muge device handle
2062d30c739cSEd Maste  *
2063d30c739cSEd Maste  *	Checks if the device is a match for this driver.
2064d30c739cSEd Maste  *
2065d30c739cSEd Maste  *	RETURNS:
2066d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
2067d30c739cSEd Maste  */
2068d30c739cSEd Maste static int
2069d30c739cSEd Maste muge_probe(device_t dev)
2070d30c739cSEd Maste {
2071d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2072d30c739cSEd Maste 
2073d30c739cSEd Maste 	if (uaa->usb_mode != USB_MODE_HOST)
2074d30c739cSEd Maste 		return (ENXIO);
2075d30c739cSEd Maste 	if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX)
2076d30c739cSEd Maste 		return (ENXIO);
2077d30c739cSEd Maste 	if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX)
2078d30c739cSEd Maste 		return (ENXIO);
2079d30c739cSEd Maste 	return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa));
2080d30c739cSEd Maste }
2081d30c739cSEd Maste 
2082d30c739cSEd Maste /**
2083d30c739cSEd Maste  *	muge_attach - Attach the interface.
2084d30c739cSEd Maste  *	@dev: muge device handle
2085d30c739cSEd Maste  *
2086d30c739cSEd Maste  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
2087d30c739cSEd Maste  *
2088d30c739cSEd Maste  *	RETURNS:
2089d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
2090d30c739cSEd Maste  */
2091d30c739cSEd Maste static int
2092d30c739cSEd Maste muge_attach(device_t dev)
2093d30c739cSEd Maste {
2094d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2095d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2096d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2097d30c739cSEd Maste 	uint8_t iface_index;
2098d30c739cSEd Maste 	int err;
2099d30c739cSEd Maste 
2100d30c739cSEd Maste 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
2101d30c739cSEd Maste 
2102d30c739cSEd Maste 	device_set_usb_desc(dev);
2103d30c739cSEd Maste 
2104d30c739cSEd Maste 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
2105d30c739cSEd Maste 
2106*e5151258SEd Maste 	/* Setup the endpoints for the Microchip LAN78xx device. */
2107d30c739cSEd Maste 	iface_index = MUGE_IFACE_IDX;
2108d30c739cSEd Maste 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
2109d30c739cSEd Maste 	    muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx);
2110d30c739cSEd Maste 	if (err) {
2111d30c739cSEd Maste 		device_printf(dev, "error: allocating USB transfers failed\n");
2112d30c739cSEd Maste 		goto detach;
2113d30c739cSEd Maste 	}
2114d30c739cSEd Maste 
2115d30c739cSEd Maste 	ue->ue_sc = sc;
2116d30c739cSEd Maste 	ue->ue_dev = dev;
2117d30c739cSEd Maste 	ue->ue_udev = uaa->device;
2118d30c739cSEd Maste 	ue->ue_mtx = &sc->sc_mtx;
2119d30c739cSEd Maste 	ue->ue_methods = &muge_ue_methods;
2120d30c739cSEd Maste 
2121d30c739cSEd Maste 	err = uether_ifattach(ue);
2122d30c739cSEd Maste 	if (err) {
2123d30c739cSEd Maste 		device_printf(dev, "error: could not attach interface\n");
2124d30c739cSEd Maste 		goto detach;
2125d30c739cSEd Maste 	}
2126d30c739cSEd Maste 	return (0);
2127d30c739cSEd Maste 
2128d30c739cSEd Maste detach:
2129d30c739cSEd Maste 	muge_detach(dev);
2130d30c739cSEd Maste 	return (ENXIO);
2131d30c739cSEd Maste }
2132d30c739cSEd Maste 
2133d30c739cSEd Maste /**
2134d30c739cSEd Maste  *	muge_detach - Detach the interface.
2135d30c739cSEd Maste  *	@dev: muge device handle
2136d30c739cSEd Maste  *
2137d30c739cSEd Maste  *	RETURNS:
2138d30c739cSEd Maste  *	Returns 0.
2139d30c739cSEd Maste  */
2140d30c739cSEd Maste static int
2141d30c739cSEd Maste muge_detach(device_t dev)
2142d30c739cSEd Maste {
2143d30c739cSEd Maste 
2144d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2145d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2146d30c739cSEd Maste 
2147d30c739cSEd Maste 	usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2148d30c739cSEd Maste 	uether_ifdetach(ue);
2149d30c739cSEd Maste 	mtx_destroy(&sc->sc_mtx);
2150d30c739cSEd Maste 
2151d30c739cSEd Maste 	return (0);
2152d30c739cSEd Maste }
2153d30c739cSEd Maste 
2154d30c739cSEd Maste static device_method_t muge_methods[] = {
2155d30c739cSEd Maste 	/* Device interface */
2156d30c739cSEd Maste 	DEVMETHOD(device_probe, muge_probe),
2157d30c739cSEd Maste 	DEVMETHOD(device_attach, muge_attach),
2158d30c739cSEd Maste 	DEVMETHOD(device_detach, muge_detach),
2159d30c739cSEd Maste 
2160d30c739cSEd Maste 	/* Bus interface */
2161d30c739cSEd Maste 	DEVMETHOD(bus_print_child, bus_generic_print_child),
2162d30c739cSEd Maste 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
2163d30c739cSEd Maste 
2164d30c739cSEd Maste 	/* MII interface */
2165d30c739cSEd Maste 	DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg),
2166d30c739cSEd Maste 	DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg),
2167d30c739cSEd Maste 	DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg),
2168d30c739cSEd Maste 
2169d30c739cSEd Maste 	DEVMETHOD_END
2170d30c739cSEd Maste };
2171d30c739cSEd Maste 
2172d30c739cSEd Maste static driver_t muge_driver = {
2173d30c739cSEd Maste 	.name = "muge",
2174d30c739cSEd Maste 	.methods = muge_methods,
2175d30c739cSEd Maste 	.size = sizeof(struct muge_softc),
2176d30c739cSEd Maste };
2177d30c739cSEd Maste 
2178d30c739cSEd Maste static devclass_t muge_devclass;
2179d30c739cSEd Maste 
2180d30c739cSEd Maste DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, 0);
2181d30c739cSEd Maste DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, 0, 0);
2182d30c739cSEd Maste MODULE_DEPEND(muge, uether, 1, 1, 1);
2183d30c739cSEd Maste MODULE_DEPEND(muge, usb, 1, 1, 1);
2184d30c739cSEd Maste MODULE_DEPEND(muge, ether, 1, 1, 1);
2185d30c739cSEd Maste MODULE_DEPEND(muge, miibus, 1, 1, 1);
2186d30c739cSEd Maste MODULE_VERSION(muge, 1);
2187d30c739cSEd Maste USB_PNP_HOST_INFO(lan78xx_devs);
2188