xref: /freebsd/sys/dev/usb/net/if_muge.c (revision d736b527570d015a0ec31d1db165d36601559d1f)
1d30c739cSEd Maste /*-
2d30c739cSEd Maste  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3d30c739cSEd Maste  *
4d30c739cSEd Maste  * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>.
5d30c739cSEd Maste  * Copyright (C) 2018 The FreeBSD Foundation.
6d30c739cSEd Maste  *
7d30c739cSEd Maste  * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com>
8d30c739cSEd Maste  * under sponsorship from the FreeBSD Foundation.
9d30c739cSEd Maste  *
10d30c739cSEd Maste  * Redistribution and use in source and binary forms, with or without
11d30c739cSEd Maste  * modification, are permitted provided that the following conditions
12d30c739cSEd Maste  * are met:
13d30c739cSEd Maste  * 1. Redistributions of source code must retain the above copyright
14d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer.
15d30c739cSEd Maste  * 2. Redistributions in binary form must reproduce the above copyright
16d30c739cSEd Maste  *    notice, this list of conditions and the following disclaimer in the
17d30c739cSEd Maste  *    documentation and/or other materials provided with the distribution.
18d30c739cSEd Maste  *
19d30c739cSEd Maste  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20d30c739cSEd Maste  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21d30c739cSEd Maste  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22d30c739cSEd Maste  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23d30c739cSEd Maste  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24d30c739cSEd Maste  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25d30c739cSEd Maste  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26d30c739cSEd Maste  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27d30c739cSEd Maste  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28d30c739cSEd Maste  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29d30c739cSEd Maste  * SUCH DAMAGE.
30d30c739cSEd Maste  *
31d30c739cSEd Maste  * $FreeBSD$
32d30c739cSEd Maste  */
33d30c739cSEd Maste 
34d30c739cSEd Maste #include <sys/cdefs.h>
35d30c739cSEd Maste __FBSDID("$FreeBSD$");
36d30c739cSEd Maste 
37d30c739cSEd Maste /*
38d30c739cSEd Maste  * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families.
39d30c739cSEd Maste  *
40d30c739cSEd Maste  * USB 3.1 to 10/100/1000 Mbps Ethernet
41d30c739cSEd Maste  * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800
42d30c739cSEd Maste  *
432d14fb8bSEd Maste  * USB 2.0 to 10/100/1000 Mbps Ethernet
442d14fb8bSEd Maste  * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850
452d14fb8bSEd Maste  *
46d30c739cSEd Maste  * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub
47d30c739cSEd Maste  * LAN7515 (no datasheet available, but probes and functions as LAN7800)
48d30c739cSEd Maste  *
49d30c739cSEd Maste  * This driver is based on the if_smsc driver, with lan78xx-specific
50d30c739cSEd Maste  * functionality modelled on Microchip's Linux lan78xx driver.
51d30c739cSEd Maste  *
52d30c739cSEd Maste  * UNIMPLEMENTED FEATURES
53d30c739cSEd Maste  * ------------------
54d30c739cSEd Maste  * A number of features supported by the lan78xx are not yet implemented in
55d30c739cSEd Maste  * this driver:
56d30c739cSEd Maste  *
57515a5d02SEd Maste  * - RX/TX checksum offloading: Nothing has been implemented yet for
58d30c739cSEd Maste  *   TX checksumming. RX checksumming works with ICMP messages, but is broken
59d30c739cSEd Maste  *   for TCP/UDP packets.
60515a5d02SEd Maste  * - Direct address translation filtering: Implemented but untested.
61515a5d02SEd Maste  * - VLAN tag removal.
62515a5d02SEd Maste  * - Support for USB interrupt endpoints.
63515a5d02SEd Maste  * - Latency Tolerance Messaging (LTM) support.
64515a5d02SEd Maste  * - TCP LSO support.
65d30c739cSEd Maste  *
66d30c739cSEd Maste  */
67d30c739cSEd Maste 
68d30c739cSEd Maste #include <sys/param.h>
69d30c739cSEd Maste #include <sys/bus.h>
70d30c739cSEd Maste #include <sys/callout.h>
71d30c739cSEd Maste #include <sys/condvar.h>
72d30c739cSEd Maste #include <sys/kernel.h>
73d30c739cSEd Maste #include <sys/lock.h>
74d30c739cSEd Maste #include <sys/malloc.h>
75d30c739cSEd Maste #include <sys/module.h>
76d30c739cSEd Maste #include <sys/mutex.h>
77d30c739cSEd Maste #include <sys/priv.h>
78d30c739cSEd Maste #include <sys/queue.h>
79d30c739cSEd Maste #include <sys/random.h>
80d30c739cSEd Maste #include <sys/socket.h>
81d30c739cSEd Maste #include <sys/stddef.h>
82d30c739cSEd Maste #include <sys/stdint.h>
83d30c739cSEd Maste #include <sys/sx.h>
84d30c739cSEd Maste #include <sys/sysctl.h>
85d30c739cSEd Maste #include <sys/systm.h>
86d30c739cSEd Maste #include <sys/unistd.h>
87d30c739cSEd Maste 
88d30c739cSEd Maste #include <net/if.h>
89d30c739cSEd Maste #include <net/if_var.h>
90d30c739cSEd Maste 
91d30c739cSEd Maste #include <netinet/in.h>
92d30c739cSEd Maste #include <netinet/ip.h>
93d30c739cSEd Maste 
94d30c739cSEd Maste #include "opt_platform.h"
95d30c739cSEd Maste 
96b4872d67SOleksandr Tymoshenko #ifdef FDT
97b4872d67SOleksandr Tymoshenko #include <dev/fdt/fdt_common.h>
98b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h>
99b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h>
10018dc4538SIan Lepore #include <dev/usb/usb_fdt_support.h>
101b4872d67SOleksandr Tymoshenko #endif
102b4872d67SOleksandr Tymoshenko 
103d30c739cSEd Maste #include <dev/usb/usb.h>
104d30c739cSEd Maste #include <dev/usb/usbdi.h>
105d30c739cSEd Maste #include <dev/usb/usbdi_util.h>
106d30c739cSEd Maste #include "usbdevs.h"
107d30c739cSEd Maste 
108d30c739cSEd Maste #define USB_DEBUG_VAR lan78xx_debug
109d30c739cSEd Maste #include <dev/usb/usb_debug.h>
110d30c739cSEd Maste #include <dev/usb/usb_process.h>
111d30c739cSEd Maste 
112d30c739cSEd Maste #include <dev/usb/net/usb_ethernet.h>
113d30c739cSEd Maste 
114d30c739cSEd Maste #include <dev/usb/net/if_mugereg.h>
115d30c739cSEd Maste 
116d30c739cSEd Maste #ifdef USB_DEBUG
117d30c739cSEd Maste static int muge_debug = 0;
118d30c739cSEd Maste 
119d30c739cSEd Maste SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0,
120d30c739cSEd Maste     "Microchip LAN78xx USB-GigE");
121d30c739cSEd Maste SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0,
122d30c739cSEd Maste     "Debug level");
123d30c739cSEd Maste #endif
124d30c739cSEd Maste 
125d30c739cSEd Maste #define MUGE_DEFAULT_RX_CSUM_ENABLE (false)
126d30c739cSEd Maste #define MUGE_DEFAULT_TX_CSUM_ENABLE (false)
127d30c739cSEd Maste #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false)
128d30c739cSEd Maste 
129d30c739cSEd Maste /* Supported Vendor and Product IDs. */
130d30c739cSEd Maste static const struct usb_device_id lan78xx_devs[] = {
131d30c739cSEd Maste #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
132d30c739cSEd Maste 	MUGE_DEV(LAN7800_ETH, 0),
13349b2a5feSEd Maste 	MUGE_DEV(LAN7801_ETH, 0),
13449b2a5feSEd Maste 	MUGE_DEV(LAN7850_ETH, 0),
135d30c739cSEd Maste #undef MUGE_DEV
136d30c739cSEd Maste };
137d30c739cSEd Maste 
138d30c739cSEd Maste #ifdef USB_DEBUG
139087522b8SAndreas Tobler #define muge_dbg_printf(sc, fmt, args...) \
140d30c739cSEd Maste do { \
141d30c739cSEd Maste 	if (muge_debug > 0) \
142d30c739cSEd Maste 		device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
143d30c739cSEd Maste } while(0)
144d30c739cSEd Maste #else
145d30c739cSEd Maste #define muge_dbg_printf(sc, fmt, args...) do { } while (0)
146d30c739cSEd Maste #endif
147d30c739cSEd Maste 
148d30c739cSEd Maste #define muge_warn_printf(sc, fmt, args...) \
149d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
150d30c739cSEd Maste 
151d30c739cSEd Maste #define muge_err_printf(sc, fmt, args...) \
152d30c739cSEd Maste 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
153d30c739cSEd Maste 
154d30c739cSEd Maste #define ETHER_IS_ZERO(addr) \
155d30c739cSEd Maste 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
156d30c739cSEd Maste 
157d30c739cSEd Maste #define ETHER_IS_VALID(addr) \
158d30c739cSEd Maste 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
159d30c739cSEd Maste 
160d30c739cSEd Maste /* USB endpoints. */
161d30c739cSEd Maste 
162d30c739cSEd Maste enum {
163d30c739cSEd Maste 	MUGE_BULK_DT_RD,
164d30c739cSEd Maste 	MUGE_BULK_DT_WR,
165e5151258SEd Maste #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */
166e5151258SEd Maste 	MUGE_INTR_DT_WR,
167e5151258SEd Maste 	MUGE_INTR_DT_RD,
168e5151258SEd Maste #endif
169d30c739cSEd Maste 	MUGE_N_TRANSFER,
170d30c739cSEd Maste };
171d30c739cSEd Maste 
172d30c739cSEd Maste struct muge_softc {
173d30c739cSEd Maste 	struct usb_ether	sc_ue;
174d30c739cSEd Maste 	struct mtx		sc_mtx;
175d30c739cSEd Maste 	struct usb_xfer		*sc_xfer[MUGE_N_TRANSFER];
176d30c739cSEd Maste 	int			sc_phyno;
17760ce15edSEd Maste 	uint32_t		sc_leds;
17803dec173SEd Maste 	uint16_t		sc_led_modes;
17903dec173SEd Maste 	uint16_t		sc_led_modes_mask;
180d30c739cSEd Maste 
181d30c739cSEd Maste 	/* Settings for the mac control (MAC_CSR) register. */
182d30c739cSEd Maste 	uint32_t		sc_rfe_ctl;
183d30c739cSEd Maste 	uint32_t		sc_mdix_ctl;
18403ba5353SEd Maste 	uint16_t		chipid;
18503ba5353SEd Maste 	uint16_t		chiprev;
18648bc1758SEd Maste 	uint32_t		sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN];
187d30c739cSEd Maste 	uint32_t		sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2];
188d30c739cSEd Maste 
189d30c739cSEd Maste 	uint32_t		sc_flags;
190d30c739cSEd Maste #define	MUGE_FLAG_LINK		0x0001
19149b2a5feSEd Maste #define	MUGE_FLAG_INIT_DONE	0x0002
192d30c739cSEd Maste };
193d30c739cSEd Maste 
194d30c739cSEd Maste #define MUGE_IFACE_IDX		0
195d30c739cSEd Maste 
196d30c739cSEd Maste #define MUGE_LOCK(_sc)			mtx_lock(&(_sc)->sc_mtx)
197d30c739cSEd Maste #define MUGE_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
198d30c739cSEd Maste #define MUGE_LOCK_ASSERT(_sc, t)	mtx_assert(&(_sc)->sc_mtx, t)
199d30c739cSEd Maste 
200d30c739cSEd Maste static device_probe_t muge_probe;
201d30c739cSEd Maste static device_attach_t muge_attach;
202d30c739cSEd Maste static device_detach_t muge_detach;
203d30c739cSEd Maste 
204d30c739cSEd Maste static usb_callback_t muge_bulk_read_callback;
205d30c739cSEd Maste static usb_callback_t muge_bulk_write_callback;
206d30c739cSEd Maste 
207d30c739cSEd Maste static miibus_readreg_t lan78xx_miibus_readreg;
208d30c739cSEd Maste static miibus_writereg_t lan78xx_miibus_writereg;
209d30c739cSEd Maste static miibus_statchg_t lan78xx_miibus_statchg;
210d30c739cSEd Maste 
211d30c739cSEd Maste static int muge_attach_post_sub(struct usb_ether *ue);
212d30c739cSEd Maste static uether_fn_t muge_attach_post;
213d30c739cSEd Maste static uether_fn_t muge_init;
214d30c739cSEd Maste static uether_fn_t muge_stop;
215d30c739cSEd Maste static uether_fn_t muge_start;
216d30c739cSEd Maste static uether_fn_t muge_tick;
217d30c739cSEd Maste static uether_fn_t muge_setmulti;
218d30c739cSEd Maste static uether_fn_t muge_setpromisc;
219d30c739cSEd Maste 
220d30c739cSEd Maste static int muge_ifmedia_upd(struct ifnet *);
221d30c739cSEd Maste static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
222d30c739cSEd Maste 
223d30c739cSEd Maste static int lan78xx_chip_init(struct muge_softc *sc);
224d30c739cSEd Maste static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
225d30c739cSEd Maste 
226d30c739cSEd Maste static const struct usb_config muge_config[MUGE_N_TRANSFER] = {
227d30c739cSEd Maste 
228d30c739cSEd Maste 	[MUGE_BULK_DT_WR] = {
229d30c739cSEd Maste 		.type = UE_BULK,
230d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
231d30c739cSEd Maste 		.direction = UE_DIR_OUT,
232d30c739cSEd Maste 		.frames = 16,
233d30c739cSEd Maste 		.bufsize = 16 * (MCLBYTES + 16),
234d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
235d30c739cSEd Maste 		.callback = muge_bulk_write_callback,
236d30c739cSEd Maste 		.timeout = 10000,	/* 10 seconds */
237d30c739cSEd Maste 	},
238d30c739cSEd Maste 
239d30c739cSEd Maste 	[MUGE_BULK_DT_RD] = {
240d30c739cSEd Maste 		.type = UE_BULK,
241d30c739cSEd Maste 		.endpoint = UE_ADDR_ANY,
242d30c739cSEd Maste 		.direction = UE_DIR_IN,
243d30c739cSEd Maste 		.bufsize = 20480,	/* bytes */
244d30c739cSEd Maste 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
245d30c739cSEd Maste 		.callback = muge_bulk_read_callback,
246d30c739cSEd Maste 		.timeout = 0,	/* no timeout */
247d30c739cSEd Maste 	},
248d30c739cSEd Maste 	/*
249d30c739cSEd Maste 	 * The chip supports interrupt endpoints, however they aren't
250d30c739cSEd Maste 	 * needed as we poll on the MII status.
251d30c739cSEd Maste 	 */
252d30c739cSEd Maste };
253d30c739cSEd Maste 
254d30c739cSEd Maste static const struct usb_ether_methods muge_ue_methods = {
255d30c739cSEd Maste 	.ue_attach_post = muge_attach_post,
256d30c739cSEd Maste 	.ue_attach_post_sub = muge_attach_post_sub,
257d30c739cSEd Maste 	.ue_start = muge_start,
258d30c739cSEd Maste 	.ue_ioctl = muge_ioctl,
259d30c739cSEd Maste 	.ue_init = muge_init,
260d30c739cSEd Maste 	.ue_stop = muge_stop,
261d30c739cSEd Maste 	.ue_tick = muge_tick,
262d30c739cSEd Maste 	.ue_setmulti = muge_setmulti,
263d30c739cSEd Maste 	.ue_setpromisc = muge_setpromisc,
264d30c739cSEd Maste 	.ue_mii_upd = muge_ifmedia_upd,
265d30c739cSEd Maste 	.ue_mii_sts = muge_ifmedia_sts,
266d30c739cSEd Maste };
267d30c739cSEd Maste 
268d30c739cSEd Maste /**
269d30c739cSEd Maste  *	lan78xx_read_reg - Read a 32-bit register on the device
270d30c739cSEd Maste  *	@sc: driver soft context
271d30c739cSEd Maste  *	@off: offset of the register
272d30c739cSEd Maste  *	@data: pointer a value that will be populated with the register value
273d30c739cSEd Maste  *
274d30c739cSEd Maste  *	LOCKING:
275d30c739cSEd Maste  *	The device lock must be held before calling this function.
276d30c739cSEd Maste  *
277d30c739cSEd Maste  *	RETURNS:
278d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
279d30c739cSEd Maste  */
280d30c739cSEd Maste static int
281d30c739cSEd Maste lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data)
282d30c739cSEd Maste {
283d30c739cSEd Maste 	struct usb_device_request req;
284d30c739cSEd Maste 	uint32_t buf;
285d30c739cSEd Maste 	usb_error_t err;
286d30c739cSEd Maste 
287d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
288d30c739cSEd Maste 
289d30c739cSEd Maste 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
290d30c739cSEd Maste 	req.bRequest = UVR_READ_REG;
291d30c739cSEd Maste 	USETW(req.wValue, 0);
292d30c739cSEd Maste 	USETW(req.wIndex, off);
293d30c739cSEd Maste 	USETW(req.wLength, 4);
294d30c739cSEd Maste 
295d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
296d30c739cSEd Maste 	if (err != 0)
297d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to read register 0x%0x\n", off);
298d30c739cSEd Maste 	*data = le32toh(buf);
299d30c739cSEd Maste 	return (err);
300d30c739cSEd Maste }
301d30c739cSEd Maste 
302d30c739cSEd Maste /**
303d30c739cSEd Maste  *	lan78xx_write_reg - Write a 32-bit register on the device
304d30c739cSEd Maste  *	@sc: driver soft context
305d30c739cSEd Maste  *	@off: offset of the register
306d30c739cSEd Maste  *	@data: the 32-bit value to write into the register
307d30c739cSEd Maste  *
308d30c739cSEd Maste  *	LOCKING:
309d30c739cSEd Maste  *	The device lock must be held before calling this function.
310d30c739cSEd Maste  *
311d30c739cSEd Maste  *	RETURNS:
312d30c739cSEd Maste  *	0 on success, a USB_ERR_?? error code on failure.
313d30c739cSEd Maste  */
314d30c739cSEd Maste static int
315d30c739cSEd Maste lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data)
316d30c739cSEd Maste {
317d30c739cSEd Maste 	struct usb_device_request req;
318d30c739cSEd Maste 	uint32_t buf;
319d30c739cSEd Maste 	usb_error_t err;
320d30c739cSEd Maste 
321d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
322d30c739cSEd Maste 
323d30c739cSEd Maste 	buf = htole32(data);
324d30c739cSEd Maste 
325d30c739cSEd Maste 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
326d30c739cSEd Maste 	req.bRequest = UVR_WRITE_REG;
327d30c739cSEd Maste 	USETW(req.wValue, 0);
328d30c739cSEd Maste 	USETW(req.wIndex, off);
329d30c739cSEd Maste 	USETW(req.wLength, 4);
330d30c739cSEd Maste 
331d30c739cSEd Maste 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
332d30c739cSEd Maste 	if (err != 0)
333d30c739cSEd Maste 		muge_warn_printf(sc, "Failed to write register 0x%0x\n", off);
334d30c739cSEd Maste 	return (err);
335d30c739cSEd Maste }
336d30c739cSEd Maste 
337d30c739cSEd Maste /**
338d30c739cSEd Maste  *	lan78xx_wait_for_bits - Poll on a register value until bits are cleared
339d30c739cSEd Maste  *	@sc: soft context
340d30c739cSEd Maste  *	@reg: offset of the register
341d30c739cSEd Maste  *	@bits: if the bits are clear the function returns
342d30c739cSEd Maste  *
343d30c739cSEd Maste  *	LOCKING:
344d30c739cSEd Maste  *	The device lock must be held before calling this function.
345d30c739cSEd Maste  *
346d30c739cSEd Maste  *	RETURNS:
347d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
348d30c739cSEd Maste  */
349d30c739cSEd Maste static int
350d30c739cSEd Maste lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits)
351d30c739cSEd Maste {
352d30c739cSEd Maste 	usb_ticks_t start_ticks;
353d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
354d30c739cSEd Maste 	uint32_t val;
355d30c739cSEd Maste 	int err;
356d30c739cSEd Maste 
357d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
358d30c739cSEd Maste 
359d30c739cSEd Maste 	start_ticks = (usb_ticks_t)ticks;
360d30c739cSEd Maste 	do {
361d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
362d30c739cSEd Maste 			return (err);
363d30c739cSEd Maste 		if (!(val & bits))
364d30c739cSEd Maste 			return (0);
365d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
366d30c739cSEd Maste 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
367d30c739cSEd Maste 
368d30c739cSEd Maste 	return (USB_ERR_TIMEOUT);
369d30c739cSEd Maste }
370d30c739cSEd Maste 
371d30c739cSEd Maste /**
372d30c739cSEd Maste  *	lan78xx_eeprom_read_raw - Read the attached EEPROM
373d30c739cSEd Maste  *	@sc: soft context
374d30c739cSEd Maste  *	@off: the eeprom address offset
375d30c739cSEd Maste  *	@buf: stores the bytes
376d30c739cSEd Maste  *	@buflen: the number of bytes to read
377d30c739cSEd Maste  *
378d30c739cSEd Maste  *	Simply reads bytes from an attached eeprom.
379d30c739cSEd Maste  *
380d30c739cSEd Maste  *	LOCKING:
381d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
382d30c739cSEd Maste  *
383d30c739cSEd Maste  *	RETURNS:
384d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
385d30c739cSEd Maste  */
386d30c739cSEd Maste static int
387d30c739cSEd Maste lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
388d30c739cSEd Maste     uint16_t buflen)
389d30c739cSEd Maste {
390d30c739cSEd Maste 	usb_ticks_t start_ticks;
391d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
392d30c739cSEd Maste 	int err, locked;
393d30c739cSEd Maste 	uint32_t val, saved;
394d30c739cSEd Maste 	uint16_t i;
395d30c739cSEd Maste 
396d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx); /* XXX */
397d30c739cSEd Maste 	if (!locked)
398d30c739cSEd Maste 		MUGE_LOCK(sc);
399d30c739cSEd Maste 
4002d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
4012d14fb8bSEd Maste 		/* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */
40248bc1758SEd Maste 		err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
403d30c739cSEd Maste 		saved = val;
404d30c739cSEd Maste 
40548bc1758SEd Maste 		val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
40648bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
4072d14fb8bSEd Maste 	}
408d30c739cSEd Maste 
40948bc1758SEd Maste 	err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_);
410d30c739cSEd Maste 	if (err != 0) {
411d30c739cSEd Maste 		muge_warn_printf(sc, "eeprom busy, failed to read data\n");
412d30c739cSEd Maste 		goto done;
413d30c739cSEd Maste 	}
414d30c739cSEd Maste 
415d30c739cSEd Maste 	/* Start reading the bytes, one at a time. */
416d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
41748bc1758SEd Maste 		val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
41848bc1758SEd Maste 		val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
41948bc1758SEd Maste 		if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
420d30c739cSEd Maste 			goto done;
421d30c739cSEd Maste 
422d30c739cSEd Maste 		start_ticks = (usb_ticks_t)ticks;
423d30c739cSEd Maste 		do {
42448bc1758SEd Maste 			if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
42548bc1758SEd Maste 			    0)
426d30c739cSEd Maste 				goto done;
42748bc1758SEd Maste 			if (!(val & ETH_E2P_CMD_BUSY_) ||
42848bc1758SEd Maste 			    (val & ETH_E2P_CMD_TIMEOUT_))
429d30c739cSEd Maste 				break;
430d30c739cSEd Maste 
431d30c739cSEd Maste 			uether_pause(&sc->sc_ue, hz / 100);
432d30c739cSEd Maste 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
433d30c739cSEd Maste 
43448bc1758SEd Maste 		if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
435d30c739cSEd Maste 			muge_warn_printf(sc, "eeprom command failed\n");
436d30c739cSEd Maste 			err = USB_ERR_IOERROR;
437d30c739cSEd Maste 			break;
438d30c739cSEd Maste 		}
439d30c739cSEd Maste 
44048bc1758SEd Maste 		if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
441d30c739cSEd Maste 			goto done;
442d30c739cSEd Maste 
443d30c739cSEd Maste 		buf[i] = (val & 0xff);
444d30c739cSEd Maste 	}
445d30c739cSEd Maste 
446d30c739cSEd Maste done:
447d30c739cSEd Maste 	if (!locked)
448d30c739cSEd Maste 		MUGE_UNLOCK(sc);
4492d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) {
4502d14fb8bSEd Maste 		/* Restore saved LED configuration. */
45148bc1758SEd Maste 		lan78xx_write_reg(sc, ETH_HW_CFG, saved);
4522d14fb8bSEd Maste 	}
453d30c739cSEd Maste 	return (err);
454d30c739cSEd Maste }
455d30c739cSEd Maste 
4562c8cf0c5SEd Maste static bool
4572c8cf0c5SEd Maste lan78xx_eeprom_present(struct muge_softc *sc)
458d30c739cSEd Maste {
459d30c739cSEd Maste 	int ret;
4602c8cf0c5SEd Maste 	uint8_t sig;
461d30c739cSEd Maste 
46248bc1758SEd Maste 	ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1);
4632c8cf0c5SEd Maste 	return (ret == 0 && sig == ETH_E2P_INDICATOR);
464d30c739cSEd Maste }
465d30c739cSEd Maste 
466d30c739cSEd Maste /**
467d30c739cSEd Maste  *	lan78xx_otp_read_raw
468d30c739cSEd Maste  *	@sc: soft context
469d30c739cSEd Maste  *	@off: the otp address offset
470d30c739cSEd Maste  *	@buf: stores the bytes
471d30c739cSEd Maste  *	@buflen: the number of bytes to read
472d30c739cSEd Maste  *
473d30c739cSEd Maste  *	Simply reads bytes from the OTP.
474d30c739cSEd Maste  *
475d30c739cSEd Maste  *	LOCKING:
476d30c739cSEd Maste  *	The function takes and releases the device lock if not already held.
477d30c739cSEd Maste  *
478d30c739cSEd Maste  *	RETURNS:
479d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
480d30c739cSEd Maste  *
481d30c739cSEd Maste  */
482d30c739cSEd Maste static int
483d30c739cSEd Maste lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf,
484d30c739cSEd Maste     uint16_t buflen)
485d30c739cSEd Maste {
486d30c739cSEd Maste 	int locked, err;
487d30c739cSEd Maste 	uint32_t val;
488d30c739cSEd Maste 	uint16_t i;
489d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
490d30c739cSEd Maste 	if (!locked)
491d30c739cSEd Maste 		MUGE_LOCK(sc);
492d30c739cSEd Maste 
493d30c739cSEd Maste 	err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
494d30c739cSEd Maste 
495e5151258SEd Maste 	/* Checking if bit is set. */
496d30c739cSEd Maste 	if (val & OTP_PWR_DN_PWRDN_N) {
497e5151258SEd Maste 		/* Clear it, then wait for it to be cleared. */
498d30c739cSEd Maste 		lan78xx_write_reg(sc, OTP_PWR_DN, 0);
499d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N);
500d30c739cSEd Maste 		if (err != 0) {
501d30c739cSEd Maste 			muge_warn_printf(sc, "OTP off? failed to read data\n");
502d30c739cSEd Maste 			goto done;
503d30c739cSEd Maste 		}
504d30c739cSEd Maste 	}
505e5151258SEd Maste 	/* Start reading the bytes, one at a time. */
506d30c739cSEd Maste 	for (i = 0; i < buflen; i++) {
507d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR1,
508d30c739cSEd Maste 		    ((off + i) >> 8) & OTP_ADDR1_15_11);
509d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_ADDR2,
510d30c739cSEd Maste 		    ((off + i) & OTP_ADDR2_10_3));
511d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
512d30c739cSEd Maste 		err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_);
513d30c739cSEd Maste 
514d30c739cSEd Maste 		err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_);
515d30c739cSEd Maste 		if (err != 0) {
516d30c739cSEd Maste 			muge_warn_printf(sc, "OTP busy failed to read data\n");
517d30c739cSEd Maste 			goto done;
518d30c739cSEd Maste 		}
519d30c739cSEd Maste 
520d30c739cSEd Maste 		if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
521d30c739cSEd Maste 			goto done;
522d30c739cSEd Maste 
523d30c739cSEd Maste 		buf[i] = (uint8_t)(val & 0xff);
524d30c739cSEd Maste 	}
525d30c739cSEd Maste 
526d30c739cSEd Maste done:
527d30c739cSEd Maste 	if (!locked)
528d30c739cSEd Maste 		MUGE_UNLOCK(sc);
529d30c739cSEd Maste 	return (err);
530d30c739cSEd Maste }
531d30c739cSEd Maste 
532d30c739cSEd Maste /**
533d30c739cSEd Maste  *	lan78xx_otp_read
534d30c739cSEd Maste  *	@sc: soft context
535d30c739cSEd Maste  *	@off: the otp address offset
536d30c739cSEd Maste  *	@buf: stores the bytes
537d30c739cSEd Maste  *	@buflen: the number of bytes to read
538d30c739cSEd Maste  *
539d30c739cSEd Maste  *	Simply reads bytes from the otp.
540d30c739cSEd Maste  *
541d30c739cSEd Maste  *	LOCKING:
542d30c739cSEd Maste  *	The function takes and releases device lock if it is not already held.
543d30c739cSEd Maste  *
544d30c739cSEd Maste  *	RETURNS:
545d30c739cSEd Maste  *	0 on success, or a USB_ERR_?? error code on failure.
546d30c739cSEd Maste  */
547d30c739cSEd Maste static int
548d30c739cSEd Maste lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf,
549d30c739cSEd Maste     uint16_t buflen)
550d30c739cSEd Maste {
551d30c739cSEd Maste 	uint8_t sig;
552d30c739cSEd Maste 	int err;
553d30c739cSEd Maste 
554d30c739cSEd Maste 	err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1);
555d30c739cSEd Maste 	if (err == 0) {
556d30c739cSEd Maste 		if (sig == OTP_INDICATOR_1) {
557d30c739cSEd Maste 		} else if (sig == OTP_INDICATOR_2) {
558e5151258SEd Maste 			off += 0x100; /* XXX */
559d30c739cSEd Maste 		} else {
560d30c739cSEd Maste 			err = -EINVAL;
561d30c739cSEd Maste 		}
562d30c739cSEd Maste 		if (!err)
563d30c739cSEd Maste 			err = lan78xx_otp_read_raw(sc, off, buf, buflen);
564d30c739cSEd Maste 	}
565e5151258SEd Maste 	return (err);
566d30c739cSEd Maste }
567d30c739cSEd Maste 
568d30c739cSEd Maste /**
569d30c739cSEd Maste  *	lan78xx_setmacaddress - Set the mac address in the device
570d30c739cSEd Maste  *	@sc: driver soft context
571d30c739cSEd Maste  *	@addr: pointer to array contain at least 6 bytes of the mac
572d30c739cSEd Maste  *
573d30c739cSEd Maste  *	LOCKING:
574d30c739cSEd Maste  *	Should be called with the MUGE lock held.
575d30c739cSEd Maste  *
576d30c739cSEd Maste  *	RETURNS:
577d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
578d30c739cSEd Maste  */
579d30c739cSEd Maste static int
580d30c739cSEd Maste lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr)
581d30c739cSEd Maste {
582d30c739cSEd Maste 	int err;
583d30c739cSEd Maste 	uint32_t val;
584d30c739cSEd Maste 
585d30c739cSEd Maste 	muge_dbg_printf(sc,
586d30c739cSEd Maste 	    "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
587d30c739cSEd Maste 	    addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
588d30c739cSEd Maste 
589d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
590d30c739cSEd Maste 
591d30c739cSEd Maste 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
59248bc1758SEd Maste 	if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
593d30c739cSEd Maste 		goto done;
594d30c739cSEd Maste 
595d30c739cSEd Maste 	val = (addr[5] << 8) | addr[4];
59648bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
597d30c739cSEd Maste 
598d30c739cSEd Maste done:
599d30c739cSEd Maste 	return (err);
600d30c739cSEd Maste }
601d30c739cSEd Maste 
602d30c739cSEd Maste /**
603d30c739cSEd Maste  *	lan78xx_set_rx_max_frame_length
604d30c739cSEd Maste  *	@sc: driver soft context
605d30c739cSEd Maste  *	@size: pointer to array contain at least 6 bytes of the mac
606d30c739cSEd Maste  *
607d30c739cSEd Maste  *	Sets the maximum frame length to be received. Frames bigger than
608d30c739cSEd Maste  *	this size are aborted.
609d30c739cSEd Maste  *
610d30c739cSEd Maste  *	RETURNS:
611d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
612d30c739cSEd Maste  */
613d30c739cSEd Maste static int
614d30c739cSEd Maste lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size)
615d30c739cSEd Maste {
616d30c739cSEd Maste 	int err = 0;
617d30c739cSEd Maste 	uint32_t buf;
618d30c739cSEd Maste 	bool rxenabled;
619d30c739cSEd Maste 
620e5151258SEd Maste 	/* First we have to disable rx before changing the length. */
62148bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
62248bc1758SEd Maste 	rxenabled = ((buf & ETH_MAC_RX_EN_) != 0);
623d30c739cSEd Maste 
624d30c739cSEd Maste 	if (rxenabled) {
62548bc1758SEd Maste 		buf &= ~ETH_MAC_RX_EN_;
62648bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
627d30c739cSEd Maste 	}
628d30c739cSEd Maste 
629e5151258SEd Maste 	/* Setting max frame length. */
63048bc1758SEd Maste 	buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_;
63148bc1758SEd Maste 	buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) &
63248bc1758SEd Maste 	    ETH_MAC_RX_MAX_FR_SIZE_MASK_);
63348bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
634d30c739cSEd Maste 
635d30c739cSEd Maste 	/* If it were enabled before, we enable it back. */
636d30c739cSEd Maste 
637d30c739cSEd Maste 	if (rxenabled) {
63848bc1758SEd Maste 		buf |= ETH_MAC_RX_EN_;
63948bc1758SEd Maste 		err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
640d30c739cSEd Maste 	}
641d30c739cSEd Maste 
642e5151258SEd Maste 	return (0);
643d30c739cSEd Maste }
644d30c739cSEd Maste 
645d30c739cSEd Maste /**
646d30c739cSEd Maste  *	lan78xx_miibus_readreg - Read a MII/MDIO register
647d30c739cSEd Maste  *	@dev: usb ether device
648d30c739cSEd Maste  *	@phy: the number of phy reading from
649d30c739cSEd Maste  *	@reg: the register address
650d30c739cSEd Maste  *
651d30c739cSEd Maste  *	LOCKING:
652d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
653d30c739cSEd Maste  *
654d30c739cSEd Maste  *	RETURNS:
655d30c739cSEd Maste  *	Returns the 16-bits read from the MII register, if this function fails
656d30c739cSEd Maste  *	0 is returned.
657d30c739cSEd Maste  */
658d30c739cSEd Maste static int
659d30c739cSEd Maste lan78xx_miibus_readreg(device_t dev, int phy, int reg) {
660d30c739cSEd Maste 
661d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
662d30c739cSEd Maste 	int locked;
663d30c739cSEd Maste 	uint32_t addr, val;
664d30c739cSEd Maste 
665d30c739cSEd Maste 	val = 0;
666d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
667d30c739cSEd Maste 	if (!locked)
668d30c739cSEd Maste 		MUGE_LOCK(sc);
669d30c739cSEd Maste 
67048bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
67148bc1758SEd Maste 	    0) {
672d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
673d30c739cSEd Maste 		goto done;
674d30c739cSEd Maste 	}
675d30c739cSEd Maste 
67648bc1758SEd Maste 	addr = (phy << 11) | (reg << 6) |
67748bc1758SEd Maste 	    ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_;
67848bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
679d30c739cSEd Maste 
68048bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
68148bc1758SEd Maste 	    0) {
682d30c739cSEd Maste 		muge_warn_printf(sc, "MII read timeout\n");
683d30c739cSEd Maste 		goto done;
684d30c739cSEd Maste 	}
685d30c739cSEd Maste 
68648bc1758SEd Maste 	lan78xx_read_reg(sc, ETH_MII_DATA, &val);
687d30c739cSEd Maste 	val = le32toh(val);
688d30c739cSEd Maste 
689d30c739cSEd Maste done:
690d30c739cSEd Maste 	if (!locked)
691d30c739cSEd Maste 		MUGE_UNLOCK(sc);
692d30c739cSEd Maste 
693d30c739cSEd Maste 	return (val & 0xFFFF);
694d30c739cSEd Maste }
695d30c739cSEd Maste 
696d30c739cSEd Maste /**
697d30c739cSEd Maste  *	lan78xx_miibus_writereg - Writes a MII/MDIO register
698d30c739cSEd Maste  *	@dev: usb ether device
699d30c739cSEd Maste  *	@phy: the number of phy writing to
700d30c739cSEd Maste  *	@reg: the register address
701d30c739cSEd Maste  *	@val: the value to write
702d30c739cSEd Maste  *
703d30c739cSEd Maste  *	Attempts to write a PHY register through the usb controller registers.
704d30c739cSEd Maste  *
705d30c739cSEd Maste  *	LOCKING:
706d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
707d30c739cSEd Maste  *
708d30c739cSEd Maste  *	RETURNS:
709d30c739cSEd Maste  *	Always returns 0 regardless of success or failure.
710d30c739cSEd Maste  */
711d30c739cSEd Maste static int
712d30c739cSEd Maste lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
713d30c739cSEd Maste {
714d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
715d30c739cSEd Maste 	int locked;
716d30c739cSEd Maste 	uint32_t addr;
717d30c739cSEd Maste 
718d30c739cSEd Maste 	if (sc->sc_phyno != phy)
719d30c739cSEd Maste 		return (0);
720d30c739cSEd Maste 
721d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
722d30c739cSEd Maste 	if (!locked)
723d30c739cSEd Maste 		MUGE_LOCK(sc);
724d30c739cSEd Maste 
72548bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) !=
72648bc1758SEd Maste 	    0) {
727d30c739cSEd Maste 		muge_warn_printf(sc, "MII is busy\n");
728d30c739cSEd Maste 		goto done;
729d30c739cSEd Maste 	}
730d30c739cSEd Maste 
731d30c739cSEd Maste 	val = htole32(val);
73248bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_DATA, val);
733d30c739cSEd Maste 
734e5151258SEd Maste 	addr = (phy << 11) | (reg << 6) |
735e5151258SEd Maste 	    ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_;
73648bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_MII_ACC, addr);
737d30c739cSEd Maste 
73848bc1758SEd Maste 	if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0)
739d30c739cSEd Maste 		muge_warn_printf(sc, "MII write timeout\n");
740d30c739cSEd Maste 
741d30c739cSEd Maste done:
742d30c739cSEd Maste 	if (!locked)
743d30c739cSEd Maste 		MUGE_UNLOCK(sc);
744d30c739cSEd Maste 	return (0);
745d30c739cSEd Maste }
746d30c739cSEd Maste 
747d30c739cSEd Maste /*
748d30c739cSEd Maste  *	lan78xx_miibus_statchg - Called to detect phy status change
749d30c739cSEd Maste  *	@dev: usb ether device
750d30c739cSEd Maste  *
751d30c739cSEd Maste  *	This function is called periodically by the system to poll for status
752d30c739cSEd Maste  *	changes of the link.
753d30c739cSEd Maste  *
754d30c739cSEd Maste  *	LOCKING:
755d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
756d30c739cSEd Maste  */
757d30c739cSEd Maste static void
758d30c739cSEd Maste lan78xx_miibus_statchg(device_t dev)
759d30c739cSEd Maste {
760d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
761d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
762d30c739cSEd Maste 	struct ifnet *ifp;
763d30c739cSEd Maste 	int locked;
764d30c739cSEd Maste 	int err;
765d30c739cSEd Maste 	uint32_t flow = 0;
766d30c739cSEd Maste 	uint32_t fct_flow = 0;
767d30c739cSEd Maste 
768d30c739cSEd Maste 	locked = mtx_owned(&sc->sc_mtx);
769d30c739cSEd Maste 	if (!locked)
770d30c739cSEd Maste 		MUGE_LOCK(sc);
771d30c739cSEd Maste 
772d30c739cSEd Maste 	ifp = uether_getifp(&sc->sc_ue);
773d30c739cSEd Maste 	if (mii == NULL || ifp == NULL ||
774d30c739cSEd Maste 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
775d30c739cSEd Maste 		goto done;
776d30c739cSEd Maste 
777d30c739cSEd Maste 	/* Use the MII status to determine link status */
778d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
779d30c739cSEd Maste 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
780d30c739cSEd Maste 	    (IFM_ACTIVE | IFM_AVALID)) {
781d30c739cSEd Maste 		muge_dbg_printf(sc, "media is active\n");
782d30c739cSEd Maste 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
783d30c739cSEd Maste 		case IFM_10_T:
784d30c739cSEd Maste 		case IFM_100_TX:
785d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
786d30c739cSEd Maste 			muge_dbg_printf(sc, "10/100 ethernet\n");
787d30c739cSEd Maste 			break;
788d30c739cSEd Maste 		case IFM_1000_T:
789d30c739cSEd Maste 			sc->sc_flags |= MUGE_FLAG_LINK;
790d30c739cSEd Maste 			muge_dbg_printf(sc, "Gigabit ethernet\n");
791d30c739cSEd Maste 			break;
792d30c739cSEd Maste 		default:
793d30c739cSEd Maste 			break;
794d30c739cSEd Maste 		}
795d30c739cSEd Maste 	}
796d30c739cSEd Maste 	/* Lost link, do nothing. */
797d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
798d30c739cSEd Maste 		muge_dbg_printf(sc, "link flag not set\n");
799d30c739cSEd Maste 		goto done;
800d30c739cSEd Maste 	}
801d30c739cSEd Maste 
80248bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow);
803d30c739cSEd Maste 	if (err) {
804d30c739cSEd Maste 		muge_warn_printf(sc,
805d30c739cSEd Maste 		   "failed to read initial flow control thresholds, error %d\n",
806d30c739cSEd Maste 		    err);
807d30c739cSEd Maste 		goto done;
808d30c739cSEd Maste 	}
809d30c739cSEd Maste 
810e5151258SEd Maste 	/* Enable/disable full duplex operation and TX/RX pause. */
811d30c739cSEd Maste 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
812d30c739cSEd Maste 		muge_dbg_printf(sc, "full duplex operation\n");
813d30c739cSEd Maste 
814e5151258SEd Maste 		/* Enable transmit MAC flow control function. */
815d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
81648bc1758SEd Maste 			flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF;
817d30c739cSEd Maste 
818d30c739cSEd Maste 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
81948bc1758SEd Maste 			flow |= ETH_FLOW_CR_RX_FCEN_;
820d30c739cSEd Maste 	}
821d30c739cSEd Maste 
822e5151258SEd Maste 	/* XXX Flow control settings obtained from Microchip's driver. */
823d30c739cSEd Maste 	switch(usbd_get_speed(sc->sc_ue.ue_udev)) {
824d30c739cSEd Maste 	case USB_SPEED_SUPER:
825e5151258SEd Maste 		fct_flow = 0x817;
826d30c739cSEd Maste 		break;
827d30c739cSEd Maste 	case USB_SPEED_HIGH:
828e5151258SEd Maste 		fct_flow = 0x211;
829d30c739cSEd Maste 		break;
830d30c739cSEd Maste 	default:
831d30c739cSEd Maste 		break;
832d30c739cSEd Maste 	}
833d30c739cSEd Maste 
83448bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FLOW, flow);
83548bc1758SEd Maste 	err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow);
836d30c739cSEd Maste 	if (err)
837d30c739cSEd Maste 		muge_warn_printf(sc, "media change failed, error %d\n", err);
838d30c739cSEd Maste 
839d30c739cSEd Maste done:
840d30c739cSEd Maste 	if (!locked)
841d30c739cSEd Maste 		MUGE_UNLOCK(sc);
842d30c739cSEd Maste }
843d30c739cSEd Maste 
844d30c739cSEd Maste /*
845d30c739cSEd Maste  *	lan78xx_set_mdix_auto - Configure the device to enable automatic
846d30c739cSEd Maste  *	crossover and polarity detection.  LAN7800 provides HP Auto-MDIX
847d30c739cSEd Maste  *	functionality for seamless crossover and polarity detection.
848d30c739cSEd Maste  *
849d30c739cSEd Maste  *	@sc: driver soft context
850d30c739cSEd Maste  *
851d30c739cSEd Maste  *	LOCKING:
852d30c739cSEd Maste  *	Takes and releases the device mutex lock if not already held.
853d30c739cSEd Maste  */
854d30c739cSEd Maste static void
855d30c739cSEd Maste lan78xx_set_mdix_auto(struct muge_softc *sc)
856d30c739cSEd Maste {
857d30c739cSEd Maste 	uint32_t buf, err;
858d30c739cSEd Maste 
859d30c739cSEd Maste 	err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
860d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1);
861d30c739cSEd Maste 
862d30c739cSEd Maste 	buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
863d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL);
864d30c739cSEd Maste 	buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_;
865d30c739cSEd Maste 	buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_;
866d30c739cSEd Maste 
867d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
868d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
869d30c739cSEd Maste 	    MUGE_EXT_MODE_CTRL, buf);
870d30c739cSEd Maste 
871d30c739cSEd Maste 	err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
872d30c739cSEd Maste 	    MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0);
873d30c739cSEd Maste 
874d30c739cSEd Maste 	if (err != 0)
875d30c739cSEd Maste 		muge_warn_printf(sc, "error setting PHY's MDIX status\n");
876d30c739cSEd Maste 
877d30c739cSEd Maste 	sc->sc_mdix_ctl = buf;
878d30c739cSEd Maste }
879d30c739cSEd Maste 
880d30c739cSEd Maste /**
881d30c739cSEd Maste  *	lan78xx_phy_init - Initialises the in-built MUGE phy
882d30c739cSEd Maste  *	@sc: driver soft context
883d30c739cSEd Maste  *
884d30c739cSEd Maste  *	Resets the PHY part of the chip and then initialises it to default
885d30c739cSEd Maste  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
886d30c739cSEd Maste  *	from the PHY are also enabled, however we don't monitor the interrupt
887d30c739cSEd Maste  *	endpoints for the moment.
888d30c739cSEd Maste  *
889d30c739cSEd Maste  *	RETURNS:
890d30c739cSEd Maste  *	Returns 0 on success or EIO if failed to reset the PHY.
891d30c739cSEd Maste  */
892d30c739cSEd Maste static int
893d30c739cSEd Maste lan78xx_phy_init(struct muge_softc *sc)
894d30c739cSEd Maste {
895d30c739cSEd Maste 	muge_dbg_printf(sc, "Initializing PHY.\n");
89603dec173SEd Maste 	uint16_t bmcr, lmsr;
897d30c739cSEd Maste 	usb_ticks_t start_ticks;
89860ce15edSEd Maste 	uint32_t hw_reg;
899d30c739cSEd Maste 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
900d30c739cSEd Maste 
901d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
902d30c739cSEd Maste 
903e5151258SEd Maste 	/* Reset phy and wait for reset to complete. */
904d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,
905d30c739cSEd Maste 	    BMCR_RESET);
906d30c739cSEd Maste 
907d30c739cSEd Maste 	start_ticks = ticks;
908d30c739cSEd Maste 	do {
909d30c739cSEd Maste 		uether_pause(&sc->sc_ue, hz / 100);
910d30c739cSEd Maste 		bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
911d30c739cSEd Maste 		    MII_BMCR);
912d30c739cSEd Maste 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
913d30c739cSEd Maste 
914d30c739cSEd Maste 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
915d30c739cSEd Maste 		muge_err_printf(sc, "PHY reset timed-out\n");
916d30c739cSEd Maste 		return (EIO);
917d30c739cSEd Maste 	}
918d30c739cSEd Maste 
919d30c739cSEd Maste 	/* Setup phy to interrupt upon link down or autoneg completion. */
920d30c739cSEd Maste 	lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
921d30c739cSEd Maste 	    MUGE_PHY_INTR_STAT);
922d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
923d30c739cSEd Maste 	    MUGE_PHY_INTR_MASK,
924d30c739cSEd Maste 	    (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE));
925d30c739cSEd Maste 
926d30c739cSEd Maste 	/* Enable Auto-MDIX for crossover and polarity detection. */
927d30c739cSEd Maste 	lan78xx_set_mdix_auto(sc);
928d30c739cSEd Maste 
929d30c739cSEd Maste 	/* Enable all modes. */
930d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
931d30c739cSEd Maste 	    ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |
932d30c739cSEd Maste 	    ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM);
933d30c739cSEd Maste 
934e5151258SEd Maste 	/* Restart auto-negotation. */
935d30c739cSEd Maste 	bmcr |= BMCR_STARTNEG;
936d30c739cSEd Maste 	bmcr |= BMCR_AUTOEN;
937d30c739cSEd Maste 	lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
938d30c739cSEd Maste 	bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
93960ce15edSEd Maste 
94003dec173SEd Maste 	/* Configure LED Modes. */
94103dec173SEd Maste 	if (sc->sc_led_modes_mask != 0xffff) {
94203dec173SEd Maste 		lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno,
94303dec173SEd Maste 		    MUGE_PHY_LED_MODE);
94403dec173SEd Maste 		lmsr &= sc->sc_led_modes_mask;
94503dec173SEd Maste 		lmsr |= sc->sc_led_modes;
94603dec173SEd Maste 		lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno,
94703dec173SEd Maste 		    MUGE_PHY_LED_MODE, lmsr);
94803dec173SEd Maste 	}
94903dec173SEd Maste 
95060ce15edSEd Maste 	/* Enable appropriate LEDs. */
95160ce15edSEd Maste 	if (sc->sc_leds != 0 &&
95260ce15edSEd Maste 	    lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) {
95360ce15edSEd Maste 		hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ |
95460ce15edSEd Maste 			    ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ );
95560ce15edSEd Maste 		hw_reg |= sc->sc_leds;
95660ce15edSEd Maste 		lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg);
95760ce15edSEd Maste 	}
958d30c739cSEd Maste 	return (0);
959d30c739cSEd Maste }
960d30c739cSEd Maste 
961d30c739cSEd Maste /**
962d30c739cSEd Maste  *	lan78xx_chip_init - Initialises the chip after power on
963d30c739cSEd Maste  *	@sc: driver soft context
964d30c739cSEd Maste  *
965d30c739cSEd Maste  *	This initialisation sequence is modelled on the procedure in the Linux
966d30c739cSEd Maste  *	driver.
967d30c739cSEd Maste  *
968d30c739cSEd Maste  *	RETURNS:
969d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
970d30c739cSEd Maste  */
971d30c739cSEd Maste static int
972d30c739cSEd Maste lan78xx_chip_init(struct muge_softc *sc)
973d30c739cSEd Maste {
974d30c739cSEd Maste 	int err;
975d30c739cSEd Maste 	uint32_t buf;
976d30c739cSEd Maste 	uint32_t burst_cap;
977d30c739cSEd Maste 
978097f721bSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
979d30c739cSEd Maste 
980e5151258SEd Maste 	/* Enter H/W config mode. */
98148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_);
982d30c739cSEd Maste 
98348bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) !=
98448bc1758SEd Maste 	    0) {
985d30c739cSEd Maste 		muge_warn_printf(sc,
986d30c739cSEd Maste 		    "timed-out waiting for lite reset to complete\n");
987d30c739cSEd Maste 		goto init_failed;
988d30c739cSEd Maste 	}
989d30c739cSEd Maste 
990e5151258SEd Maste 	/* Set the mac address. */
991d30c739cSEd Maste 	if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
992d30c739cSEd Maste 		muge_warn_printf(sc, "failed to set the MAC address\n");
993d30c739cSEd Maste 		goto init_failed;
994d30c739cSEd Maste 	}
995d30c739cSEd Maste 
996e5151258SEd Maste 	/* Read and display the revision register. */
99703ba5353SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) {
99848bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n",
99948bc1758SEd Maste 		    err);
1000d30c739cSEd Maste 		goto init_failed;
1001d30c739cSEd Maste 	}
100203ba5353SEd Maste 	sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16;
100303ba5353SEd Maste 	sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_;
10042d14fb8bSEd Maste 	switch (sc->chipid) {
10052d14fb8bSEd Maste 	case ETH_ID_REV_CHIP_ID_7800_:
10062d14fb8bSEd Maste 	case ETH_ID_REV_CHIP_ID_7850_:
10072d14fb8bSEd Maste 		break;
10082d14fb8bSEd Maste 	default:
100903ba5353SEd Maste 		muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n",
101003ba5353SEd Maste 		    sc->chipid);
101103ba5353SEd Maste 		goto init_failed;
101203ba5353SEd Maste 	}
101303ba5353SEd Maste 	device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid,
101403ba5353SEd Maste 	    sc->chiprev);
1015d30c739cSEd Maste 
1016d30c739cSEd Maste 	/* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */
101748bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) {
101848bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err);
1019d30c739cSEd Maste 		goto init_failed;
1020d30c739cSEd Maste 	}
102148bc1758SEd Maste 	buf |= ETH_USB_CFG_BIR_;
102248bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1023d30c739cSEd Maste 
1024d30c739cSEd Maste 	/*
1025e5151258SEd Maste 	 * XXX LTM support will go here.
1026d30c739cSEd Maste 	 */
1027d30c739cSEd Maste 
1028d30c739cSEd Maste 	/* Configuring the burst cap. */
1029d30c739cSEd Maste 	switch (usbd_get_speed(sc->sc_ue.ue_udev)) {
1030d30c739cSEd Maste 	case USB_SPEED_SUPER:
1031d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE;
1032d30c739cSEd Maste 		break;
1033d30c739cSEd Maste 	case USB_SPEED_HIGH:
1034d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE;
1035d30c739cSEd Maste 		break;
1036d30c739cSEd Maste 	default:
1037d30c739cSEd Maste 		burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE;
1038d30c739cSEd Maste 	}
1039d30c739cSEd Maste 
104048bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap);
1041d30c739cSEd Maste 
1042e5151258SEd Maste 	/* Set the default bulk in delay (same value from Linux driver). */
104348bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY);
1044d30c739cSEd Maste 
1045e5151258SEd Maste 	/* Multiple ethernet frames per USB packets. */
104648bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf);
104748bc1758SEd Maste 	buf |= ETH_HW_CFG_MEF_;
104848bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_HW_CFG, buf);
1049d30c739cSEd Maste 
1050d30c739cSEd Maste 	/* Enable burst cap. */
105148bc1758SEd Maste 	if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) {
105248bc1758SEd Maste 		muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n",
1053d30c739cSEd Maste 		    err);
1054d30c739cSEd Maste 		goto init_failed;
1055d30c739cSEd Maste 	}
105648bc1758SEd Maste 	buf |= ETH_USB_CFG_BCE_;
105748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf);
1058d30c739cSEd Maste 
1059d30c739cSEd Maste 	/*
1060d30c739cSEd Maste 	 * Set FCL's RX and TX FIFO sizes: according to data sheet this is
1061d30c739cSEd Maste 	 * already the default value. But we initialize it to the same value
1062d30c739cSEd Maste 	 * anyways, as that's what the Linux driver does.
1063d30c739cSEd Maste 	 *
1064d30c739cSEd Maste 	 */
1065d30c739cSEd Maste 	buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512;
106648bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf);
1067d30c739cSEd Maste 
1068d30c739cSEd Maste 	buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512;
106948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf);
1070d30c739cSEd Maste 
1071d30c739cSEd Maste 	/* Enabling interrupts. (Not using them for now) */
107248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_);
1073d30c739cSEd Maste 
1074d30c739cSEd Maste 	/*
1075d30c739cSEd Maste 	 * Initializing flow control registers to 0.  These registers are
1076d30c739cSEd Maste 	 * properly set is handled in link-reset function in the Linux driver.
1077d30c739cSEd Maste 	 */
107848bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FLOW, 0);
107948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0);
1080d30c739cSEd Maste 
1081d30c739cSEd Maste 	/*
1082d30c739cSEd Maste 	 * Settings for the RFE, we enable broadcast and destination address
1083d30c739cSEd Maste 	 * perfect filtering.
1084d30c739cSEd Maste 	 */
108548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf);
108648bc1758SEd Maste 	buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_;
108748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf);
1088d30c739cSEd Maste 
1089d30c739cSEd Maste 	/*
1090d30c739cSEd Maste 	 * At this point the Linux driver writes multicast tables, and enables
1091d30c739cSEd Maste 	 * checksum engines. But in FreeBSD that gets done in muge_init,
1092d30c739cSEd Maste 	 * which gets called when the interface is brought up.
1093d30c739cSEd Maste 	 */
1094d30c739cSEd Maste 
1095d30c739cSEd Maste 	/* Reset the PHY. */
109648bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_);
109748bc1758SEd Maste 	if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL,
109848bc1758SEd Maste 	    ETH_PMT_CTL_PHY_RST_)) != 0) {
1099d30c739cSEd Maste 		muge_warn_printf(sc,
1100d30c739cSEd Maste 		    "timed-out waiting for phy reset to complete\n");
1101d30c739cSEd Maste 		goto init_failed;
1102d30c739cSEd Maste 	}
1103d30c739cSEd Maste 
110448bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf);
11052d14fb8bSEd Maste 	if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ &&
11062d14fb8bSEd Maste 	    !lan78xx_eeprom_present(sc)) {
11072d14fb8bSEd Maste 		/* Set automatic duplex and speed on LAN7800 without EEPROM. */
110848bc1758SEd Maste 		buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_;
11092d14fb8bSEd Maste 	}
111048bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_CR, buf);
1111d30c739cSEd Maste 
1112d30c739cSEd Maste 	/*
1113d30c739cSEd Maste 	 * Enable PHY interrupts (Not really getting used for now)
111448bc1758SEd Maste 	 * ETH_INT_EP_CTL: interrupt endpoint control register
1115d30c739cSEd Maste 	 * phy events cause interrupts to be issued
1116d30c739cSEd Maste 	 */
111748bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf);
111848bc1758SEd Maste 	buf |= ETH_INT_ENP_PHY_INT;
111948bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf);
1120d30c739cSEd Maste 
1121d30c739cSEd Maste 	/*
1122d30c739cSEd Maste 	 * Enables mac's transmitter.  It will transmit frames from the buffer
1123d30c739cSEd Maste 	 * onto the cable.
1124d30c739cSEd Maste 	 */
112548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf);
112648bc1758SEd Maste 	buf |= ETH_MAC_TX_TXEN_;
112748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_TX, buf);
1128d30c739cSEd Maste 
1129e5151258SEd Maste 	/* FIFO is capable of transmitting frames to MAC. */
113048bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf);
113148bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
113248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf);
1133d30c739cSEd Maste 
1134d30c739cSEd Maste 	/*
1135d30c739cSEd Maste 	 * Set max frame length.  In linux this is dev->mtu (which by default
1136e5151258SEd Maste 	 * is 1500) + VLAN_ETH_HLEN = 1518.
1137d30c739cSEd Maste 	 */
1138d30c739cSEd Maste 	err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN);
1139d30c739cSEd Maste 
1140e5151258SEd Maste 	/* Initialise the PHY. */
1141d30c739cSEd Maste 	if ((err = lan78xx_phy_init(sc)) != 0)
1142d30c739cSEd Maste 		goto init_failed;
1143d30c739cSEd Maste 
1144e5151258SEd Maste 	/* Enable MAC RX. */
114548bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf);
114648bc1758SEd Maste 	buf |= ETH_MAC_RX_EN_;
114748bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_MAC_RX, buf);
1148d30c739cSEd Maste 
1149e5151258SEd Maste 	/* Enable FIFO controller RX. */
115048bc1758SEd Maste 	err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf);
115148bc1758SEd Maste 	buf |= ETH_FCT_TX_CTL_EN_;
115248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf);
1153d30c739cSEd Maste 
115449b2a5feSEd Maste 	sc->sc_flags |= MUGE_FLAG_INIT_DONE;
1155e5151258SEd Maste 	return (0);
1156d30c739cSEd Maste 
1157d30c739cSEd Maste init_failed:
1158d30c739cSEd Maste 	muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err);
1159d30c739cSEd Maste 	return (err);
1160d30c739cSEd Maste }
1161d30c739cSEd Maste 
1162d30c739cSEd Maste static void
1163d30c739cSEd Maste muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
1164d30c739cSEd Maste {
1165d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1166d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
1167d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1168d30c739cSEd Maste 	struct mbuf *m;
1169d30c739cSEd Maste 	struct usb_page_cache *pc;
1170d30c739cSEd Maste 	uint16_t pktlen;
1171d30c739cSEd Maste 	uint32_t rx_cmd_a, rx_cmd_b;
1172d30c739cSEd Maste 	uint16_t rx_cmd_c;
1173d30c739cSEd Maste 	int off;
1174d30c739cSEd Maste 	int actlen;
1175d30c739cSEd Maste 
1176d30c739cSEd Maste 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
1177d30c739cSEd Maste 	muge_dbg_printf(sc, "rx : actlen %d\n", actlen);
1178d30c739cSEd Maste 
1179d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1180d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1181d30c739cSEd Maste 
1182d30c739cSEd Maste 		/*
1183d30c739cSEd Maste 		 * There is always a zero length frame after bringing the
1184d30c739cSEd Maste 		 * interface up.
1185d30c739cSEd Maste 		 */
1186d30c739cSEd Maste 		if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN))
1187d30c739cSEd Maste 			goto tr_setup;
1188d30c739cSEd Maste 
1189d30c739cSEd Maste 		/*
1190d30c739cSEd Maste 		 * There may be multiple packets in the USB frame.  Each will
1191d30c739cSEd Maste 		 * have a header and each needs to have its own mbuf allocated
1192d30c739cSEd Maste 		 * and populated for it.
1193d30c739cSEd Maste 		 */
1194d30c739cSEd Maste 		pc = usbd_xfer_get_frame(xfer, 0);
1195d30c739cSEd Maste 		off = 0;
1196d30c739cSEd Maste 
1197d30c739cSEd Maste 		while (off < actlen) {
1198d30c739cSEd Maste 
1199d30c739cSEd Maste 			/* The frame header is aligned on a 4 byte boundary. */
1200d30c739cSEd Maste 			off = ((off + 0x3) & ~0x3);
1201d30c739cSEd Maste 
1202d30c739cSEd Maste 			/* Extract RX CMD A. */
1203d30c739cSEd Maste 			if (off + sizeof(rx_cmd_a) > actlen)
1204d30c739cSEd Maste 				goto tr_setup;
1205d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a));
1206d30c739cSEd Maste 			off += (sizeof(rx_cmd_a));
1207d30c739cSEd Maste 			rx_cmd_a = le32toh(rx_cmd_a);
1208d30c739cSEd Maste 
1209d30c739cSEd Maste 
1210d30c739cSEd Maste 			/* Extract RX CMD B. */
1211d30c739cSEd Maste 			if (off + sizeof(rx_cmd_b) > actlen)
1212d30c739cSEd Maste 				goto tr_setup;
1213d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b));
1214d30c739cSEd Maste 			off += (sizeof(rx_cmd_b));
1215d30c739cSEd Maste 			rx_cmd_b = le32toh(rx_cmd_b);
1216d30c739cSEd Maste 
1217d30c739cSEd Maste 
1218d30c739cSEd Maste 			/* Extract RX CMD C. */
1219d30c739cSEd Maste 			if (off + sizeof(rx_cmd_c) > actlen)
1220d30c739cSEd Maste 				goto tr_setup;
1221d30c739cSEd Maste 			usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c));
1222d30c739cSEd Maste 			off += (sizeof(rx_cmd_c));
1223a99020fbSKevin Lo 			rx_cmd_c = le16toh(rx_cmd_c);
1224d30c739cSEd Maste 
1225d30c739cSEd Maste 			if (off > actlen)
1226d30c739cSEd Maste 				goto tr_setup;
1227d30c739cSEd Maste 
1228d30c739cSEd Maste 			pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
1229d30c739cSEd Maste 
1230d30c739cSEd Maste 			muge_dbg_printf(sc,
1231d30c739cSEd Maste 			    "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x "
1232d30c739cSEd Maste 			    " pktlen %d actlen %d off %d\n",
1233d30c739cSEd Maste 			    rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off);
1234d30c739cSEd Maste 
1235d30c739cSEd Maste 			if (rx_cmd_a & RX_CMD_A_RED_) {
1236d30c739cSEd Maste 				muge_dbg_printf(sc,
1237d30c739cSEd Maste 				     "rx error (hdr 0x%08x)\n", rx_cmd_a);
1238d30c739cSEd Maste 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1239d30c739cSEd Maste 			} else {
1240d30c739cSEd Maste 				/* Ethernet frame too big or too small? */
1241d30c739cSEd Maste 				if ((pktlen < ETHER_HDR_LEN) ||
1242d30c739cSEd Maste 				    (pktlen > (actlen - off)))
1243d30c739cSEd Maste 					goto tr_setup;
1244d30c739cSEd Maste 
1245e5151258SEd Maste 				/* Create a new mbuf to store the packet. */
1246d30c739cSEd Maste 				m = uether_newbuf();
1247d30c739cSEd Maste 				if (m == NULL) {
1248d30c739cSEd Maste 					muge_warn_printf(sc,
1249d30c739cSEd Maste 					    "failed to create new mbuf\n");
1250d30c739cSEd Maste 					if_inc_counter(ifp, IFCOUNTER_IQDROPS,
1251d30c739cSEd Maste 					    1);
1252d30c739cSEd Maste 					goto tr_setup;
1253d30c739cSEd Maste 				}
1254d30c739cSEd Maste 
1255d30c739cSEd Maste 				usbd_copy_out(pc, off, mtod(m, uint8_t *),
1256d30c739cSEd Maste 				    pktlen);
1257d30c739cSEd Maste 
1258d30c739cSEd Maste 				/*
1259d30c739cSEd Maste 				 * Check if RX checksums are computed, and
1260d30c739cSEd Maste 				 * offload them
1261d30c739cSEd Maste 				 */
1262d30c739cSEd Maste 				if ((ifp->if_capabilities & IFCAP_RXCSUM) &&
1263d30c739cSEd Maste 				    !(rx_cmd_a & RX_CMD_A_ICSM_)) {
1264d30c739cSEd Maste 					struct ether_header *eh;
1265d30c739cSEd Maste 					eh = mtod(m, struct ether_header *);
1266d30c739cSEd Maste 					/*
1267d30c739cSEd Maste 					 * Remove the extra 2 bytes of the csum
1268d30c739cSEd Maste 					 *
1269d30c739cSEd Maste 					 * The checksum appears to be
1270d30c739cSEd Maste 					 * simplistically calculated over the
1271d30c739cSEd Maste 					 * protocol headers up to the end of the
1272d30c739cSEd Maste 					 * eth frame.  Which means if the eth
1273d30c739cSEd Maste 					 * frame is padded the csum calculation
1274d30c739cSEd Maste 					 * is incorrectly performed over the
1275d30c739cSEd Maste 					 * padding bytes as well.  Therefore to
1276d30c739cSEd Maste 					 * be safe we ignore the H/W csum on
1277d30c739cSEd Maste 					 * frames less than or equal to
1278d30c739cSEd Maste 					 * 64 bytes.
1279d30c739cSEd Maste 					 *
1280d30c739cSEd Maste 					 * Protocols checksummed:
1281d30c739cSEd Maste 					 * TCP, UDP, ICMP, IGMP, IP
1282d30c739cSEd Maste 					 */
1283d30c739cSEd Maste 					if (pktlen > ETHER_MIN_LEN) {
1284d30c739cSEd Maste 						m->m_pkthdr.csum_flags |=
1285d30c739cSEd Maste 						    CSUM_DATA_VALID;
1286d30c739cSEd Maste 
1287d30c739cSEd Maste 						/*
1288d30c739cSEd Maste 						 * Copy the checksum from the
1289d30c739cSEd Maste 						 * last 2 bytes of the transfer
1290d30c739cSEd Maste 						 * and put in the csum_data
1291d30c739cSEd Maste 						 * field.
1292d30c739cSEd Maste 						 */
1293d30c739cSEd Maste 						usbd_copy_out(pc,
1294d30c739cSEd Maste 						    (off + pktlen),
1295d30c739cSEd Maste 						    &m->m_pkthdr.csum_data, 2);
1296d30c739cSEd Maste 
1297d30c739cSEd Maste 						/*
1298d30c739cSEd Maste 						 * The data is copied in network
1299d30c739cSEd Maste 						 * order, but the csum algorithm
1300d30c739cSEd Maste 						 * in the kernel expects it to
1301d30c739cSEd Maste 						 * be in host network order.
1302d30c739cSEd Maste 						 */
1303d30c739cSEd Maste 						m->m_pkthdr.csum_data =
1304d30c739cSEd Maste 						   ntohs(m->m_pkthdr.csum_data);
1305d30c739cSEd Maste 
1306d30c739cSEd Maste 						muge_dbg_printf(sc,
1307d30c739cSEd Maste 						    "RX checksum offloaded (0x%04x)\n",
1308d30c739cSEd Maste 						    m->m_pkthdr.csum_data);
1309d30c739cSEd Maste 					}
1310d30c739cSEd Maste 				}
1311d30c739cSEd Maste 
1312d30c739cSEd Maste 				/* Enqueue the mbuf on the receive queue. */
1313d30c739cSEd Maste 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1314d30c739cSEd Maste 					m_freem(m);
1315d30c739cSEd Maste 					goto tr_setup;
1316d30c739cSEd Maste 				}
1317d30c739cSEd Maste 				/* Remove 4 trailing bytes */
1318d30c739cSEd Maste 				uether_rxmbuf(ue, m, pktlen - 4);
1319d30c739cSEd Maste 			}
1320d30c739cSEd Maste 
1321d30c739cSEd Maste 			/*
1322d30c739cSEd Maste 			 * Update the offset to move to the next potential
1323d30c739cSEd Maste 			 * packet.
1324d30c739cSEd Maste 			 */
1325d30c739cSEd Maste 			off += pktlen;
1326d30c739cSEd Maste 		}
1327d30c739cSEd Maste 
1328d30c739cSEd Maste 		/* FALLTHROUGH */
1329d30c739cSEd Maste 	case USB_ST_SETUP:
1330d30c739cSEd Maste tr_setup:
1331d30c739cSEd Maste 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1332d30c739cSEd Maste 		usbd_transfer_submit(xfer);
1333d30c739cSEd Maste 		uether_rxflush(ue);
1334d30c739cSEd Maste 		return;
1335d30c739cSEd Maste 
1336d30c739cSEd Maste 	default:
1337d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1338d30c739cSEd Maste 			muge_warn_printf(sc, "bulk read error, %s\n",
1339d30c739cSEd Maste 			    usbd_errstr(error));
1340d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1341d30c739cSEd Maste 			goto tr_setup;
1342d30c739cSEd Maste 		}
1343d30c739cSEd Maste 		return;
1344d30c739cSEd Maste 	}
1345d30c739cSEd Maste }
1346d30c739cSEd Maste 
1347d30c739cSEd Maste /**
1348d30c739cSEd Maste  *	muge_bulk_write_callback - Write callback used to send ethernet frame(s)
1349d30c739cSEd Maste  *	@xfer: the USB transfer
1350d30c739cSEd Maste  *	@error: error code if the transfers is in an errored state
1351d30c739cSEd Maste  *
1352d30c739cSEd Maste  *	The main write function that pulls ethernet frames off the queue and
1353d30c739cSEd Maste  *	sends them out.
1354d30c739cSEd Maste  *
1355d30c739cSEd Maste  */
1356d30c739cSEd Maste static void
1357d30c739cSEd Maste muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1358d30c739cSEd Maste {
1359d30c739cSEd Maste 	struct muge_softc *sc = usbd_xfer_softc(xfer);
1360d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1361d30c739cSEd Maste 	struct usb_page_cache *pc;
1362d30c739cSEd Maste 	struct mbuf *m;
1363d30c739cSEd Maste 	int nframes;
1364d30c739cSEd Maste 	uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0;
1365d30c739cSEd Maste 
1366d30c739cSEd Maste 	switch (USB_GET_STATE(xfer)) {
1367d30c739cSEd Maste 	case USB_ST_TRANSFERRED:
1368d30c739cSEd Maste 		muge_dbg_printf(sc,
1369d30c739cSEd Maste 		    "USB TRANSFER status: USB_ST_TRANSFERRED\n");
1370d30c739cSEd Maste 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1371d30c739cSEd Maste 		/* FALLTHROUGH */
1372d30c739cSEd Maste 	case USB_ST_SETUP:
1373d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n");
1374d30c739cSEd Maste tr_setup:
1375d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 ||
1376d30c739cSEd Maste 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1377d30c739cSEd Maste 			muge_dbg_printf(sc,
1378d30c739cSEd Maste 			    "sc->sc_flags & MUGE_FLAG_LINK: %d\n",
1379d30c739cSEd Maste 			    (sc->sc_flags & MUGE_FLAG_LINK));
1380d30c739cSEd Maste 			muge_dbg_printf(sc,
1381d30c739cSEd Maste 			    "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n",
1382d30c739cSEd Maste 			    (ifp->if_drv_flags & IFF_DRV_OACTIVE));
1383d30c739cSEd Maste 			muge_dbg_printf(sc,
1384d30c739cSEd Maste 			    "USB TRANSFER not sending: no link or controller is busy \n");
1385d30c739cSEd Maste 			/*
1386d30c739cSEd Maste 			 * Don't send anything if there is no link or
1387d30c739cSEd Maste 			 * controller is busy.
1388d30c739cSEd Maste 			 */
1389d30c739cSEd Maste 			return;
1390d30c739cSEd Maste 		}
1391d30c739cSEd Maste 		for (nframes = 0; nframes < 16 &&
1392d30c739cSEd Maste 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1393d30c739cSEd Maste 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1394d30c739cSEd Maste 			if (m == NULL)
1395d30c739cSEd Maste 				break;
1396d30c739cSEd Maste 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1397d30c739cSEd Maste 				nframes);
1398d30c739cSEd Maste 			frm_len = 0;
1399d30c739cSEd Maste 			pc = usbd_xfer_get_frame(xfer, nframes);
1400d30c739cSEd Maste 
1401d30c739cSEd Maste 			/*
1402d30c739cSEd Maste 			 * Each frame is prefixed with two 32-bit values
1403d30c739cSEd Maste 			 * describing the length of the packet and buffer.
1404d30c739cSEd Maste 			 */
1405d30c739cSEd Maste 			tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) |
1406d30c739cSEd Maste 			     TX_CMD_A_FCS_;
1407d30c739cSEd Maste 			tx_cmd_a = htole32(tx_cmd_a);
1408d30c739cSEd Maste 			usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a));
1409d30c739cSEd Maste 
1410d30c739cSEd Maste 			tx_cmd_b = 0;
1411d30c739cSEd Maste 
1412d30c739cSEd Maste 			/* TCP LSO Support will probably be implemented here. */
1413d30c739cSEd Maste 			tx_cmd_b = htole32(tx_cmd_b);
1414d30c739cSEd Maste 			usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b));
1415d30c739cSEd Maste 
1416d30c739cSEd Maste 			frm_len += 8;
1417d30c739cSEd Maste 
1418d30c739cSEd Maste 			/* Next copy in the actual packet */
1419d30c739cSEd Maste 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1420d30c739cSEd Maste 			frm_len += m->m_pkthdr.len;
1421d30c739cSEd Maste 
1422d30c739cSEd Maste 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1423d30c739cSEd Maste 
1424d30c739cSEd Maste 			/*
1425d30c739cSEd Maste 			 * If there's a BPF listener, bounce a copy of this
1426d30c739cSEd Maste 			 * frame to it.
1427d30c739cSEd Maste 			 */
1428d30c739cSEd Maste 			BPF_MTAP(ifp, m);
1429d30c739cSEd Maste 			m_freem(m);
1430d30c739cSEd Maste 
1431d30c739cSEd Maste 			/* Set frame length. */
1432d30c739cSEd Maste 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1433d30c739cSEd Maste 		}
1434d30c739cSEd Maste 
1435d30c739cSEd Maste 		muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes);
1436d30c739cSEd Maste 		if (nframes != 0) {
1437d30c739cSEd Maste 			muge_dbg_printf(sc, "USB TRANSFER submit attempt\n");
1438d30c739cSEd Maste 			usbd_xfer_set_frames(xfer, nframes);
1439d30c739cSEd Maste 			usbd_transfer_submit(xfer);
1440d30c739cSEd Maste 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1441d30c739cSEd Maste 		}
1442d30c739cSEd Maste 		return;
1443d30c739cSEd Maste 
1444d30c739cSEd Maste 	default:
1445d30c739cSEd Maste 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1446d30c739cSEd Maste 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1447d30c739cSEd Maste 
1448d30c739cSEd Maste 		if (error != USB_ERR_CANCELLED) {
1449d30c739cSEd Maste 			muge_err_printf(sc,
1450d30c739cSEd Maste 			    "usb error on tx: %s\n", usbd_errstr(error));
1451d30c739cSEd Maste 			usbd_xfer_set_stall(xfer);
1452d30c739cSEd Maste 			goto tr_setup;
1453d30c739cSEd Maste 		}
1454d30c739cSEd Maste 		return;
1455d30c739cSEd Maste 	}
1456d30c739cSEd Maste }
1457d30c739cSEd Maste 
1458b4872d67SOleksandr Tymoshenko /**
1459b4872d67SOleksandr Tymoshenko  *	muge_set_mac_addr - Initiailizes NIC MAC address
1460d30c739cSEd Maste  *	@ue: the USB ethernet device
1461d30c739cSEd Maste  *
1462b4872d67SOleksandr Tymoshenko  *	Tries to obtain MAC address from number of sources: registers,
1463b4872d67SOleksandr Tymoshenko  *	EEPROM, DTB blob. If all sources fail - generates random MAC.
1464d30c739cSEd Maste  */
1465d30c739cSEd Maste static void
1466b4872d67SOleksandr Tymoshenko muge_set_mac_addr(struct usb_ether *ue)
1467d30c739cSEd Maste {
1468d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1469d30c739cSEd Maste 	uint32_t mac_h, mac_l;
1470d30c739cSEd Maste 
1471*d736b527SIan Lepore 	memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN);
1472d30c739cSEd Maste 
1473d30c739cSEd Maste 	uint32_t val;
1474d30c739cSEd Maste 	lan78xx_read_reg(sc, 0, &val);
1475d30c739cSEd Maste 
1476e5151258SEd Maste 	/* Read current MAC address from RX_ADDRx registers. */
147748bc1758SEd Maste 	if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) &&
147848bc1758SEd Maste 	    (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) {
1479*d736b527SIan Lepore 		ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1480*d736b527SIan Lepore 		ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1481*d736b527SIan Lepore 		ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1482*d736b527SIan Lepore 		ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1483*d736b527SIan Lepore 		ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1484*d736b527SIan Lepore 		ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1485d30c739cSEd Maste 	}
1486d30c739cSEd Maste 
1487e5151258SEd Maste 	/* If RX_ADDRx did not provide a valid MAC address, try EEPROM. */
1488*d736b527SIan Lepore 	if (ETHER_IS_VALID(ue->ue_eaddr)) {
1489b4872d67SOleksandr Tymoshenko 		muge_dbg_printf(sc, "MAC assigned from registers\n");
1490b4872d67SOleksandr Tymoshenko 		return;
1491b4872d67SOleksandr Tymoshenko 	}
1492b4872d67SOleksandr Tymoshenko 
14932c8cf0c5SEd Maste 	if ((lan78xx_eeprom_present(sc) &&
14942c8cf0c5SEd Maste 	    lan78xx_eeprom_read_raw(sc, ETH_E2P_MAC_OFFSET,
1495*d736b527SIan Lepore 	    ue->ue_eaddr, ETHER_ADDR_LEN) == 0) ||
1496d30c739cSEd Maste 	    (lan78xx_otp_read(sc, OTP_MAC_OFFSET,
1497*d736b527SIan Lepore 	    ue->ue_eaddr, ETHER_ADDR_LEN) == 0)) {
1498*d736b527SIan Lepore 		if (ETHER_IS_VALID(ue->ue_eaddr)) {
1499d30c739cSEd Maste 			muge_dbg_printf(sc, "MAC read from EEPROM\n");
1500b4872d67SOleksandr Tymoshenko 			return;
1501d30c739cSEd Maste 		}
1502b4872d67SOleksandr Tymoshenko 	}
1503b4872d67SOleksandr Tymoshenko 
1504b4872d67SOleksandr Tymoshenko #ifdef FDT
150518dc4538SIan Lepore 	/* ue->ue_eaddr modified only if config exists for this dev instance. */
150618dc4538SIan Lepore 	usb_fdt_get_mac_addr(ue->ue_dev, ue);
1507*d736b527SIan Lepore 	if (ETHER_IS_VALID(ue->ue_eaddr)) {
150818dc4538SIan Lepore 		muge_dbg_printf(sc, "MAC read from FDT data\n");
1509b4872d67SOleksandr Tymoshenko 		return;
1510b4872d67SOleksandr Tymoshenko 	}
1511b4872d67SOleksandr Tymoshenko #endif
1512b4872d67SOleksandr Tymoshenko 
1513d30c739cSEd Maste 	muge_dbg_printf(sc, "MAC assigned randomly\n");
1514*d736b527SIan Lepore 	arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0);
1515*d736b527SIan Lepore 	ue->ue_eaddr[0] &= ~0x01;	/* unicast */
1516*d736b527SIan Lepore 	ue->ue_eaddr[0] |= 0x02;	/* locally administered */
1517d30c739cSEd Maste }
1518b4872d67SOleksandr Tymoshenko 
1519b4872d67SOleksandr Tymoshenko /**
152060ce15edSEd Maste  *	muge_set_leds - Initializes NIC LEDs pattern
152160ce15edSEd Maste  *	@ue: the USB ethernet device
152260ce15edSEd Maste  *
152360ce15edSEd Maste  *	Tries to store the LED modes.
152460ce15edSEd Maste  *	Supports only DTB blob like the	Linux driver does.
152560ce15edSEd Maste  */
152660ce15edSEd Maste static void
152760ce15edSEd Maste muge_set_leds(struct usb_ether *ue)
152860ce15edSEd Maste {
152960ce15edSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
153060ce15edSEd Maste #ifdef FDT
153118dc4538SIan Lepore 	phandle_t node;
1532*d736b527SIan Lepore 	pcell_t modes[4];	/* 4 LEDs are possible */
153303dec173SEd Maste 	ssize_t proplen;
153460ce15edSEd Maste 	uint32_t count;
153560ce15edSEd Maste #endif
153660ce15edSEd Maste 
153760ce15edSEd Maste 	sc->sc_leds = 0;	/* no LED mode is set */
153803dec173SEd Maste 	sc->sc_led_modes = 0;
153903dec173SEd Maste 	sc->sc_led_modes_mask = 0xffff;
154060ce15edSEd Maste 	if (lan78xx_eeprom_present(sc))
154160ce15edSEd Maste 		return;
154260ce15edSEd Maste #ifdef FDT
154318dc4538SIan Lepore 	if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 &&
1544*d736b527SIan Lepore 	    (proplen = OF_getencprop(node, "microchip,led-modes", modes,
1545*d736b527SIan Lepore 	    sizeof(modes))) > 0) {
154603dec173SEd Maste 		count = proplen / sizeof( uint32_t );
154760ce15edSEd Maste 		sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ |
154860ce15edSEd Maste 			      (count > 1) * ETH_HW_CFG_LED1_EN_ |
154960ce15edSEd Maste 			      (count > 2) * ETH_HW_CFG_LED2_EN_ |
155060ce15edSEd Maste 			      (count > 3) * ETH_HW_CFG_LED3_EN_;
155103dec173SEd Maste 		while (count-- > 0) {
1552*d736b527SIan Lepore 			sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count);
155303dec173SEd Maste 			sc->sc_led_modes_mask <<= 4;
155403dec173SEd Maste 		}
155518dc4538SIan Lepore 		muge_dbg_printf(sc, "LED modes set from FDT data\n");
155660ce15edSEd Maste 	}
155760ce15edSEd Maste #endif
155860ce15edSEd Maste }
155960ce15edSEd Maste 
156060ce15edSEd Maste /**
1561b4872d67SOleksandr Tymoshenko  *	muge_attach_post - Called after the driver attached to the USB interface
1562b4872d67SOleksandr Tymoshenko  *	@ue: the USB ethernet device
1563b4872d67SOleksandr Tymoshenko  *
1564b4872d67SOleksandr Tymoshenko  *	This is where the chip is intialised for the first time.  This is
1565b4872d67SOleksandr Tymoshenko  *	different from the muge_init() function in that that one is designed to
1566b4872d67SOleksandr Tymoshenko  *	setup the H/W to match the UE settings and can be called after a reset.
1567b4872d67SOleksandr Tymoshenko  *
1568b4872d67SOleksandr Tymoshenko  */
1569b4872d67SOleksandr Tymoshenko static void
1570b4872d67SOleksandr Tymoshenko muge_attach_post(struct usb_ether *ue)
1571b4872d67SOleksandr Tymoshenko {
1572b4872d67SOleksandr Tymoshenko 	struct muge_softc *sc = uether_getsc(ue);
1573b4872d67SOleksandr Tymoshenko 
1574b4872d67SOleksandr Tymoshenko 	muge_dbg_printf(sc, "Calling muge_attach_post.\n");
1575b4872d67SOleksandr Tymoshenko 
1576b4872d67SOleksandr Tymoshenko 	/* Setup some of the basics */
1577b4872d67SOleksandr Tymoshenko 	sc->sc_phyno = 1;
1578b4872d67SOleksandr Tymoshenko 
1579b4872d67SOleksandr Tymoshenko 	muge_set_mac_addr(ue);
158060ce15edSEd Maste 	muge_set_leds(ue);
1581d30c739cSEd Maste 
1582d30c739cSEd Maste 	/* Initialise the chip for the first time */
1583d30c739cSEd Maste 	lan78xx_chip_init(sc);
1584d30c739cSEd Maste }
1585d30c739cSEd Maste 
1586d30c739cSEd Maste /**
1587d30c739cSEd Maste  *	muge_attach_post_sub - Called after attach to the USB interface
1588d30c739cSEd Maste  *	@ue: the USB ethernet device
1589d30c739cSEd Maste  *
1590d30c739cSEd Maste  *	Most of this is boilerplate code and copied from the base USB ethernet
1591d30c739cSEd Maste  *	driver.  It has been overriden so that we can indicate to the system
1592d30c739cSEd Maste  *	that the chip supports H/W checksumming.
1593d30c739cSEd Maste  *
1594d30c739cSEd Maste  *	RETURNS:
1595d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1596d30c739cSEd Maste  */
1597d30c739cSEd Maste static int
1598d30c739cSEd Maste muge_attach_post_sub(struct usb_ether *ue)
1599d30c739cSEd Maste {
1600d30c739cSEd Maste 	struct muge_softc *sc;
1601d30c739cSEd Maste 	struct ifnet *ifp;
1602d30c739cSEd Maste 	int error;
1603d30c739cSEd Maste 
1604d30c739cSEd Maste 	sc = uether_getsc(ue);
1605d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n");
1606d30c739cSEd Maste 	ifp = ue->ue_ifp;
1607d30c739cSEd Maste 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1608d30c739cSEd Maste 	ifp->if_start = uether_start;
1609d30c739cSEd Maste 	ifp->if_ioctl = muge_ioctl;
1610d30c739cSEd Maste 	ifp->if_init = uether_init;
1611d30c739cSEd Maste 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1612d30c739cSEd Maste 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1613d30c739cSEd Maste 	IFQ_SET_READY(&ifp->if_snd);
1614d30c739cSEd Maste 
1615d30c739cSEd Maste 	/*
1616d30c739cSEd Maste 	 * The chip supports TCP/UDP checksum offloading on TX and RX paths,
1617d30c739cSEd Maste 	 * however currently only RX checksum is supported in the driver
1618d30c739cSEd Maste 	 * (see top of file).
1619d30c739cSEd Maste 	 */
1620d30c739cSEd Maste 	ifp->if_hwassist = 0;
1621d30c739cSEd Maste 	if (MUGE_DEFAULT_RX_CSUM_ENABLE)
1622d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_RXCSUM;
1623d30c739cSEd Maste 
1624d30c739cSEd Maste 	if (MUGE_DEFAULT_TX_CSUM_ENABLE)
1625d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_TXCSUM;
1626d30c739cSEd Maste 
1627d30c739cSEd Maste 	/*
1628d30c739cSEd Maste 	 * In the Linux driver they also enable scatter/gather (NETIF_F_SG)
1629d30c739cSEd Maste 	 * here, that's something related to socket buffers used in Linux.
1630d30c739cSEd Maste 	 * FreeBSD doesn't have that as an interface feature.
1631d30c739cSEd Maste 	 */
1632d30c739cSEd Maste 	if (MUGE_DEFAULT_TSO_CSUM_ENABLE)
1633d30c739cSEd Maste 		ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6;
1634d30c739cSEd Maste 
1635d30c739cSEd Maste #if 0
1636d30c739cSEd Maste 	/* TX checksuming is disabled since not yet implemented. */
1637d30c739cSEd Maste 	ifp->if_capabilities |= IFCAP_TXCSUM;
1638d30c739cSEd Maste 	ifp->if_capenable |= IFCAP_TXCSUM;
1639d30c739cSEd Maste 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1640d30c739cSEd Maste #endif
1641d30c739cSEd Maste 
1642d30c739cSEd Maste 	ifp->if_capenable = ifp->if_capabilities;
1643d30c739cSEd Maste 
1644d30c739cSEd Maste 	mtx_lock(&Giant);
1645d30c739cSEd Maste 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1646d30c739cSEd Maste 		uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1647d30c739cSEd Maste 		BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1648d30c739cSEd Maste 	mtx_unlock(&Giant);
1649d30c739cSEd Maste 
1650e5151258SEd Maste 	return (0);
1651d30c739cSEd Maste }
1652d30c739cSEd Maste 
1653d30c739cSEd Maste /**
1654d30c739cSEd Maste  *	muge_start - Starts communication with the LAN78xx chip
1655d30c739cSEd Maste  *	@ue: USB ether interface
1656d30c739cSEd Maste  */
1657d30c739cSEd Maste static void
1658d30c739cSEd Maste muge_start(struct usb_ether *ue)
1659d30c739cSEd Maste {
1660d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1661d30c739cSEd Maste 
1662d30c739cSEd Maste 	/*
1663d30c739cSEd Maste 	 * Start the USB transfers, if not already started.
1664d30c739cSEd Maste 	 */
1665d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]);
1666d30c739cSEd Maste 	usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]);
1667d30c739cSEd Maste }
1668d30c739cSEd Maste 
1669d30c739cSEd Maste /**
1670d30c739cSEd Maste  *	muge_ioctl - ioctl function for the device
1671d30c739cSEd Maste  *	@ifp: interface pointer
1672d30c739cSEd Maste  *	@cmd: the ioctl command
1673d30c739cSEd Maste  *	@data: data passed in the ioctl call, typically a pointer to struct
1674d30c739cSEd Maste  *	ifreq.
1675d30c739cSEd Maste  *
1676d30c739cSEd Maste  *	The ioctl routine is overridden to detect change requests for the H/W
1677d30c739cSEd Maste  *	checksum capabilities.
1678d30c739cSEd Maste  *
1679d30c739cSEd Maste  *	RETURNS:
1680d30c739cSEd Maste  *	0 on success and an error code on failure.
1681d30c739cSEd Maste  */
1682d30c739cSEd Maste static int
1683d30c739cSEd Maste muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1684d30c739cSEd Maste {
1685d30c739cSEd Maste 	struct usb_ether *ue = ifp->if_softc;
1686d30c739cSEd Maste 	struct muge_softc *sc;
1687d30c739cSEd Maste 	struct ifreq *ifr;
1688d30c739cSEd Maste 	int rc;
1689d30c739cSEd Maste 	int mask;
1690d30c739cSEd Maste 	int reinit;
1691d30c739cSEd Maste 
1692d30c739cSEd Maste 	if (cmd == SIOCSIFCAP) {
1693d30c739cSEd Maste 		sc = uether_getsc(ue);
1694d30c739cSEd Maste 		ifr = (struct ifreq *)data;
1695d30c739cSEd Maste 
1696d30c739cSEd Maste 		MUGE_LOCK(sc);
1697d30c739cSEd Maste 
1698d30c739cSEd Maste 		rc = 0;
1699d30c739cSEd Maste 		reinit = 0;
1700d30c739cSEd Maste 
1701d30c739cSEd Maste 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1702d30c739cSEd Maste 
1703e5151258SEd Maste 		/* Modify the RX CSUM enable bits. */
1704d30c739cSEd Maste 		if ((mask & IFCAP_RXCSUM) != 0 &&
1705d30c739cSEd Maste 			(ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1706d30c739cSEd Maste 			ifp->if_capenable ^= IFCAP_RXCSUM;
1707d30c739cSEd Maste 
1708d30c739cSEd Maste 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1709d30c739cSEd Maste 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1710d30c739cSEd Maste 				reinit = 1;
1711d30c739cSEd Maste 			}
1712d30c739cSEd Maste 		}
1713d30c739cSEd Maste 
1714d30c739cSEd Maste 		MUGE_UNLOCK(sc);
1715d30c739cSEd Maste 		if (reinit)
1716d30c739cSEd Maste 			uether_init(ue);
1717d30c739cSEd Maste 
1718d30c739cSEd Maste 	} else {
1719d30c739cSEd Maste 		rc = uether_ioctl(ifp, cmd, data);
1720d30c739cSEd Maste 	}
1721d30c739cSEd Maste 
1722d30c739cSEd Maste 	return (rc);
1723d30c739cSEd Maste }
1724d30c739cSEd Maste 
1725d30c739cSEd Maste /**
1726d30c739cSEd Maste  *	muge_reset - Reset the SMSC chip
1727d30c739cSEd Maste  *	@sc: device soft context
1728d30c739cSEd Maste  *
1729d30c739cSEd Maste  *	LOCKING:
1730d30c739cSEd Maste  *	Should be called with the SMSC lock held.
1731d30c739cSEd Maste  */
1732d30c739cSEd Maste static void
1733d30c739cSEd Maste muge_reset(struct muge_softc *sc)
1734d30c739cSEd Maste {
1735d30c739cSEd Maste 	struct usb_config_descriptor *cd;
1736d30c739cSEd Maste 	usb_error_t err;
1737d30c739cSEd Maste 
1738d30c739cSEd Maste 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
1739d30c739cSEd Maste 
1740d30c739cSEd Maste 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
1741d30c739cSEd Maste 	    cd->bConfigurationValue);
1742d30c739cSEd Maste 	if (err)
1743d30c739cSEd Maste 		muge_warn_printf(sc, "reset failed (ignored)\n");
1744d30c739cSEd Maste 
1745d30c739cSEd Maste 	/* Wait a little while for the chip to get its brains in order. */
1746d30c739cSEd Maste 	uether_pause(&sc->sc_ue, hz / 100);
1747d30c739cSEd Maste 
1748d30c739cSEd Maste 	/* Reinitialize controller to achieve full reset. */
1749d30c739cSEd Maste 	lan78xx_chip_init(sc);
1750d30c739cSEd Maste }
1751d30c739cSEd Maste 
1752d30c739cSEd Maste /**
1753d30c739cSEd Maste  * muge_set_addr_filter
1754d30c739cSEd Maste  *
1755d30c739cSEd Maste  *	@sc: device soft context
1756d30c739cSEd Maste  *	@index: index of the entry to the perfect address table
1757d30c739cSEd Maste  *	@addr: address to be written
1758d30c739cSEd Maste  *
1759d30c739cSEd Maste  */
1760d30c739cSEd Maste static void
1761d30c739cSEd Maste muge_set_addr_filter(struct muge_softc *sc, int index,
1762d30c739cSEd Maste     uint8_t addr[ETHER_ADDR_LEN])
1763d30c739cSEd Maste {
1764d30c739cSEd Maste 	uint32_t tmp;
1765d30c739cSEd Maste 
1766d30c739cSEd Maste 	if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) {
1767d30c739cSEd Maste 		tmp = addr[3];
1768d30c739cSEd Maste 		tmp |= addr[2] | (tmp << 8);
1769d30c739cSEd Maste 		tmp |= addr[1] | (tmp << 8);
1770d30c739cSEd Maste 		tmp |= addr[0] | (tmp << 8);
1771d30c739cSEd Maste 		sc->sc_pfilter_table[index][1] = tmp;
1772d30c739cSEd Maste 		tmp = addr[5];
1773d30c739cSEd Maste 		tmp |= addr[4] | (tmp << 8);
177448bc1758SEd Maste 		tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_;
1775d30c739cSEd Maste 		sc->sc_pfilter_table[index][0] = tmp;
1776d30c739cSEd Maste 	}
1777d30c739cSEd Maste }
1778d30c739cSEd Maste 
1779d30c739cSEd Maste /**
1780d30c739cSEd Maste  *	lan78xx_dataport_write - write to the selected RAM
1781d30c739cSEd Maste  *	@sc: The device soft context.
1782d30c739cSEd Maste  *	@ram_select: Select which RAM to access.
1783d30c739cSEd Maste  *	@addr: Starting address to write to.
1784d30c739cSEd Maste  *	@buf: word-sized buffer to write to RAM, starting at @addr.
1785d30c739cSEd Maste  *	@length: length of @buf
1786d30c739cSEd Maste  *
1787d30c739cSEd Maste  *
1788d30c739cSEd Maste  *	RETURNS:
1789d30c739cSEd Maste  *	0 if write successful.
1790d30c739cSEd Maste  */
1791d30c739cSEd Maste static int
1792d30c739cSEd Maste lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select,
1793d30c739cSEd Maste     uint32_t addr, uint32_t length, uint32_t *buf)
1794d30c739cSEd Maste {
1795d30c739cSEd Maste 	uint32_t dp_sel;
1796d30c739cSEd Maste 	int i, ret;
1797d30c739cSEd Maste 
1798d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
179948bc1758SEd Maste 	ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1800d30c739cSEd Maste 	if (ret < 0)
1801d30c739cSEd Maste 		goto done;
1802d30c739cSEd Maste 
180348bc1758SEd Maste 	ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel);
1804d30c739cSEd Maste 
180548bc1758SEd Maste 	dp_sel &= ~ETH_DP_SEL_RSEL_MASK_;
1806d30c739cSEd Maste 	dp_sel |= ram_select;
1807d30c739cSEd Maste 
180848bc1758SEd Maste 	ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel);
1809d30c739cSEd Maste 
1810d30c739cSEd Maste 	for (i = 0; i < length; i++) {
181148bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i);
181248bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]);
181348bc1758SEd Maste 		ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_);
181448bc1758SEd Maste 		ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_);
1815d30c739cSEd Maste 		if (ret != 0)
1816d30c739cSEd Maste 			goto done;
1817d30c739cSEd Maste 	}
1818d30c739cSEd Maste 
1819d30c739cSEd Maste done:
1820e5151258SEd Maste 	return (ret);
1821d30c739cSEd Maste }
1822d30c739cSEd Maste 
1823d30c739cSEd Maste /**
1824d30c739cSEd Maste  * muge_multicast_write
1825d30c739cSEd Maste  * @sc: device's soft context
1826d30c739cSEd Maste  *
1827d30c739cSEd Maste  * Writes perfect addres filters and hash address filters to their
1828d30c739cSEd Maste  * corresponding registers and RAMs.
1829d30c739cSEd Maste  *
1830d30c739cSEd Maste  */
1831d30c739cSEd Maste static void
1832d30c739cSEd Maste muge_multicast_write(struct muge_softc *sc)
1833d30c739cSEd Maste {
1834d30c739cSEd Maste 	int i, ret;
183548bc1758SEd Maste 	lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_,
183648bc1758SEd Maste 	    ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN,
183748bc1758SEd Maste 	    sc->sc_mchash_table);
1838d30c739cSEd Maste 
1839d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1840d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0);
1841d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_LO(i),
1842d30c739cSEd Maste 		    sc->sc_pfilter_table[i][1]);
1843d30c739cSEd Maste 		ret = lan78xx_write_reg(sc, PFILTER_HI(i),
1844d30c739cSEd Maste 		    sc->sc_pfilter_table[i][0]);
1845d30c739cSEd Maste 	}
1846d30c739cSEd Maste }
1847d30c739cSEd Maste 
1848d30c739cSEd Maste /**
1849d30c739cSEd Maste  *	muge_hash - Calculate the hash of a mac address
1850d30c739cSEd Maste  *	@addr: The mac address to calculate the hash on
1851d30c739cSEd Maste  *
1852d30c739cSEd Maste  *	This function is used when configuring a range of multicast mac
1853d30c739cSEd Maste  *	addresses to filter on.  The hash of the mac address is put in the
1854d30c739cSEd Maste  *	device's mac hash table.
1855d30c739cSEd Maste  *
1856d30c739cSEd Maste  *	RETURNS:
1857d30c739cSEd Maste  *	Returns a value from 0-63 value which is the hash of the mac address.
1858d30c739cSEd Maste  */
1859d30c739cSEd Maste static inline uint32_t
1860d30c739cSEd Maste muge_hash(uint8_t addr[ETHER_ADDR_LEN])
1861d30c739cSEd Maste {
1862a99020fbSKevin Lo 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff;
1863d30c739cSEd Maste }
1864d30c739cSEd Maste 
1865d30c739cSEd Maste /**
1866d30c739cSEd Maste  *	muge_setmulti - Setup multicast
1867d30c739cSEd Maste  *	@ue: usb ethernet device context
1868d30c739cSEd Maste  *
1869d30c739cSEd Maste  *	Tells the device to either accept frames with a multicast mac address,
1870d30c739cSEd Maste  *	a select group of m'cast mac addresses or just the devices mac address.
1871d30c739cSEd Maste  *
1872d30c739cSEd Maste  *	LOCKING:
1873d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1874d30c739cSEd Maste  */
1875d30c739cSEd Maste static void
1876d30c739cSEd Maste muge_setmulti(struct usb_ether *ue)
1877d30c739cSEd Maste {
1878d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1879d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1880d30c739cSEd Maste 	uint8_t i, *addr;
1881d30c739cSEd Maste 	struct ifmultiaddr *ifma;
1882d30c739cSEd Maste 
1883d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1884d30c739cSEd Maste 
188548bc1758SEd Maste 	sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ |
188648bc1758SEd Maste 		ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_);
1887d30c739cSEd Maste 
1888e5151258SEd Maste 	/* Initialize hash filter table. */
188948bc1758SEd Maste 	for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++)
1890d30c739cSEd Maste 		sc->sc_mchash_table[i] = 0;
1891d30c739cSEd Maste 
1892e5151258SEd Maste 	/* Initialize perfect filter table. */
1893d30c739cSEd Maste 	for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) {
1894d30c739cSEd Maste 		sc->sc_pfilter_table[i][0] =
1895d30c739cSEd Maste 		sc->sc_pfilter_table[i][1] = 0;
1896d30c739cSEd Maste 	}
1897d30c739cSEd Maste 
189848bc1758SEd Maste 	sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_;
1899d30c739cSEd Maste 
1900d30c739cSEd Maste 	if (ifp->if_flags & IFF_PROMISC) {
1901d30c739cSEd Maste 		muge_dbg_printf(sc, "promiscuous mode enabled\n");
190248bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1903d30c739cSEd Maste 	} else if (ifp->if_flags & IFF_ALLMULTI){
1904d30c739cSEd Maste 		muge_dbg_printf(sc, "receive all multicast enabled\n");
190548bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_;
1906d30c739cSEd Maste 	} else {
1907e5151258SEd Maste 		/* Lock the mac address list before hashing each of them. */
1908d30c739cSEd Maste 		if_maddr_rlock(ifp);
19090842ea9bSEd Maste 		if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) {
1910d30c739cSEd Maste 			i = 1;
19110842ea9bSEd Maste 			CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs,
19120842ea9bSEd Maste 			    ifma_link) {
1913e5151258SEd Maste 				/* First fill up the perfect address table. */
1914d30c739cSEd Maste 				addr = LLADDR((struct sockaddr_dl *)
1915d30c739cSEd Maste 				    ifma->ifma_addr);
1916d30c739cSEd Maste 				if (i < 33 /* XXX */) {
1917d30c739cSEd Maste 					muge_set_addr_filter(sc, i, addr);
1918d30c739cSEd Maste 				} else {
1919d30c739cSEd Maste 					uint32_t bitnum = muge_hash(addr);
1920d30c739cSEd Maste 					sc->sc_mchash_table[bitnum / 32] |=
1921d30c739cSEd Maste 					    (1 << (bitnum % 32));
192248bc1758SEd Maste 					sc->sc_rfe_ctl |=
192348bc1758SEd Maste 					    ETH_RFE_CTL_MCAST_HASH_;
1924d30c739cSEd Maste 				}
1925d30c739cSEd Maste 				i++;
1926d30c739cSEd Maste 			}
1927d30c739cSEd Maste 		}
1928d30c739cSEd Maste 		if_maddr_runlock(ifp);
1929d30c739cSEd Maste 		muge_multicast_write(sc);
1930d30c739cSEd Maste 	}
193148bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1932d30c739cSEd Maste }
1933d30c739cSEd Maste 
1934d30c739cSEd Maste /**
1935d30c739cSEd Maste  *	muge_setpromisc - Enables/disables promiscuous mode
1936d30c739cSEd Maste  *	@ue: usb ethernet device context
1937d30c739cSEd Maste  *
1938d30c739cSEd Maste  *	LOCKING:
1939d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1940d30c739cSEd Maste  */
1941d30c739cSEd Maste static void
1942d30c739cSEd Maste muge_setpromisc(struct usb_ether *ue)
1943d30c739cSEd Maste {
1944d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
1945d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
1946d30c739cSEd Maste 
1947d30c739cSEd Maste 	muge_dbg_printf(sc, "promiscuous mode %sabled\n",
1948d30c739cSEd Maste 	    (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
1949d30c739cSEd Maste 
1950d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1951d30c739cSEd Maste 
1952d30c739cSEd Maste 	if (ifp->if_flags & IFF_PROMISC)
195348bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_;
1954d30c739cSEd Maste 	else
195548bc1758SEd Maste 		sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_);
1956d30c739cSEd Maste 
195748bc1758SEd Maste 	lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1958d30c739cSEd Maste }
1959d30c739cSEd Maste 
1960d30c739cSEd Maste /**
1961d30c739cSEd Maste  *	muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming
1962d30c739cSEd Maste  *	@sc: driver soft context
1963d30c739cSEd Maste  *
1964d30c739cSEd Maste  *	LOCKING:
1965d30c739cSEd Maste  *	Should be called with the MUGE lock held.
1966d30c739cSEd Maste  *
1967d30c739cSEd Maste  *	RETURNS:
1968d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
1969d30c739cSEd Maste  */
1970d30c739cSEd Maste static int muge_sethwcsum(struct muge_softc *sc)
1971d30c739cSEd Maste {
1972d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1973d30c739cSEd Maste 	int err;
1974d30c739cSEd Maste 
1975d30c739cSEd Maste 	if (!ifp)
1976d30c739cSEd Maste 		return (-EIO);
1977d30c739cSEd Maste 
1978d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
1979d30c739cSEd Maste 
1980d30c739cSEd Maste 	if (ifp->if_capabilities & IFCAP_RXCSUM) {
198148bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_;
198248bc1758SEd Maste 		sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_;
1983d30c739cSEd Maste 	} else {
198448bc1758SEd Maste 		sc->sc_rfe_ctl &=
198548bc1758SEd Maste 		    ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_);
198648bc1758SEd Maste 		sc->sc_rfe_ctl &=
198748bc1758SEd Maste 		     ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_);
1988d30c739cSEd Maste 	}
1989d30c739cSEd Maste 
199048bc1758SEd Maste 	sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_;
1991d30c739cSEd Maste 
199248bc1758SEd Maste 	err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl);
1993d30c739cSEd Maste 
1994d30c739cSEd Maste 	if (err != 0) {
199548bc1758SEd Maste 		muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n",
199648bc1758SEd Maste 		    err);
1997d30c739cSEd Maste 		return (err);
1998d30c739cSEd Maste 	}
1999d30c739cSEd Maste 
2000d30c739cSEd Maste 	return (0);
2001d30c739cSEd Maste }
2002d30c739cSEd Maste 
2003d30c739cSEd Maste /**
2004d30c739cSEd Maste  *	muge_ifmedia_upd - Set media options
2005d30c739cSEd Maste  *	@ifp: interface pointer
2006d30c739cSEd Maste  *
2007d30c739cSEd Maste  *	Basically boilerplate code that simply calls the mii functions to set
2008d30c739cSEd Maste  *	the media options.
2009d30c739cSEd Maste  *
2010d30c739cSEd Maste  *	LOCKING:
2011d30c739cSEd Maste  *	The device lock must be held before this function is called.
2012d30c739cSEd Maste  *
2013d30c739cSEd Maste  *	RETURNS:
2014d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
2015d30c739cSEd Maste  */
2016d30c739cSEd Maste static int
2017d30c739cSEd Maste muge_ifmedia_upd(struct ifnet *ifp)
2018d30c739cSEd Maste {
2019d30c739cSEd Maste 	struct muge_softc *sc = ifp->if_softc;
2020d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n");
2021d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2022d30c739cSEd Maste 	struct mii_softc *miisc;
2023d30c739cSEd Maste 	int err;
2024d30c739cSEd Maste 
2025d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2026d30c739cSEd Maste 
2027d30c739cSEd Maste 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2028d30c739cSEd Maste 		PHY_RESET(miisc);
2029d30c739cSEd Maste 	err = mii_mediachg(mii);
2030d30c739cSEd Maste 	return (err);
2031d30c739cSEd Maste }
2032d30c739cSEd Maste 
2033d30c739cSEd Maste /**
2034d30c739cSEd Maste  *	muge_init - Initialises the LAN95xx chip
2035d30c739cSEd Maste  *	@ue: USB ether interface
2036d30c739cSEd Maste  *
2037d30c739cSEd Maste  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
2038d30c739cSEd Maste  *	initialise the interface and the rx/tx pipes.
2039d30c739cSEd Maste  *
2040d30c739cSEd Maste  *	LOCKING:
2041d30c739cSEd Maste  *	Should be called with the MUGE lock held.
2042d30c739cSEd Maste  */
2043d30c739cSEd Maste static void
2044d30c739cSEd Maste muge_init(struct usb_ether *ue)
2045d30c739cSEd Maste {
2046d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2047d30c739cSEd Maste 	muge_dbg_printf(sc, "Calling muge_init.\n");
2048d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
2049d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2050d30c739cSEd Maste 
2051d30c739cSEd Maste 	if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp)))
2052d30c739cSEd Maste 		muge_dbg_printf(sc, "setting MAC address failed\n");
2053d30c739cSEd Maste 
2054d30c739cSEd Maste 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
2055d30c739cSEd Maste 		return;
2056d30c739cSEd Maste 
2057e5151258SEd Maste 	/* Cancel pending I/O. */
2058d30c739cSEd Maste 	muge_stop(ue);
2059d30c739cSEd Maste 
2060d30c739cSEd Maste 	/* Reset the ethernet interface. */
2061d30c739cSEd Maste 	muge_reset(sc);
2062d30c739cSEd Maste 
2063d30c739cSEd Maste 	/* Load the multicast filter. */
2064d30c739cSEd Maste 	muge_setmulti(ue);
2065d30c739cSEd Maste 
2066d30c739cSEd Maste 	/* TCP/UDP checksum offload engines. */
2067d30c739cSEd Maste 	muge_sethwcsum(sc);
2068d30c739cSEd Maste 
2069d30c739cSEd Maste 	usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]);
2070d30c739cSEd Maste 
2071d30c739cSEd Maste 	/* Indicate we are up and running. */
2072d30c739cSEd Maste 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2073d30c739cSEd Maste 
2074d30c739cSEd Maste 	/* Switch to selected media. */
2075d30c739cSEd Maste 	muge_ifmedia_upd(ifp);
2076d30c739cSEd Maste 	muge_start(ue);
2077d30c739cSEd Maste }
2078d30c739cSEd Maste 
2079d30c739cSEd Maste /**
2080d30c739cSEd Maste  *	muge_stop - Stops communication with the LAN78xx chip
2081d30c739cSEd Maste  *	@ue: USB ether interface
2082d30c739cSEd Maste  */
2083d30c739cSEd Maste static void
2084d30c739cSEd Maste muge_stop(struct usb_ether *ue)
2085d30c739cSEd Maste {
2086d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2087d30c739cSEd Maste 	struct ifnet *ifp = uether_getifp(ue);
2088d30c739cSEd Maste 
2089d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2090d30c739cSEd Maste 
2091d30c739cSEd Maste 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2092d30c739cSEd Maste 	sc->sc_flags &= ~MUGE_FLAG_LINK;
2093d30c739cSEd Maste 
2094d30c739cSEd Maste 	/*
2095e5151258SEd Maste 	 * Stop all the transfers, if not already stopped.
2096d30c739cSEd Maste 	 */
2097d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]);
2098d30c739cSEd Maste 	usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]);
2099d30c739cSEd Maste }
2100d30c739cSEd Maste 
2101d30c739cSEd Maste /**
2102d30c739cSEd Maste  *	muge_tick - Called periodically to monitor the state of the LAN95xx chip
2103d30c739cSEd Maste  *	@ue: USB ether interface
2104d30c739cSEd Maste  *
2105d30c739cSEd Maste  *	Simply calls the mii status functions to check the state of the link.
2106d30c739cSEd Maste  *
2107d30c739cSEd Maste  *	LOCKING:
2108d30c739cSEd Maste  *	Should be called with the MUGE lock held.
2109d30c739cSEd Maste  */
2110d30c739cSEd Maste static void
2111d30c739cSEd Maste muge_tick(struct usb_ether *ue)
2112d30c739cSEd Maste {
2113d30c739cSEd Maste 
2114d30c739cSEd Maste 	struct muge_softc *sc = uether_getsc(ue);
2115d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2116d30c739cSEd Maste 
2117d30c739cSEd Maste 	MUGE_LOCK_ASSERT(sc, MA_OWNED);
2118d30c739cSEd Maste 
2119d30c739cSEd Maste 	mii_tick(mii);
2120d30c739cSEd Maste 	if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) {
2121d30c739cSEd Maste 		lan78xx_miibus_statchg(ue->ue_dev);
2122d30c739cSEd Maste 		if ((sc->sc_flags & MUGE_FLAG_LINK) != 0)
2123d30c739cSEd Maste 			muge_start(ue);
2124d30c739cSEd Maste 	}
2125d30c739cSEd Maste }
2126d30c739cSEd Maste 
2127d30c739cSEd Maste /**
2128d30c739cSEd Maste  *	muge_ifmedia_sts - Report current media status
2129d30c739cSEd Maste  *	@ifp: inet interface pointer
2130d30c739cSEd Maste  *	@ifmr: interface media request
2131d30c739cSEd Maste  *
2132e5151258SEd Maste  *	Call the mii functions to get the media status.
2133d30c739cSEd Maste  *
2134d30c739cSEd Maste  *	LOCKING:
2135d30c739cSEd Maste  *	Internally takes and releases the device lock.
2136d30c739cSEd Maste  */
2137d30c739cSEd Maste static void
2138d30c739cSEd Maste muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
2139d30c739cSEd Maste {
2140d30c739cSEd Maste 	struct muge_softc *sc = ifp->if_softc;
2141d30c739cSEd Maste 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
2142d30c739cSEd Maste 
2143d30c739cSEd Maste 	MUGE_LOCK(sc);
2144d30c739cSEd Maste 	mii_pollstat(mii);
2145d30c739cSEd Maste 	ifmr->ifm_active = mii->mii_media_active;
2146d30c739cSEd Maste 	ifmr->ifm_status = mii->mii_media_status;
2147d30c739cSEd Maste 	MUGE_UNLOCK(sc);
2148d30c739cSEd Maste }
2149d30c739cSEd Maste 
2150d30c739cSEd Maste /**
2151d30c739cSEd Maste  *	muge_probe - Probe the interface.
2152d30c739cSEd Maste  *	@dev: muge device handle
2153d30c739cSEd Maste  *
2154d30c739cSEd Maste  *	Checks if the device is a match for this driver.
2155d30c739cSEd Maste  *
2156d30c739cSEd Maste  *	RETURNS:
2157d30c739cSEd Maste  *	Returns 0 on success or an error code on failure.
2158d30c739cSEd Maste  */
2159d30c739cSEd Maste static int
2160d30c739cSEd Maste muge_probe(device_t dev)
2161d30c739cSEd Maste {
2162d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2163d30c739cSEd Maste 
2164d30c739cSEd Maste 	if (uaa->usb_mode != USB_MODE_HOST)
2165d30c739cSEd Maste 		return (ENXIO);
2166d30c739cSEd Maste 	if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX)
2167d30c739cSEd Maste 		return (ENXIO);
2168d30c739cSEd Maste 	if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX)
2169d30c739cSEd Maste 		return (ENXIO);
2170d30c739cSEd Maste 	return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa));
2171d30c739cSEd Maste }
2172d30c739cSEd Maste 
2173d30c739cSEd Maste /**
2174d30c739cSEd Maste  *	muge_attach - Attach the interface.
2175d30c739cSEd Maste  *	@dev: muge device handle
2176d30c739cSEd Maste  *
2177d30c739cSEd Maste  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
2178d30c739cSEd Maste  *
2179d30c739cSEd Maste  *	RETURNS:
2180d30c739cSEd Maste  *	Returns 0 on success or a negative error code.
2181d30c739cSEd Maste  */
2182d30c739cSEd Maste static int
2183d30c739cSEd Maste muge_attach(device_t dev)
2184d30c739cSEd Maste {
2185d30c739cSEd Maste 	struct usb_attach_arg *uaa = device_get_ivars(dev);
2186d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2187d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2188d30c739cSEd Maste 	uint8_t iface_index;
2189d30c739cSEd Maste 	int err;
2190d30c739cSEd Maste 
2191d30c739cSEd Maste 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
2192d30c739cSEd Maste 
2193d30c739cSEd Maste 	device_set_usb_desc(dev);
2194d30c739cSEd Maste 
2195d30c739cSEd Maste 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
2196d30c739cSEd Maste 
2197e5151258SEd Maste 	/* Setup the endpoints for the Microchip LAN78xx device. */
2198d30c739cSEd Maste 	iface_index = MUGE_IFACE_IDX;
2199d30c739cSEd Maste 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
2200d30c739cSEd Maste 	    muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx);
2201d30c739cSEd Maste 	if (err) {
2202d30c739cSEd Maste 		device_printf(dev, "error: allocating USB transfers failed\n");
220349b2a5feSEd Maste 		goto err;
2204d30c739cSEd Maste 	}
2205d30c739cSEd Maste 
2206d30c739cSEd Maste 	ue->ue_sc = sc;
2207d30c739cSEd Maste 	ue->ue_dev = dev;
2208d30c739cSEd Maste 	ue->ue_udev = uaa->device;
2209d30c739cSEd Maste 	ue->ue_mtx = &sc->sc_mtx;
2210d30c739cSEd Maste 	ue->ue_methods = &muge_ue_methods;
2211d30c739cSEd Maste 
2212d30c739cSEd Maste 	err = uether_ifattach(ue);
2213d30c739cSEd Maste 	if (err) {
2214d30c739cSEd Maste 		device_printf(dev, "error: could not attach interface\n");
221549b2a5feSEd Maste 		goto err_usbd;
2216d30c739cSEd Maste 	}
221749b2a5feSEd Maste 
221849b2a5feSEd Maste 	/* Wait for lan78xx_chip_init from post-attach callback to complete. */
221949b2a5feSEd Maste 	uether_ifattach_wait(ue);
222049b2a5feSEd Maste 	if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE))
222149b2a5feSEd Maste 		goto err_attached;
222249b2a5feSEd Maste 
2223d30c739cSEd Maste 	return (0);
2224d30c739cSEd Maste 
222549b2a5feSEd Maste err_attached:
222649b2a5feSEd Maste 	uether_ifdetach(ue);
222749b2a5feSEd Maste err_usbd:
222849b2a5feSEd Maste 	usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
222949b2a5feSEd Maste err:
223049b2a5feSEd Maste 	mtx_destroy(&sc->sc_mtx);
2231d30c739cSEd Maste 	return (ENXIO);
2232d30c739cSEd Maste }
2233d30c739cSEd Maste 
2234d30c739cSEd Maste /**
2235d30c739cSEd Maste  *	muge_detach - Detach the interface.
2236d30c739cSEd Maste  *	@dev: muge device handle
2237d30c739cSEd Maste  *
2238d30c739cSEd Maste  *	RETURNS:
2239d30c739cSEd Maste  *	Returns 0.
2240d30c739cSEd Maste  */
2241d30c739cSEd Maste static int
2242d30c739cSEd Maste muge_detach(device_t dev)
2243d30c739cSEd Maste {
2244d30c739cSEd Maste 
2245d30c739cSEd Maste 	struct muge_softc *sc = device_get_softc(dev);
2246d30c739cSEd Maste 	struct usb_ether *ue = &sc->sc_ue;
2247d30c739cSEd Maste 
2248d30c739cSEd Maste 	usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER);
2249d30c739cSEd Maste 	uether_ifdetach(ue);
2250d30c739cSEd Maste 	mtx_destroy(&sc->sc_mtx);
2251d30c739cSEd Maste 
2252d30c739cSEd Maste 	return (0);
2253d30c739cSEd Maste }
2254d30c739cSEd Maste 
2255d30c739cSEd Maste static device_method_t muge_methods[] = {
2256d30c739cSEd Maste 	/* Device interface */
2257d30c739cSEd Maste 	DEVMETHOD(device_probe, muge_probe),
2258d30c739cSEd Maste 	DEVMETHOD(device_attach, muge_attach),
2259d30c739cSEd Maste 	DEVMETHOD(device_detach, muge_detach),
2260d30c739cSEd Maste 
2261d30c739cSEd Maste 	/* Bus interface */
2262d30c739cSEd Maste 	DEVMETHOD(bus_print_child, bus_generic_print_child),
2263d30c739cSEd Maste 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
2264d30c739cSEd Maste 
2265d30c739cSEd Maste 	/* MII interface */
2266d30c739cSEd Maste 	DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg),
2267d30c739cSEd Maste 	DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg),
2268d30c739cSEd Maste 	DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg),
2269d30c739cSEd Maste 
2270d30c739cSEd Maste 	DEVMETHOD_END
2271d30c739cSEd Maste };
2272d30c739cSEd Maste 
2273d30c739cSEd Maste static driver_t muge_driver = {
2274d30c739cSEd Maste 	.name = "muge",
2275d30c739cSEd Maste 	.methods = muge_methods,
2276d30c739cSEd Maste 	.size = sizeof(struct muge_softc),
2277d30c739cSEd Maste };
2278d30c739cSEd Maste 
2279d30c739cSEd Maste static devclass_t muge_devclass;
2280d30c739cSEd Maste 
2281fea616deSEd Maste DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL);
2282fea616deSEd Maste DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL);
2283d30c739cSEd Maste MODULE_DEPEND(muge, uether, 1, 1, 1);
2284d30c739cSEd Maste MODULE_DEPEND(muge, usb, 1, 1, 1);
2285d30c739cSEd Maste MODULE_DEPEND(muge, ether, 1, 1, 1);
2286d30c739cSEd Maste MODULE_DEPEND(muge, miibus, 1, 1, 1);
2287d30c739cSEd Maste MODULE_VERSION(muge, 1);
2288d30c739cSEd Maste USB_PNP_HOST_INFO(lan78xx_devs);
2289