1d30c739cSEd Maste /*- 2d30c739cSEd Maste * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3d30c739cSEd Maste * 4d30c739cSEd Maste * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5d30c739cSEd Maste * Copyright (C) 2018 The FreeBSD Foundation. 6d30c739cSEd Maste * 7d30c739cSEd Maste * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8d30c739cSEd Maste * under sponsorship from the FreeBSD Foundation. 9d30c739cSEd Maste * 10d30c739cSEd Maste * Redistribution and use in source and binary forms, with or without 11d30c739cSEd Maste * modification, are permitted provided that the following conditions 12d30c739cSEd Maste * are met: 13d30c739cSEd Maste * 1. Redistributions of source code must retain the above copyright 14d30c739cSEd Maste * notice, this list of conditions and the following disclaimer. 15d30c739cSEd Maste * 2. Redistributions in binary form must reproduce the above copyright 16d30c739cSEd Maste * notice, this list of conditions and the following disclaimer in the 17d30c739cSEd Maste * documentation and/or other materials provided with the distribution. 18d30c739cSEd Maste * 19d30c739cSEd Maste * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20d30c739cSEd Maste * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21d30c739cSEd Maste * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22d30c739cSEd Maste * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23d30c739cSEd Maste * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24d30c739cSEd Maste * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25d30c739cSEd Maste * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26d30c739cSEd Maste * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27d30c739cSEd Maste * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28d30c739cSEd Maste * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29d30c739cSEd Maste * SUCH DAMAGE. 30d30c739cSEd Maste * 31d30c739cSEd Maste * $FreeBSD$ 32d30c739cSEd Maste */ 33d30c739cSEd Maste 34d30c739cSEd Maste #include <sys/cdefs.h> 35d30c739cSEd Maste __FBSDID("$FreeBSD$"); 36d30c739cSEd Maste 37d30c739cSEd Maste /* 38d30c739cSEd Maste * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39d30c739cSEd Maste * 40d30c739cSEd Maste * USB 3.1 to 10/100/1000 Mbps Ethernet 41d30c739cSEd Maste * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42d30c739cSEd Maste * 432d14fb8bSEd Maste * USB 2.0 to 10/100/1000 Mbps Ethernet 442d14fb8bSEd Maste * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 452d14fb8bSEd Maste * 46d30c739cSEd Maste * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47d30c739cSEd Maste * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48d30c739cSEd Maste * 49d30c739cSEd Maste * This driver is based on the if_smsc driver, with lan78xx-specific 50d30c739cSEd Maste * functionality modelled on Microchip's Linux lan78xx driver. 51d30c739cSEd Maste * 52d30c739cSEd Maste * UNIMPLEMENTED FEATURES 53d30c739cSEd Maste * ------------------ 54d30c739cSEd Maste * A number of features supported by the lan78xx are not yet implemented in 55d30c739cSEd Maste * this driver: 56d30c739cSEd Maste * 57515a5d02SEd Maste * - RX/TX checksum offloading: Nothing has been implemented yet for 58d30c739cSEd Maste * TX checksumming. RX checksumming works with ICMP messages, but is broken 59d30c739cSEd Maste * for TCP/UDP packets. 60515a5d02SEd Maste * - Direct address translation filtering: Implemented but untested. 61515a5d02SEd Maste * - VLAN tag removal. 62515a5d02SEd Maste * - Support for USB interrupt endpoints. 63515a5d02SEd Maste * - Latency Tolerance Messaging (LTM) support. 64515a5d02SEd Maste * - TCP LSO support. 65d30c739cSEd Maste * 66d30c739cSEd Maste */ 67d30c739cSEd Maste 68d30c739cSEd Maste #include <sys/param.h> 69d30c739cSEd Maste #include <sys/bus.h> 70d30c739cSEd Maste #include <sys/callout.h> 71d30c739cSEd Maste #include <sys/condvar.h> 72d30c739cSEd Maste #include <sys/kernel.h> 73d30c739cSEd Maste #include <sys/lock.h> 74d30c739cSEd Maste #include <sys/malloc.h> 75d30c739cSEd Maste #include <sys/module.h> 76d30c739cSEd Maste #include <sys/mutex.h> 77d30c739cSEd Maste #include <sys/priv.h> 78d30c739cSEd Maste #include <sys/queue.h> 79d30c739cSEd Maste #include <sys/random.h> 80d30c739cSEd Maste #include <sys/socket.h> 81d30c739cSEd Maste #include <sys/stddef.h> 82d30c739cSEd Maste #include <sys/stdint.h> 83d30c739cSEd Maste #include <sys/sx.h> 84d30c739cSEd Maste #include <sys/sysctl.h> 85d30c739cSEd Maste #include <sys/systm.h> 86d30c739cSEd Maste #include <sys/unistd.h> 87d30c739cSEd Maste 88d30c739cSEd Maste #include <net/if.h> 89d30c739cSEd Maste #include <net/if_var.h> 9031c484adSJustin Hibbits #include <net/if_media.h> 9131c484adSJustin Hibbits 9231c484adSJustin Hibbits #include <dev/mii/mii.h> 9331c484adSJustin Hibbits #include <dev/mii/miivar.h> 94d30c739cSEd Maste 95d30c739cSEd Maste #include <netinet/in.h> 96d30c739cSEd Maste #include <netinet/ip.h> 97d30c739cSEd Maste 98d30c739cSEd Maste #include "opt_platform.h" 99d30c739cSEd Maste 100b4872d67SOleksandr Tymoshenko #ifdef FDT 101b4872d67SOleksandr Tymoshenko #include <dev/fdt/fdt_common.h> 102b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h> 103b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h> 10418dc4538SIan Lepore #include <dev/usb/usb_fdt_support.h> 105b4872d67SOleksandr Tymoshenko #endif 106b4872d67SOleksandr Tymoshenko 107d30c739cSEd Maste #include <dev/usb/usb.h> 108d30c739cSEd Maste #include <dev/usb/usbdi.h> 109d30c739cSEd Maste #include <dev/usb/usbdi_util.h> 110d30c739cSEd Maste #include "usbdevs.h" 111d30c739cSEd Maste 112d30c739cSEd Maste #define USB_DEBUG_VAR lan78xx_debug 113d30c739cSEd Maste #include <dev/usb/usb_debug.h> 114d30c739cSEd Maste #include <dev/usb/usb_process.h> 115d30c739cSEd Maste 116d30c739cSEd Maste #include <dev/usb/net/usb_ethernet.h> 117d30c739cSEd Maste 118d30c739cSEd Maste #include <dev/usb/net/if_mugereg.h> 119d30c739cSEd Maste 12031c484adSJustin Hibbits #include "miibus_if.h" 12131c484adSJustin Hibbits 122d30c739cSEd Maste #ifdef USB_DEBUG 123d30c739cSEd Maste static int muge_debug = 0; 124d30c739cSEd Maste 125f8d2b1f3SPawel Biernacki SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 126d30c739cSEd Maste "Microchip LAN78xx USB-GigE"); 127d30c739cSEd Maste SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 128d30c739cSEd Maste "Debug level"); 129d30c739cSEd Maste #endif 130d30c739cSEd Maste 131d30c739cSEd Maste #define MUGE_DEFAULT_RX_CSUM_ENABLE (false) 132d30c739cSEd Maste #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 133d30c739cSEd Maste #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false) 134d30c739cSEd Maste 135d30c739cSEd Maste /* Supported Vendor and Product IDs. */ 136d30c739cSEd Maste static const struct usb_device_id lan78xx_devs[] = { 137d30c739cSEd Maste #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 138d30c739cSEd Maste MUGE_DEV(LAN7800_ETH, 0), 13949b2a5feSEd Maste MUGE_DEV(LAN7801_ETH, 0), 14049b2a5feSEd Maste MUGE_DEV(LAN7850_ETH, 0), 141d30c739cSEd Maste #undef MUGE_DEV 142d30c739cSEd Maste }; 143d30c739cSEd Maste 144d30c739cSEd Maste #ifdef USB_DEBUG 145087522b8SAndreas Tobler #define muge_dbg_printf(sc, fmt, args...) \ 146d30c739cSEd Maste do { \ 147d30c739cSEd Maste if (muge_debug > 0) \ 148d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 149d30c739cSEd Maste } while(0) 150d30c739cSEd Maste #else 151d30c739cSEd Maste #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 152d30c739cSEd Maste #endif 153d30c739cSEd Maste 154d30c739cSEd Maste #define muge_warn_printf(sc, fmt, args...) \ 155d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 156d30c739cSEd Maste 157d30c739cSEd Maste #define muge_err_printf(sc, fmt, args...) \ 158d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 159d30c739cSEd Maste 160d30c739cSEd Maste #define ETHER_IS_VALID(addr) \ 161d30c739cSEd Maste (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 162d30c739cSEd Maste 163d30c739cSEd Maste /* USB endpoints. */ 164d30c739cSEd Maste 165d30c739cSEd Maste enum { 166d30c739cSEd Maste MUGE_BULK_DT_RD, 167d30c739cSEd Maste MUGE_BULK_DT_WR, 168e5151258SEd Maste #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 169e5151258SEd Maste MUGE_INTR_DT_WR, 170e5151258SEd Maste MUGE_INTR_DT_RD, 171e5151258SEd Maste #endif 172d30c739cSEd Maste MUGE_N_TRANSFER, 173d30c739cSEd Maste }; 174d30c739cSEd Maste 175d30c739cSEd Maste struct muge_softc { 176d30c739cSEd Maste struct usb_ether sc_ue; 177d30c739cSEd Maste struct mtx sc_mtx; 178d30c739cSEd Maste struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 179d30c739cSEd Maste int sc_phyno; 18060ce15edSEd Maste uint32_t sc_leds; 18103dec173SEd Maste uint16_t sc_led_modes; 18203dec173SEd Maste uint16_t sc_led_modes_mask; 183d30c739cSEd Maste 184d30c739cSEd Maste /* Settings for the mac control (MAC_CSR) register. */ 185d30c739cSEd Maste uint32_t sc_rfe_ctl; 186d30c739cSEd Maste uint32_t sc_mdix_ctl; 18703ba5353SEd Maste uint16_t chipid; 18803ba5353SEd Maste uint16_t chiprev; 18948bc1758SEd Maste uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 190d30c739cSEd Maste uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 191d30c739cSEd Maste 192d30c739cSEd Maste uint32_t sc_flags; 193d30c739cSEd Maste #define MUGE_FLAG_LINK 0x0001 19449b2a5feSEd Maste #define MUGE_FLAG_INIT_DONE 0x0002 195d30c739cSEd Maste }; 196d30c739cSEd Maste 197d30c739cSEd Maste #define MUGE_IFACE_IDX 0 198d30c739cSEd Maste 199d30c739cSEd Maste #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 200d30c739cSEd Maste #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 201d30c739cSEd Maste #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 202d30c739cSEd Maste 203d30c739cSEd Maste static device_probe_t muge_probe; 204d30c739cSEd Maste static device_attach_t muge_attach; 205d30c739cSEd Maste static device_detach_t muge_detach; 206d30c739cSEd Maste 207d30c739cSEd Maste static usb_callback_t muge_bulk_read_callback; 208d30c739cSEd Maste static usb_callback_t muge_bulk_write_callback; 209d30c739cSEd Maste 210d30c739cSEd Maste static miibus_readreg_t lan78xx_miibus_readreg; 211d30c739cSEd Maste static miibus_writereg_t lan78xx_miibus_writereg; 212d30c739cSEd Maste static miibus_statchg_t lan78xx_miibus_statchg; 213d30c739cSEd Maste 214d30c739cSEd Maste static int muge_attach_post_sub(struct usb_ether *ue); 215d30c739cSEd Maste static uether_fn_t muge_attach_post; 216d30c739cSEd Maste static uether_fn_t muge_init; 217d30c739cSEd Maste static uether_fn_t muge_stop; 218d30c739cSEd Maste static uether_fn_t muge_start; 219d30c739cSEd Maste static uether_fn_t muge_tick; 220d30c739cSEd Maste static uether_fn_t muge_setmulti; 221d30c739cSEd Maste static uether_fn_t muge_setpromisc; 222d30c739cSEd Maste 223d30c739cSEd Maste static int muge_ifmedia_upd(struct ifnet *); 224d30c739cSEd Maste static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 225d30c739cSEd Maste 226d30c739cSEd Maste static int lan78xx_chip_init(struct muge_softc *sc); 227d30c739cSEd Maste static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 228d30c739cSEd Maste 229d30c739cSEd Maste static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 230d30c739cSEd Maste 231d30c739cSEd Maste [MUGE_BULK_DT_WR] = { 232d30c739cSEd Maste .type = UE_BULK, 233d30c739cSEd Maste .endpoint = UE_ADDR_ANY, 234d30c739cSEd Maste .direction = UE_DIR_OUT, 235d30c739cSEd Maste .frames = 16, 236d30c739cSEd Maste .bufsize = 16 * (MCLBYTES + 16), 237d30c739cSEd Maste .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 238d30c739cSEd Maste .callback = muge_bulk_write_callback, 239d30c739cSEd Maste .timeout = 10000, /* 10 seconds */ 240d30c739cSEd Maste }, 241d30c739cSEd Maste 242d30c739cSEd Maste [MUGE_BULK_DT_RD] = { 243d30c739cSEd Maste .type = UE_BULK, 244d30c739cSEd Maste .endpoint = UE_ADDR_ANY, 245d30c739cSEd Maste .direction = UE_DIR_IN, 246d30c739cSEd Maste .bufsize = 20480, /* bytes */ 247d30c739cSEd Maste .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 248d30c739cSEd Maste .callback = muge_bulk_read_callback, 249d30c739cSEd Maste .timeout = 0, /* no timeout */ 250d30c739cSEd Maste }, 251d30c739cSEd Maste /* 252d30c739cSEd Maste * The chip supports interrupt endpoints, however they aren't 253d30c739cSEd Maste * needed as we poll on the MII status. 254d30c739cSEd Maste */ 255d30c739cSEd Maste }; 256d30c739cSEd Maste 257d30c739cSEd Maste static const struct usb_ether_methods muge_ue_methods = { 258d30c739cSEd Maste .ue_attach_post = muge_attach_post, 259d30c739cSEd Maste .ue_attach_post_sub = muge_attach_post_sub, 260d30c739cSEd Maste .ue_start = muge_start, 261d30c739cSEd Maste .ue_ioctl = muge_ioctl, 262d30c739cSEd Maste .ue_init = muge_init, 263d30c739cSEd Maste .ue_stop = muge_stop, 264d30c739cSEd Maste .ue_tick = muge_tick, 265d30c739cSEd Maste .ue_setmulti = muge_setmulti, 266d30c739cSEd Maste .ue_setpromisc = muge_setpromisc, 267d30c739cSEd Maste .ue_mii_upd = muge_ifmedia_upd, 268d30c739cSEd Maste .ue_mii_sts = muge_ifmedia_sts, 269d30c739cSEd Maste }; 270d30c739cSEd Maste 271d30c739cSEd Maste /** 272d30c739cSEd Maste * lan78xx_read_reg - Read a 32-bit register on the device 273d30c739cSEd Maste * @sc: driver soft context 274d30c739cSEd Maste * @off: offset of the register 275d30c739cSEd Maste * @data: pointer a value that will be populated with the register value 276d30c739cSEd Maste * 277d30c739cSEd Maste * LOCKING: 278d30c739cSEd Maste * The device lock must be held before calling this function. 279d30c739cSEd Maste * 280d30c739cSEd Maste * RETURNS: 281d30c739cSEd Maste * 0 on success, a USB_ERR_?? error code on failure. 282d30c739cSEd Maste */ 283d30c739cSEd Maste static int 284d30c739cSEd Maste lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 285d30c739cSEd Maste { 286d30c739cSEd Maste struct usb_device_request req; 287d30c739cSEd Maste uint32_t buf; 288d30c739cSEd Maste usb_error_t err; 289d30c739cSEd Maste 290d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 291d30c739cSEd Maste 292d30c739cSEd Maste req.bmRequestType = UT_READ_VENDOR_DEVICE; 293d30c739cSEd Maste req.bRequest = UVR_READ_REG; 294d30c739cSEd Maste USETW(req.wValue, 0); 295d30c739cSEd Maste USETW(req.wIndex, off); 296d30c739cSEd Maste USETW(req.wLength, 4); 297d30c739cSEd Maste 298d30c739cSEd Maste err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 299d30c739cSEd Maste if (err != 0) 300d30c739cSEd Maste muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 301d30c739cSEd Maste *data = le32toh(buf); 302d30c739cSEd Maste return (err); 303d30c739cSEd Maste } 304d30c739cSEd Maste 305d30c739cSEd Maste /** 306d30c739cSEd Maste * lan78xx_write_reg - Write a 32-bit register on the device 307d30c739cSEd Maste * @sc: driver soft context 308d30c739cSEd Maste * @off: offset of the register 309d30c739cSEd Maste * @data: the 32-bit value to write into the register 310d30c739cSEd Maste * 311d30c739cSEd Maste * LOCKING: 312d30c739cSEd Maste * The device lock must be held before calling this function. 313d30c739cSEd Maste * 314d30c739cSEd Maste * RETURNS: 315d30c739cSEd Maste * 0 on success, a USB_ERR_?? error code on failure. 316d30c739cSEd Maste */ 317d30c739cSEd Maste static int 318d30c739cSEd Maste lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 319d30c739cSEd Maste { 320d30c739cSEd Maste struct usb_device_request req; 321d30c739cSEd Maste uint32_t buf; 322d30c739cSEd Maste usb_error_t err; 323d30c739cSEd Maste 324d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 325d30c739cSEd Maste 326d30c739cSEd Maste buf = htole32(data); 327d30c739cSEd Maste 328d30c739cSEd Maste req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 329d30c739cSEd Maste req.bRequest = UVR_WRITE_REG; 330d30c739cSEd Maste USETW(req.wValue, 0); 331d30c739cSEd Maste USETW(req.wIndex, off); 332d30c739cSEd Maste USETW(req.wLength, 4); 333d30c739cSEd Maste 334d30c739cSEd Maste err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 335d30c739cSEd Maste if (err != 0) 336d30c739cSEd Maste muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 337d30c739cSEd Maste return (err); 338d30c739cSEd Maste } 339d30c739cSEd Maste 340d30c739cSEd Maste /** 341d30c739cSEd Maste * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 342d30c739cSEd Maste * @sc: soft context 343d30c739cSEd Maste * @reg: offset of the register 344d30c739cSEd Maste * @bits: if the bits are clear the function returns 345d30c739cSEd Maste * 346d30c739cSEd Maste * LOCKING: 347d30c739cSEd Maste * The device lock must be held before calling this function. 348d30c739cSEd Maste * 349d30c739cSEd Maste * RETURNS: 350d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 351d30c739cSEd Maste */ 352d30c739cSEd Maste static int 353d30c739cSEd Maste lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 354d30c739cSEd Maste { 355d30c739cSEd Maste usb_ticks_t start_ticks; 356d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 357d30c739cSEd Maste uint32_t val; 358d30c739cSEd Maste int err; 359d30c739cSEd Maste 360d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 361d30c739cSEd Maste 362d30c739cSEd Maste start_ticks = (usb_ticks_t)ticks; 363d30c739cSEd Maste do { 364d30c739cSEd Maste if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 365d30c739cSEd Maste return (err); 366d30c739cSEd Maste if (!(val & bits)) 367d30c739cSEd Maste return (0); 368d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 369d30c739cSEd Maste } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 370d30c739cSEd Maste 371d30c739cSEd Maste return (USB_ERR_TIMEOUT); 372d30c739cSEd Maste } 373d30c739cSEd Maste 374d30c739cSEd Maste /** 375d30c739cSEd Maste * lan78xx_eeprom_read_raw - Read the attached EEPROM 376d30c739cSEd Maste * @sc: soft context 377d30c739cSEd Maste * @off: the eeprom address offset 378d30c739cSEd Maste * @buf: stores the bytes 379d30c739cSEd Maste * @buflen: the number of bytes to read 380d30c739cSEd Maste * 381d30c739cSEd Maste * Simply reads bytes from an attached eeprom. 382d30c739cSEd Maste * 383d30c739cSEd Maste * LOCKING: 384d30c739cSEd Maste * The function takes and releases the device lock if not already held. 385d30c739cSEd Maste * 386d30c739cSEd Maste * RETURNS: 387d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 388d30c739cSEd Maste */ 389d30c739cSEd Maste static int 390d30c739cSEd Maste lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 391d30c739cSEd Maste uint16_t buflen) 392d30c739cSEd Maste { 393d30c739cSEd Maste usb_ticks_t start_ticks; 394d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 395d30c739cSEd Maste int err, locked; 396d30c739cSEd Maste uint32_t val, saved; 397d30c739cSEd Maste uint16_t i; 398d30c739cSEd Maste 399d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); /* XXX */ 400d30c739cSEd Maste if (!locked) 401d30c739cSEd Maste MUGE_LOCK(sc); 402d30c739cSEd Maste 4032d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 4042d14fb8bSEd Maste /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 40548bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 406d30c739cSEd Maste saved = val; 407d30c739cSEd Maste 40848bc1758SEd Maste val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 40948bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 4102d14fb8bSEd Maste } 411d30c739cSEd Maste 41248bc1758SEd Maste err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 413d30c739cSEd Maste if (err != 0) { 414d30c739cSEd Maste muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 415d30c739cSEd Maste goto done; 416d30c739cSEd Maste } 417d30c739cSEd Maste 418d30c739cSEd Maste /* Start reading the bytes, one at a time. */ 419d30c739cSEd Maste for (i = 0; i < buflen; i++) { 42048bc1758SEd Maste val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 42148bc1758SEd Maste val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 42248bc1758SEd Maste if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 423d30c739cSEd Maste goto done; 424d30c739cSEd Maste 425d30c739cSEd Maste start_ticks = (usb_ticks_t)ticks; 426d30c739cSEd Maste do { 42748bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 42848bc1758SEd Maste 0) 429d30c739cSEd Maste goto done; 43048bc1758SEd Maste if (!(val & ETH_E2P_CMD_BUSY_) || 43148bc1758SEd Maste (val & ETH_E2P_CMD_TIMEOUT_)) 432d30c739cSEd Maste break; 433d30c739cSEd Maste 434d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 435d30c739cSEd Maste } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 436d30c739cSEd Maste 43748bc1758SEd Maste if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 438d30c739cSEd Maste muge_warn_printf(sc, "eeprom command failed\n"); 439d30c739cSEd Maste err = USB_ERR_IOERROR; 440d30c739cSEd Maste break; 441d30c739cSEd Maste } 442d30c739cSEd Maste 44348bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 444d30c739cSEd Maste goto done; 445d30c739cSEd Maste 446d30c739cSEd Maste buf[i] = (val & 0xff); 447d30c739cSEd Maste } 448d30c739cSEd Maste 449d30c739cSEd Maste done: 450d30c739cSEd Maste if (!locked) 451d30c739cSEd Maste MUGE_UNLOCK(sc); 4522d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 4532d14fb8bSEd Maste /* Restore saved LED configuration. */ 45448bc1758SEd Maste lan78xx_write_reg(sc, ETH_HW_CFG, saved); 4552d14fb8bSEd Maste } 456d30c739cSEd Maste return (err); 457d30c739cSEd Maste } 458d30c739cSEd Maste 4592c8cf0c5SEd Maste static bool 4602c8cf0c5SEd Maste lan78xx_eeprom_present(struct muge_softc *sc) 461d30c739cSEd Maste { 462d30c739cSEd Maste int ret; 4632c8cf0c5SEd Maste uint8_t sig; 464d30c739cSEd Maste 46548bc1758SEd Maste ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 4662c8cf0c5SEd Maste return (ret == 0 && sig == ETH_E2P_INDICATOR); 467d30c739cSEd Maste } 468d30c739cSEd Maste 469d30c739cSEd Maste /** 470d30c739cSEd Maste * lan78xx_otp_read_raw 471d30c739cSEd Maste * @sc: soft context 472d30c739cSEd Maste * @off: the otp address offset 473d30c739cSEd Maste * @buf: stores the bytes 474d30c739cSEd Maste * @buflen: the number of bytes to read 475d30c739cSEd Maste * 476d30c739cSEd Maste * Simply reads bytes from the OTP. 477d30c739cSEd Maste * 478d30c739cSEd Maste * LOCKING: 479d30c739cSEd Maste * The function takes and releases the device lock if not already held. 480d30c739cSEd Maste * 481d30c739cSEd Maste * RETURNS: 482d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 483d30c739cSEd Maste * 484d30c739cSEd Maste */ 485d30c739cSEd Maste static int 486d30c739cSEd Maste lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 487d30c739cSEd Maste uint16_t buflen) 488d30c739cSEd Maste { 489d30c739cSEd Maste int locked, err; 490d30c739cSEd Maste uint32_t val; 491d30c739cSEd Maste uint16_t i; 492d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 493d30c739cSEd Maste if (!locked) 494d30c739cSEd Maste MUGE_LOCK(sc); 495d30c739cSEd Maste 496d30c739cSEd Maste err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 497d30c739cSEd Maste 498e5151258SEd Maste /* Checking if bit is set. */ 499d30c739cSEd Maste if (val & OTP_PWR_DN_PWRDN_N) { 500e5151258SEd Maste /* Clear it, then wait for it to be cleared. */ 501d30c739cSEd Maste lan78xx_write_reg(sc, OTP_PWR_DN, 0); 502d30c739cSEd Maste err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 503d30c739cSEd Maste if (err != 0) { 504d30c739cSEd Maste muge_warn_printf(sc, "OTP off? failed to read data\n"); 505d30c739cSEd Maste goto done; 506d30c739cSEd Maste } 507d30c739cSEd Maste } 508e5151258SEd Maste /* Start reading the bytes, one at a time. */ 509d30c739cSEd Maste for (i = 0; i < buflen; i++) { 510d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_ADDR1, 511d30c739cSEd Maste ((off + i) >> 8) & OTP_ADDR1_15_11); 512d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_ADDR2, 513d30c739cSEd Maste ((off + i) & OTP_ADDR2_10_3)); 514d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 515d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 516d30c739cSEd Maste 517d30c739cSEd Maste err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 518d30c739cSEd Maste if (err != 0) { 519d30c739cSEd Maste muge_warn_printf(sc, "OTP busy failed to read data\n"); 520d30c739cSEd Maste goto done; 521d30c739cSEd Maste } 522d30c739cSEd Maste 523d30c739cSEd Maste if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 524d30c739cSEd Maste goto done; 525d30c739cSEd Maste 526d30c739cSEd Maste buf[i] = (uint8_t)(val & 0xff); 527d30c739cSEd Maste } 528d30c739cSEd Maste 529d30c739cSEd Maste done: 530d30c739cSEd Maste if (!locked) 531d30c739cSEd Maste MUGE_UNLOCK(sc); 532d30c739cSEd Maste return (err); 533d30c739cSEd Maste } 534d30c739cSEd Maste 535d30c739cSEd Maste /** 536d30c739cSEd Maste * lan78xx_otp_read 537d30c739cSEd Maste * @sc: soft context 538d30c739cSEd Maste * @off: the otp address offset 539d30c739cSEd Maste * @buf: stores the bytes 540d30c739cSEd Maste * @buflen: the number of bytes to read 541d30c739cSEd Maste * 542d30c739cSEd Maste * Simply reads bytes from the otp. 543d30c739cSEd Maste * 544d30c739cSEd Maste * LOCKING: 545d30c739cSEd Maste * The function takes and releases device lock if it is not already held. 546d30c739cSEd Maste * 547d30c739cSEd Maste * RETURNS: 548d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 549d30c739cSEd Maste */ 550d30c739cSEd Maste static int 551d30c739cSEd Maste lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 552d30c739cSEd Maste uint16_t buflen) 553d30c739cSEd Maste { 554d30c739cSEd Maste uint8_t sig; 555d30c739cSEd Maste int err; 556d30c739cSEd Maste 557d30c739cSEd Maste err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 558d30c739cSEd Maste if (err == 0) { 559d30c739cSEd Maste if (sig == OTP_INDICATOR_1) { 560d30c739cSEd Maste } else if (sig == OTP_INDICATOR_2) { 561e5151258SEd Maste off += 0x100; /* XXX */ 562d30c739cSEd Maste } else { 563d30c739cSEd Maste err = -EINVAL; 564d30c739cSEd Maste } 565d30c739cSEd Maste if (!err) 566d30c739cSEd Maste err = lan78xx_otp_read_raw(sc, off, buf, buflen); 567d30c739cSEd Maste } 568e5151258SEd Maste return (err); 569d30c739cSEd Maste } 570d30c739cSEd Maste 571d30c739cSEd Maste /** 572d30c739cSEd Maste * lan78xx_setmacaddress - Set the mac address in the device 573d30c739cSEd Maste * @sc: driver soft context 574d30c739cSEd Maste * @addr: pointer to array contain at least 6 bytes of the mac 575d30c739cSEd Maste * 576d30c739cSEd Maste * LOCKING: 577d30c739cSEd Maste * Should be called with the MUGE lock held. 578d30c739cSEd Maste * 579d30c739cSEd Maste * RETURNS: 580d30c739cSEd Maste * Returns 0 on success or a negative error code. 581d30c739cSEd Maste */ 582d30c739cSEd Maste static int 583d30c739cSEd Maste lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 584d30c739cSEd Maste { 585d30c739cSEd Maste int err; 586d30c739cSEd Maste uint32_t val; 587d30c739cSEd Maste 588d30c739cSEd Maste muge_dbg_printf(sc, 589d30c739cSEd Maste "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 590d30c739cSEd Maste addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 591d30c739cSEd Maste 592d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 593d30c739cSEd Maste 594d30c739cSEd Maste val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 59548bc1758SEd Maste if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 596d30c739cSEd Maste goto done; 597d30c739cSEd Maste 598d30c739cSEd Maste val = (addr[5] << 8) | addr[4]; 59948bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 600d30c739cSEd Maste 601d30c739cSEd Maste done: 602d30c739cSEd Maste return (err); 603d30c739cSEd Maste } 604d30c739cSEd Maste 605d30c739cSEd Maste /** 606d30c739cSEd Maste * lan78xx_set_rx_max_frame_length 607d30c739cSEd Maste * @sc: driver soft context 608d30c739cSEd Maste * @size: pointer to array contain at least 6 bytes of the mac 609d30c739cSEd Maste * 610d30c739cSEd Maste * Sets the maximum frame length to be received. Frames bigger than 611d30c739cSEd Maste * this size are aborted. 612d30c739cSEd Maste * 613d30c739cSEd Maste * RETURNS: 614d30c739cSEd Maste * Returns 0 on success or a negative error code. 615d30c739cSEd Maste */ 616d30c739cSEd Maste static int 617d30c739cSEd Maste lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 618d30c739cSEd Maste { 619d30c739cSEd Maste int err = 0; 620d30c739cSEd Maste uint32_t buf; 621d30c739cSEd Maste bool rxenabled; 622d30c739cSEd Maste 623e5151258SEd Maste /* First we have to disable rx before changing the length. */ 62448bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 62548bc1758SEd Maste rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 626d30c739cSEd Maste 627d30c739cSEd Maste if (rxenabled) { 62848bc1758SEd Maste buf &= ~ETH_MAC_RX_EN_; 62948bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 630d30c739cSEd Maste } 631d30c739cSEd Maste 632e5151258SEd Maste /* Setting max frame length. */ 63348bc1758SEd Maste buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 63448bc1758SEd Maste buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 63548bc1758SEd Maste ETH_MAC_RX_MAX_FR_SIZE_MASK_); 63648bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 637d30c739cSEd Maste 638d30c739cSEd Maste /* If it were enabled before, we enable it back. */ 639d30c739cSEd Maste 640d30c739cSEd Maste if (rxenabled) { 64148bc1758SEd Maste buf |= ETH_MAC_RX_EN_; 64248bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 643d30c739cSEd Maste } 644d30c739cSEd Maste 645e5151258SEd Maste return (0); 646d30c739cSEd Maste } 647d30c739cSEd Maste 648d30c739cSEd Maste /** 649d30c739cSEd Maste * lan78xx_miibus_readreg - Read a MII/MDIO register 650d30c739cSEd Maste * @dev: usb ether device 651d30c739cSEd Maste * @phy: the number of phy reading from 652d30c739cSEd Maste * @reg: the register address 653d30c739cSEd Maste * 654d30c739cSEd Maste * LOCKING: 655d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 656d30c739cSEd Maste * 657d30c739cSEd Maste * RETURNS: 658d30c739cSEd Maste * Returns the 16-bits read from the MII register, if this function fails 659d30c739cSEd Maste * 0 is returned. 660d30c739cSEd Maste */ 661d30c739cSEd Maste static int 662d30c739cSEd Maste lan78xx_miibus_readreg(device_t dev, int phy, int reg) { 663d30c739cSEd Maste 664d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 665d30c739cSEd Maste int locked; 666d30c739cSEd Maste uint32_t addr, val; 667d30c739cSEd Maste 668d30c739cSEd Maste val = 0; 669d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 670d30c739cSEd Maste if (!locked) 671d30c739cSEd Maste MUGE_LOCK(sc); 672d30c739cSEd Maste 67348bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 67448bc1758SEd Maste 0) { 675d30c739cSEd Maste muge_warn_printf(sc, "MII is busy\n"); 676d30c739cSEd Maste goto done; 677d30c739cSEd Maste } 678d30c739cSEd Maste 67948bc1758SEd Maste addr = (phy << 11) | (reg << 6) | 68048bc1758SEd Maste ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 68148bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_ACC, addr); 682d30c739cSEd Maste 68348bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 68448bc1758SEd Maste 0) { 685d30c739cSEd Maste muge_warn_printf(sc, "MII read timeout\n"); 686d30c739cSEd Maste goto done; 687d30c739cSEd Maste } 688d30c739cSEd Maste 68948bc1758SEd Maste lan78xx_read_reg(sc, ETH_MII_DATA, &val); 690d30c739cSEd Maste val = le32toh(val); 691d30c739cSEd Maste 692d30c739cSEd Maste done: 693d30c739cSEd Maste if (!locked) 694d30c739cSEd Maste MUGE_UNLOCK(sc); 695d30c739cSEd Maste 696d30c739cSEd Maste return (val & 0xFFFF); 697d30c739cSEd Maste } 698d30c739cSEd Maste 699d30c739cSEd Maste /** 700d30c739cSEd Maste * lan78xx_miibus_writereg - Writes a MII/MDIO register 701d30c739cSEd Maste * @dev: usb ether device 702d30c739cSEd Maste * @phy: the number of phy writing to 703d30c739cSEd Maste * @reg: the register address 704d30c739cSEd Maste * @val: the value to write 705d30c739cSEd Maste * 706d30c739cSEd Maste * Attempts to write a PHY register through the usb controller registers. 707d30c739cSEd Maste * 708d30c739cSEd Maste * LOCKING: 709d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 710d30c739cSEd Maste * 711d30c739cSEd Maste * RETURNS: 712d30c739cSEd Maste * Always returns 0 regardless of success or failure. 713d30c739cSEd Maste */ 714d30c739cSEd Maste static int 715d30c739cSEd Maste lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 716d30c739cSEd Maste { 717d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 718d30c739cSEd Maste int locked; 719d30c739cSEd Maste uint32_t addr; 720d30c739cSEd Maste 721d30c739cSEd Maste if (sc->sc_phyno != phy) 722d30c739cSEd Maste return (0); 723d30c739cSEd Maste 724d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 725d30c739cSEd Maste if (!locked) 726d30c739cSEd Maste MUGE_LOCK(sc); 727d30c739cSEd Maste 72848bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 72948bc1758SEd Maste 0) { 730d30c739cSEd Maste muge_warn_printf(sc, "MII is busy\n"); 731d30c739cSEd Maste goto done; 732d30c739cSEd Maste } 733d30c739cSEd Maste 734d30c739cSEd Maste val = htole32(val); 73548bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_DATA, val); 736d30c739cSEd Maste 737e5151258SEd Maste addr = (phy << 11) | (reg << 6) | 738e5151258SEd Maste ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 73948bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_ACC, addr); 740d30c739cSEd Maste 74148bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 742d30c739cSEd Maste muge_warn_printf(sc, "MII write timeout\n"); 743d30c739cSEd Maste 744d30c739cSEd Maste done: 745d30c739cSEd Maste if (!locked) 746d30c739cSEd Maste MUGE_UNLOCK(sc); 747d30c739cSEd Maste return (0); 748d30c739cSEd Maste } 749d30c739cSEd Maste 750d30c739cSEd Maste /* 751d30c739cSEd Maste * lan78xx_miibus_statchg - Called to detect phy status change 752d30c739cSEd Maste * @dev: usb ether device 753d30c739cSEd Maste * 754d30c739cSEd Maste * This function is called periodically by the system to poll for status 755d30c739cSEd Maste * changes of the link. 756d30c739cSEd Maste * 757d30c739cSEd Maste * LOCKING: 758d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 759d30c739cSEd Maste */ 760d30c739cSEd Maste static void 761d30c739cSEd Maste lan78xx_miibus_statchg(device_t dev) 762d30c739cSEd Maste { 763d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 764d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 765d30c739cSEd Maste struct ifnet *ifp; 766d30c739cSEd Maste int locked; 767d30c739cSEd Maste int err; 768d30c739cSEd Maste uint32_t flow = 0; 769d30c739cSEd Maste uint32_t fct_flow = 0; 770d30c739cSEd Maste 771d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 772d30c739cSEd Maste if (!locked) 773d30c739cSEd Maste MUGE_LOCK(sc); 774d30c739cSEd Maste 775d30c739cSEd Maste ifp = uether_getifp(&sc->sc_ue); 776d30c739cSEd Maste if (mii == NULL || ifp == NULL || 777d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 778d30c739cSEd Maste goto done; 779d30c739cSEd Maste 780d30c739cSEd Maste /* Use the MII status to determine link status */ 781d30c739cSEd Maste sc->sc_flags &= ~MUGE_FLAG_LINK; 782d30c739cSEd Maste if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 783d30c739cSEd Maste (IFM_ACTIVE | IFM_AVALID)) { 784d30c739cSEd Maste muge_dbg_printf(sc, "media is active\n"); 785d30c739cSEd Maste switch (IFM_SUBTYPE(mii->mii_media_active)) { 786d30c739cSEd Maste case IFM_10_T: 787d30c739cSEd Maste case IFM_100_TX: 788d30c739cSEd Maste sc->sc_flags |= MUGE_FLAG_LINK; 789d30c739cSEd Maste muge_dbg_printf(sc, "10/100 ethernet\n"); 790d30c739cSEd Maste break; 791d30c739cSEd Maste case IFM_1000_T: 792d30c739cSEd Maste sc->sc_flags |= MUGE_FLAG_LINK; 793d30c739cSEd Maste muge_dbg_printf(sc, "Gigabit ethernet\n"); 794d30c739cSEd Maste break; 795d30c739cSEd Maste default: 796d30c739cSEd Maste break; 797d30c739cSEd Maste } 798d30c739cSEd Maste } 799d30c739cSEd Maste /* Lost link, do nothing. */ 800d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 801d30c739cSEd Maste muge_dbg_printf(sc, "link flag not set\n"); 802d30c739cSEd Maste goto done; 803d30c739cSEd Maste } 804d30c739cSEd Maste 80548bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 806d30c739cSEd Maste if (err) { 807d30c739cSEd Maste muge_warn_printf(sc, 808d30c739cSEd Maste "failed to read initial flow control thresholds, error %d\n", 809d30c739cSEd Maste err); 810d30c739cSEd Maste goto done; 811d30c739cSEd Maste } 812d30c739cSEd Maste 813e5151258SEd Maste /* Enable/disable full duplex operation and TX/RX pause. */ 814d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 815d30c739cSEd Maste muge_dbg_printf(sc, "full duplex operation\n"); 816d30c739cSEd Maste 817e5151258SEd Maste /* Enable transmit MAC flow control function. */ 818d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 81948bc1758SEd Maste flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 820d30c739cSEd Maste 821d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 82248bc1758SEd Maste flow |= ETH_FLOW_CR_RX_FCEN_; 823d30c739cSEd Maste } 824d30c739cSEd Maste 825e5151258SEd Maste /* XXX Flow control settings obtained from Microchip's driver. */ 826d30c739cSEd Maste switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 827d30c739cSEd Maste case USB_SPEED_SUPER: 828e5151258SEd Maste fct_flow = 0x817; 829d30c739cSEd Maste break; 830d30c739cSEd Maste case USB_SPEED_HIGH: 831e5151258SEd Maste fct_flow = 0x211; 832d30c739cSEd Maste break; 833d30c739cSEd Maste default: 834d30c739cSEd Maste break; 835d30c739cSEd Maste } 836d30c739cSEd Maste 83748bc1758SEd Maste err += lan78xx_write_reg(sc, ETH_FLOW, flow); 83848bc1758SEd Maste err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 839d30c739cSEd Maste if (err) 840d30c739cSEd Maste muge_warn_printf(sc, "media change failed, error %d\n", err); 841d30c739cSEd Maste 842d30c739cSEd Maste done: 843d30c739cSEd Maste if (!locked) 844d30c739cSEd Maste MUGE_UNLOCK(sc); 845d30c739cSEd Maste } 846d30c739cSEd Maste 847d30c739cSEd Maste /* 848d30c739cSEd Maste * lan78xx_set_mdix_auto - Configure the device to enable automatic 849d30c739cSEd Maste * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 850d30c739cSEd Maste * functionality for seamless crossover and polarity detection. 851d30c739cSEd Maste * 852d30c739cSEd Maste * @sc: driver soft context 853d30c739cSEd Maste * 854d30c739cSEd Maste * LOCKING: 855d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 856d30c739cSEd Maste */ 857d30c739cSEd Maste static void 858d30c739cSEd Maste lan78xx_set_mdix_auto(struct muge_softc *sc) 859d30c739cSEd Maste { 860d30c739cSEd Maste uint32_t buf, err; 861d30c739cSEd Maste 862d30c739cSEd Maste err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 863d30c739cSEd Maste MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 864d30c739cSEd Maste 865d30c739cSEd Maste buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 866d30c739cSEd Maste MUGE_EXT_MODE_CTRL); 867d30c739cSEd Maste buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 868d30c739cSEd Maste buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 869d30c739cSEd Maste 870d30c739cSEd Maste lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 871d30c739cSEd Maste err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 872d30c739cSEd Maste MUGE_EXT_MODE_CTRL, buf); 873d30c739cSEd Maste 874d30c739cSEd Maste err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 875d30c739cSEd Maste MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 876d30c739cSEd Maste 877d30c739cSEd Maste if (err != 0) 878d30c739cSEd Maste muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 879d30c739cSEd Maste 880d30c739cSEd Maste sc->sc_mdix_ctl = buf; 881d30c739cSEd Maste } 882d30c739cSEd Maste 883d30c739cSEd Maste /** 884d30c739cSEd Maste * lan78xx_phy_init - Initialises the in-built MUGE phy 885d30c739cSEd Maste * @sc: driver soft context 886d30c739cSEd Maste * 887d30c739cSEd Maste * Resets the PHY part of the chip and then initialises it to default 888d30c739cSEd Maste * values. The 'link down' and 'auto-negotiation complete' interrupts 889d30c739cSEd Maste * from the PHY are also enabled, however we don't monitor the interrupt 890d30c739cSEd Maste * endpoints for the moment. 891d30c739cSEd Maste * 892d30c739cSEd Maste * RETURNS: 893d30c739cSEd Maste * Returns 0 on success or EIO if failed to reset the PHY. 894d30c739cSEd Maste */ 895d30c739cSEd Maste static int 896d30c739cSEd Maste lan78xx_phy_init(struct muge_softc *sc) 897d30c739cSEd Maste { 898d30c739cSEd Maste muge_dbg_printf(sc, "Initializing PHY.\n"); 89903dec173SEd Maste uint16_t bmcr, lmsr; 900d30c739cSEd Maste usb_ticks_t start_ticks; 90160ce15edSEd Maste uint32_t hw_reg; 902d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 903d30c739cSEd Maste 904d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 905d30c739cSEd Maste 906e5151258SEd Maste /* Reset phy and wait for reset to complete. */ 907d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 908d30c739cSEd Maste BMCR_RESET); 909d30c739cSEd Maste 910d30c739cSEd Maste start_ticks = ticks; 911d30c739cSEd Maste do { 912d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 913d30c739cSEd Maste bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 914d30c739cSEd Maste MII_BMCR); 915d30c739cSEd Maste } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 916d30c739cSEd Maste 917d30c739cSEd Maste if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 918d30c739cSEd Maste muge_err_printf(sc, "PHY reset timed-out\n"); 919d30c739cSEd Maste return (EIO); 920d30c739cSEd Maste } 921d30c739cSEd Maste 922d30c739cSEd Maste /* Setup phy to interrupt upon link down or autoneg completion. */ 923d30c739cSEd Maste lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 924d30c739cSEd Maste MUGE_PHY_INTR_STAT); 925d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 926d30c739cSEd Maste MUGE_PHY_INTR_MASK, 927d30c739cSEd Maste (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 928d30c739cSEd Maste 929d30c739cSEd Maste /* Enable Auto-MDIX for crossover and polarity detection. */ 930d30c739cSEd Maste lan78xx_set_mdix_auto(sc); 931d30c739cSEd Maste 932d30c739cSEd Maste /* Enable all modes. */ 933d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 934d30c739cSEd Maste ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 935d30c739cSEd Maste ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 936d30c739cSEd Maste 937e5151258SEd Maste /* Restart auto-negotation. */ 938d30c739cSEd Maste bmcr |= BMCR_STARTNEG; 939d30c739cSEd Maste bmcr |= BMCR_AUTOEN; 940d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 941d30c739cSEd Maste bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 94260ce15edSEd Maste 94303dec173SEd Maste /* Configure LED Modes. */ 9442c597054SIan Lepore if (sc->sc_led_modes_mask != 0) { 94503dec173SEd Maste lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 94603dec173SEd Maste MUGE_PHY_LED_MODE); 9472c597054SIan Lepore lmsr &= ~sc->sc_led_modes_mask; 94803dec173SEd Maste lmsr |= sc->sc_led_modes; 94903dec173SEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 95003dec173SEd Maste MUGE_PHY_LED_MODE, lmsr); 95103dec173SEd Maste } 95203dec173SEd Maste 95360ce15edSEd Maste /* Enable appropriate LEDs. */ 95460ce15edSEd Maste if (sc->sc_leds != 0 && 95560ce15edSEd Maste lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 95660ce15edSEd Maste hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 95760ce15edSEd Maste ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 95860ce15edSEd Maste hw_reg |= sc->sc_leds; 95960ce15edSEd Maste lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 96060ce15edSEd Maste } 961d30c739cSEd Maste return (0); 962d30c739cSEd Maste } 963d30c739cSEd Maste 964d30c739cSEd Maste /** 965d30c739cSEd Maste * lan78xx_chip_init - Initialises the chip after power on 966d30c739cSEd Maste * @sc: driver soft context 967d30c739cSEd Maste * 968d30c739cSEd Maste * This initialisation sequence is modelled on the procedure in the Linux 969d30c739cSEd Maste * driver. 970d30c739cSEd Maste * 971d30c739cSEd Maste * RETURNS: 972d30c739cSEd Maste * Returns 0 on success or an error code on failure. 973d30c739cSEd Maste */ 974d30c739cSEd Maste static int 975d30c739cSEd Maste lan78xx_chip_init(struct muge_softc *sc) 976d30c739cSEd Maste { 977d30c739cSEd Maste int err; 978d30c739cSEd Maste uint32_t buf; 979d30c739cSEd Maste uint32_t burst_cap; 980d30c739cSEd Maste 981097f721bSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 982d30c739cSEd Maste 983e5151258SEd Maste /* Enter H/W config mode. */ 98448bc1758SEd Maste lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 985d30c739cSEd Maste 98648bc1758SEd Maste if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 98748bc1758SEd Maste 0) { 988d30c739cSEd Maste muge_warn_printf(sc, 989d30c739cSEd Maste "timed-out waiting for lite reset to complete\n"); 990d30c739cSEd Maste goto init_failed; 991d30c739cSEd Maste } 992d30c739cSEd Maste 993e5151258SEd Maste /* Set the mac address. */ 994d30c739cSEd Maste if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 995d30c739cSEd Maste muge_warn_printf(sc, "failed to set the MAC address\n"); 996d30c739cSEd Maste goto init_failed; 997d30c739cSEd Maste } 998d30c739cSEd Maste 999e5151258SEd Maste /* Read and display the revision register. */ 100003ba5353SEd Maste if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 100148bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 100248bc1758SEd Maste err); 1003d30c739cSEd Maste goto init_failed; 1004d30c739cSEd Maste } 100503ba5353SEd Maste sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 100603ba5353SEd Maste sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 10072d14fb8bSEd Maste switch (sc->chipid) { 10082d14fb8bSEd Maste case ETH_ID_REV_CHIP_ID_7800_: 10092d14fb8bSEd Maste case ETH_ID_REV_CHIP_ID_7850_: 10102d14fb8bSEd Maste break; 10112d14fb8bSEd Maste default: 101203ba5353SEd Maste muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 101303ba5353SEd Maste sc->chipid); 101403ba5353SEd Maste goto init_failed; 101503ba5353SEd Maste } 101603ba5353SEd Maste device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 101703ba5353SEd Maste sc->chiprev); 1018d30c739cSEd Maste 1019d30c739cSEd Maste /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 102048bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 102148bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1022d30c739cSEd Maste goto init_failed; 1023d30c739cSEd Maste } 102448bc1758SEd Maste buf |= ETH_USB_CFG_BIR_; 102548bc1758SEd Maste lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1026d30c739cSEd Maste 1027d30c739cSEd Maste /* 1028e5151258SEd Maste * XXX LTM support will go here. 1029d30c739cSEd Maste */ 1030d30c739cSEd Maste 1031d30c739cSEd Maste /* Configuring the burst cap. */ 1032d30c739cSEd Maste switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1033d30c739cSEd Maste case USB_SPEED_SUPER: 1034d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1035d30c739cSEd Maste break; 1036d30c739cSEd Maste case USB_SPEED_HIGH: 1037d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1038d30c739cSEd Maste break; 1039d30c739cSEd Maste default: 1040d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1041d30c739cSEd Maste } 1042d30c739cSEd Maste 104348bc1758SEd Maste lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1044d30c739cSEd Maste 1045e5151258SEd Maste /* Set the default bulk in delay (same value from Linux driver). */ 104648bc1758SEd Maste lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1047d30c739cSEd Maste 1048e5151258SEd Maste /* Multiple ethernet frames per USB packets. */ 104948bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 105048bc1758SEd Maste buf |= ETH_HW_CFG_MEF_; 105148bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1052d30c739cSEd Maste 1053d30c739cSEd Maste /* Enable burst cap. */ 105448bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 105548bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1056d30c739cSEd Maste err); 1057d30c739cSEd Maste goto init_failed; 1058d30c739cSEd Maste } 105948bc1758SEd Maste buf |= ETH_USB_CFG_BCE_; 106048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1061d30c739cSEd Maste 1062d30c739cSEd Maste /* 1063d30c739cSEd Maste * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1064d30c739cSEd Maste * already the default value. But we initialize it to the same value 1065d30c739cSEd Maste * anyways, as that's what the Linux driver does. 1066d30c739cSEd Maste * 1067d30c739cSEd Maste */ 1068d30c739cSEd Maste buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 106948bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1070d30c739cSEd Maste 1071d30c739cSEd Maste buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 107248bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1073d30c739cSEd Maste 1074d30c739cSEd Maste /* Enabling interrupts. (Not using them for now) */ 107548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1076d30c739cSEd Maste 1077d30c739cSEd Maste /* 1078d30c739cSEd Maste * Initializing flow control registers to 0. These registers are 1079d30c739cSEd Maste * properly set is handled in link-reset function in the Linux driver. 1080d30c739cSEd Maste */ 108148bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FLOW, 0); 108248bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1083d30c739cSEd Maste 1084d30c739cSEd Maste /* 1085d30c739cSEd Maste * Settings for the RFE, we enable broadcast and destination address 1086d30c739cSEd Maste * perfect filtering. 1087d30c739cSEd Maste */ 108848bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 108948bc1758SEd Maste buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 109048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1091d30c739cSEd Maste 1092d30c739cSEd Maste /* 1093d30c739cSEd Maste * At this point the Linux driver writes multicast tables, and enables 1094d30c739cSEd Maste * checksum engines. But in FreeBSD that gets done in muge_init, 1095d30c739cSEd Maste * which gets called when the interface is brought up. 1096d30c739cSEd Maste */ 1097d30c739cSEd Maste 1098d30c739cSEd Maste /* Reset the PHY. */ 109948bc1758SEd Maste lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 110048bc1758SEd Maste if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 110148bc1758SEd Maste ETH_PMT_CTL_PHY_RST_)) != 0) { 1102d30c739cSEd Maste muge_warn_printf(sc, 1103d30c739cSEd Maste "timed-out waiting for phy reset to complete\n"); 1104d30c739cSEd Maste goto init_failed; 1105d30c739cSEd Maste } 1106d30c739cSEd Maste 110748bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 11082d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 11092d14fb8bSEd Maste !lan78xx_eeprom_present(sc)) { 11102d14fb8bSEd Maste /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 111148bc1758SEd Maste buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 11122d14fb8bSEd Maste } 111348bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1114d30c739cSEd Maste 1115d30c739cSEd Maste /* 1116d30c739cSEd Maste * Enable PHY interrupts (Not really getting used for now) 111748bc1758SEd Maste * ETH_INT_EP_CTL: interrupt endpoint control register 1118d30c739cSEd Maste * phy events cause interrupts to be issued 1119d30c739cSEd Maste */ 112048bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 112148bc1758SEd Maste buf |= ETH_INT_ENP_PHY_INT; 112248bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1123d30c739cSEd Maste 1124d30c739cSEd Maste /* 1125d30c739cSEd Maste * Enables mac's transmitter. It will transmit frames from the buffer 1126d30c739cSEd Maste * onto the cable. 1127d30c739cSEd Maste */ 112848bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 112948bc1758SEd Maste buf |= ETH_MAC_TX_TXEN_; 113048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1131d30c739cSEd Maste 1132e5151258SEd Maste /* FIFO is capable of transmitting frames to MAC. */ 113348bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 113448bc1758SEd Maste buf |= ETH_FCT_TX_CTL_EN_; 113548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1136d30c739cSEd Maste 1137d30c739cSEd Maste /* 1138d30c739cSEd Maste * Set max frame length. In linux this is dev->mtu (which by default 1139e5151258SEd Maste * is 1500) + VLAN_ETH_HLEN = 1518. 1140d30c739cSEd Maste */ 1141d30c739cSEd Maste err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1142d30c739cSEd Maste 1143e5151258SEd Maste /* Initialise the PHY. */ 1144d30c739cSEd Maste if ((err = lan78xx_phy_init(sc)) != 0) 1145d30c739cSEd Maste goto init_failed; 1146d30c739cSEd Maste 1147e5151258SEd Maste /* Enable MAC RX. */ 114848bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 114948bc1758SEd Maste buf |= ETH_MAC_RX_EN_; 115048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1151d30c739cSEd Maste 1152e5151258SEd Maste /* Enable FIFO controller RX. */ 115348bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 115448bc1758SEd Maste buf |= ETH_FCT_TX_CTL_EN_; 115548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1156d30c739cSEd Maste 115749b2a5feSEd Maste sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1158e5151258SEd Maste return (0); 1159d30c739cSEd Maste 1160d30c739cSEd Maste init_failed: 1161d30c739cSEd Maste muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1162d30c739cSEd Maste return (err); 1163d30c739cSEd Maste } 1164d30c739cSEd Maste 1165d30c739cSEd Maste static void 1166d30c739cSEd Maste muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1167d30c739cSEd Maste { 1168d30c739cSEd Maste struct muge_softc *sc = usbd_xfer_softc(xfer); 1169d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 1170d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 1171d30c739cSEd Maste struct mbuf *m; 1172d30c739cSEd Maste struct usb_page_cache *pc; 1173d30c739cSEd Maste uint16_t pktlen; 1174d30c739cSEd Maste uint32_t rx_cmd_a, rx_cmd_b; 1175d30c739cSEd Maste uint16_t rx_cmd_c; 1176d30c739cSEd Maste int off; 1177d30c739cSEd Maste int actlen; 1178d30c739cSEd Maste 1179d30c739cSEd Maste usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1180d30c739cSEd Maste muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1181d30c739cSEd Maste 1182d30c739cSEd Maste switch (USB_GET_STATE(xfer)) { 1183d30c739cSEd Maste case USB_ST_TRANSFERRED: 1184d30c739cSEd Maste 1185d30c739cSEd Maste /* 1186d30c739cSEd Maste * There is always a zero length frame after bringing the 1187d30c739cSEd Maste * interface up. 1188d30c739cSEd Maste */ 1189d30c739cSEd Maste if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1190d30c739cSEd Maste goto tr_setup; 1191d30c739cSEd Maste 1192d30c739cSEd Maste /* 1193d30c739cSEd Maste * There may be multiple packets in the USB frame. Each will 1194d30c739cSEd Maste * have a header and each needs to have its own mbuf allocated 1195d30c739cSEd Maste * and populated for it. 1196d30c739cSEd Maste */ 1197d30c739cSEd Maste pc = usbd_xfer_get_frame(xfer, 0); 1198d30c739cSEd Maste off = 0; 1199d30c739cSEd Maste 1200d30c739cSEd Maste while (off < actlen) { 1201d30c739cSEd Maste 1202d30c739cSEd Maste /* The frame header is aligned on a 4 byte boundary. */ 1203d30c739cSEd Maste off = ((off + 0x3) & ~0x3); 1204d30c739cSEd Maste 1205d30c739cSEd Maste /* Extract RX CMD A. */ 1206d30c739cSEd Maste if (off + sizeof(rx_cmd_a) > actlen) 1207d30c739cSEd Maste goto tr_setup; 1208d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1209d30c739cSEd Maste off += (sizeof(rx_cmd_a)); 1210d30c739cSEd Maste rx_cmd_a = le32toh(rx_cmd_a); 1211d30c739cSEd Maste 1212d30c739cSEd Maste 1213d30c739cSEd Maste /* Extract RX CMD B. */ 1214d30c739cSEd Maste if (off + sizeof(rx_cmd_b) > actlen) 1215d30c739cSEd Maste goto tr_setup; 1216d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1217d30c739cSEd Maste off += (sizeof(rx_cmd_b)); 1218d30c739cSEd Maste rx_cmd_b = le32toh(rx_cmd_b); 1219d30c739cSEd Maste 1220d30c739cSEd Maste 1221d30c739cSEd Maste /* Extract RX CMD C. */ 1222d30c739cSEd Maste if (off + sizeof(rx_cmd_c) > actlen) 1223d30c739cSEd Maste goto tr_setup; 1224d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1225d30c739cSEd Maste off += (sizeof(rx_cmd_c)); 1226a99020fbSKevin Lo rx_cmd_c = le16toh(rx_cmd_c); 1227d30c739cSEd Maste 1228d30c739cSEd Maste if (off > actlen) 1229d30c739cSEd Maste goto tr_setup; 1230d30c739cSEd Maste 1231d30c739cSEd Maste pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1232d30c739cSEd Maste 1233d30c739cSEd Maste muge_dbg_printf(sc, 1234d30c739cSEd Maste "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1235d30c739cSEd Maste " pktlen %d actlen %d off %d\n", 1236d30c739cSEd Maste rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1237d30c739cSEd Maste 1238d30c739cSEd Maste if (rx_cmd_a & RX_CMD_A_RED_) { 1239d30c739cSEd Maste muge_dbg_printf(sc, 1240d30c739cSEd Maste "rx error (hdr 0x%08x)\n", rx_cmd_a); 1241d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1242d30c739cSEd Maste } else { 1243d30c739cSEd Maste /* Ethernet frame too big or too small? */ 1244d30c739cSEd Maste if ((pktlen < ETHER_HDR_LEN) || 1245d30c739cSEd Maste (pktlen > (actlen - off))) 1246d30c739cSEd Maste goto tr_setup; 1247d30c739cSEd Maste 1248e5151258SEd Maste /* Create a new mbuf to store the packet. */ 1249d30c739cSEd Maste m = uether_newbuf(); 1250d30c739cSEd Maste if (m == NULL) { 1251d30c739cSEd Maste muge_warn_printf(sc, 1252d30c739cSEd Maste "failed to create new mbuf\n"); 1253d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1254d30c739cSEd Maste 1); 1255d30c739cSEd Maste goto tr_setup; 1256d30c739cSEd Maste } 1257d30c739cSEd Maste 1258d30c739cSEd Maste usbd_copy_out(pc, off, mtod(m, uint8_t *), 1259d30c739cSEd Maste pktlen); 1260d30c739cSEd Maste 1261d30c739cSEd Maste /* 1262d30c739cSEd Maste * Check if RX checksums are computed, and 1263d30c739cSEd Maste * offload them 1264d30c739cSEd Maste */ 1265fa078712SEd Maste if ((ifp->if_capenable & IFCAP_RXCSUM) && 1266d30c739cSEd Maste !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1267d30c739cSEd Maste struct ether_header *eh; 1268d30c739cSEd Maste eh = mtod(m, struct ether_header *); 1269d30c739cSEd Maste /* 1270d30c739cSEd Maste * Remove the extra 2 bytes of the csum 1271d30c739cSEd Maste * 1272d30c739cSEd Maste * The checksum appears to be 1273d30c739cSEd Maste * simplistically calculated over the 1274d30c739cSEd Maste * protocol headers up to the end of the 1275d30c739cSEd Maste * eth frame. Which means if the eth 1276d30c739cSEd Maste * frame is padded the csum calculation 1277d30c739cSEd Maste * is incorrectly performed over the 1278d30c739cSEd Maste * padding bytes as well. Therefore to 1279d30c739cSEd Maste * be safe we ignore the H/W csum on 1280d30c739cSEd Maste * frames less than or equal to 1281d30c739cSEd Maste * 64 bytes. 1282d30c739cSEd Maste * 1283d30c739cSEd Maste * Protocols checksummed: 1284d30c739cSEd Maste * TCP, UDP, ICMP, IGMP, IP 1285d30c739cSEd Maste */ 1286d30c739cSEd Maste if (pktlen > ETHER_MIN_LEN) { 1287d30c739cSEd Maste m->m_pkthdr.csum_flags |= 1288*bec8faadSEd Maste CSUM_DATA_VALID | 1289*bec8faadSEd Maste CSUM_PSEUDO_HDR; 1290d30c739cSEd Maste 1291d30c739cSEd Maste /* 1292d30c739cSEd Maste * Copy the checksum from the 1293d30c739cSEd Maste * last 2 bytes of the transfer 1294d30c739cSEd Maste * and put in the csum_data 1295d30c739cSEd Maste * field. 1296d30c739cSEd Maste */ 1297d30c739cSEd Maste usbd_copy_out(pc, 1298d30c739cSEd Maste (off + pktlen), 1299d30c739cSEd Maste &m->m_pkthdr.csum_data, 2); 1300d30c739cSEd Maste 1301d30c739cSEd Maste /* 1302d30c739cSEd Maste * The data is copied in network 1303d30c739cSEd Maste * order, but the csum algorithm 1304d30c739cSEd Maste * in the kernel expects it to 1305d30c739cSEd Maste * be in host network order. 1306d30c739cSEd Maste */ 1307d30c739cSEd Maste m->m_pkthdr.csum_data = 1308*bec8faadSEd Maste ntohs(0xffff); 1309d30c739cSEd Maste 1310d30c739cSEd Maste muge_dbg_printf(sc, 1311d30c739cSEd Maste "RX checksum offloaded (0x%04x)\n", 1312d30c739cSEd Maste m->m_pkthdr.csum_data); 1313d30c739cSEd Maste } 1314d30c739cSEd Maste } 1315d30c739cSEd Maste 1316d30c739cSEd Maste /* Enqueue the mbuf on the receive queue. */ 1317d30c739cSEd Maste if (pktlen < (4 + ETHER_HDR_LEN)) { 1318d30c739cSEd Maste m_freem(m); 1319d30c739cSEd Maste goto tr_setup; 1320d30c739cSEd Maste } 1321d30c739cSEd Maste /* Remove 4 trailing bytes */ 1322d30c739cSEd Maste uether_rxmbuf(ue, m, pktlen - 4); 1323d30c739cSEd Maste } 1324d30c739cSEd Maste 1325d30c739cSEd Maste /* 1326d30c739cSEd Maste * Update the offset to move to the next potential 1327d30c739cSEd Maste * packet. 1328d30c739cSEd Maste */ 1329d30c739cSEd Maste off += pktlen; 1330d30c739cSEd Maste } 1331d30c739cSEd Maste 1332d30c739cSEd Maste /* FALLTHROUGH */ 1333d30c739cSEd Maste case USB_ST_SETUP: 1334d30c739cSEd Maste tr_setup: 1335d30c739cSEd Maste usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1336d30c739cSEd Maste usbd_transfer_submit(xfer); 1337d30c739cSEd Maste uether_rxflush(ue); 1338d30c739cSEd Maste return; 1339d30c739cSEd Maste 1340d30c739cSEd Maste default: 1341d30c739cSEd Maste if (error != USB_ERR_CANCELLED) { 1342d30c739cSEd Maste muge_warn_printf(sc, "bulk read error, %s\n", 1343d30c739cSEd Maste usbd_errstr(error)); 1344d30c739cSEd Maste usbd_xfer_set_stall(xfer); 1345d30c739cSEd Maste goto tr_setup; 1346d30c739cSEd Maste } 1347d30c739cSEd Maste return; 1348d30c739cSEd Maste } 1349d30c739cSEd Maste } 1350d30c739cSEd Maste 1351d30c739cSEd Maste /** 1352d30c739cSEd Maste * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1353d30c739cSEd Maste * @xfer: the USB transfer 1354d30c739cSEd Maste * @error: error code if the transfers is in an errored state 1355d30c739cSEd Maste * 1356d30c739cSEd Maste * The main write function that pulls ethernet frames off the queue and 1357d30c739cSEd Maste * sends them out. 1358d30c739cSEd Maste * 1359d30c739cSEd Maste */ 1360d30c739cSEd Maste static void 1361d30c739cSEd Maste muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1362d30c739cSEd Maste { 1363d30c739cSEd Maste struct muge_softc *sc = usbd_xfer_softc(xfer); 1364d30c739cSEd Maste struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1365d30c739cSEd Maste struct usb_page_cache *pc; 1366d30c739cSEd Maste struct mbuf *m; 1367d30c739cSEd Maste int nframes; 1368d30c739cSEd Maste uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1369d30c739cSEd Maste 1370d30c739cSEd Maste switch (USB_GET_STATE(xfer)) { 1371d30c739cSEd Maste case USB_ST_TRANSFERRED: 1372d30c739cSEd Maste muge_dbg_printf(sc, 1373d30c739cSEd Maste "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1374d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1375d30c739cSEd Maste /* FALLTHROUGH */ 1376d30c739cSEd Maste case USB_ST_SETUP: 1377d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1378d30c739cSEd Maste tr_setup: 1379d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1380d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1381d30c739cSEd Maste muge_dbg_printf(sc, 1382d30c739cSEd Maste "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1383d30c739cSEd Maste (sc->sc_flags & MUGE_FLAG_LINK)); 1384d30c739cSEd Maste muge_dbg_printf(sc, 1385d30c739cSEd Maste "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1386d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1387d30c739cSEd Maste muge_dbg_printf(sc, 1388d30c739cSEd Maste "USB TRANSFER not sending: no link or controller is busy \n"); 1389d30c739cSEd Maste /* 1390d30c739cSEd Maste * Don't send anything if there is no link or 1391d30c739cSEd Maste * controller is busy. 1392d30c739cSEd Maste */ 1393d30c739cSEd Maste return; 1394d30c739cSEd Maste } 1395d30c739cSEd Maste for (nframes = 0; nframes < 16 && 1396d30c739cSEd Maste !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1397d30c739cSEd Maste IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1398d30c739cSEd Maste if (m == NULL) 1399d30c739cSEd Maste break; 1400d30c739cSEd Maste usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1401d30c739cSEd Maste nframes); 1402d30c739cSEd Maste frm_len = 0; 1403d30c739cSEd Maste pc = usbd_xfer_get_frame(xfer, nframes); 1404d30c739cSEd Maste 1405d30c739cSEd Maste /* 1406d30c739cSEd Maste * Each frame is prefixed with two 32-bit values 1407d30c739cSEd Maste * describing the length of the packet and buffer. 1408d30c739cSEd Maste */ 1409d30c739cSEd Maste tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1410d30c739cSEd Maste TX_CMD_A_FCS_; 1411d30c739cSEd Maste tx_cmd_a = htole32(tx_cmd_a); 1412d30c739cSEd Maste usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1413d30c739cSEd Maste 1414d30c739cSEd Maste tx_cmd_b = 0; 1415d30c739cSEd Maste 1416d30c739cSEd Maste /* TCP LSO Support will probably be implemented here. */ 1417d30c739cSEd Maste tx_cmd_b = htole32(tx_cmd_b); 1418d30c739cSEd Maste usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1419d30c739cSEd Maste 1420d30c739cSEd Maste frm_len += 8; 1421d30c739cSEd Maste 1422d30c739cSEd Maste /* Next copy in the actual packet */ 1423d30c739cSEd Maste usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1424d30c739cSEd Maste frm_len += m->m_pkthdr.len; 1425d30c739cSEd Maste 1426d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1427d30c739cSEd Maste 1428d30c739cSEd Maste /* 1429d30c739cSEd Maste * If there's a BPF listener, bounce a copy of this 1430d30c739cSEd Maste * frame to it. 1431d30c739cSEd Maste */ 1432d30c739cSEd Maste BPF_MTAP(ifp, m); 1433d30c739cSEd Maste m_freem(m); 1434d30c739cSEd Maste 1435d30c739cSEd Maste /* Set frame length. */ 1436d30c739cSEd Maste usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1437d30c739cSEd Maste } 1438d30c739cSEd Maste 1439d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1440d30c739cSEd Maste if (nframes != 0) { 1441d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1442d30c739cSEd Maste usbd_xfer_set_frames(xfer, nframes); 1443d30c739cSEd Maste usbd_transfer_submit(xfer); 1444d30c739cSEd Maste ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1445d30c739cSEd Maste } 1446d30c739cSEd Maste return; 1447d30c739cSEd Maste 1448d30c739cSEd Maste default: 1449d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1450d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1451d30c739cSEd Maste 1452d30c739cSEd Maste if (error != USB_ERR_CANCELLED) { 1453d30c739cSEd Maste muge_err_printf(sc, 1454d30c739cSEd Maste "usb error on tx: %s\n", usbd_errstr(error)); 1455d30c739cSEd Maste usbd_xfer_set_stall(xfer); 1456d30c739cSEd Maste goto tr_setup; 1457d30c739cSEd Maste } 1458d30c739cSEd Maste return; 1459d30c739cSEd Maste } 1460d30c739cSEd Maste } 1461d30c739cSEd Maste 1462b4872d67SOleksandr Tymoshenko /** 1463b4872d67SOleksandr Tymoshenko * muge_set_mac_addr - Initiailizes NIC MAC address 1464d30c739cSEd Maste * @ue: the USB ethernet device 1465d30c739cSEd Maste * 1466b4872d67SOleksandr Tymoshenko * Tries to obtain MAC address from number of sources: registers, 1467b4872d67SOleksandr Tymoshenko * EEPROM, DTB blob. If all sources fail - generates random MAC. 1468d30c739cSEd Maste */ 1469d30c739cSEd Maste static void 1470b4872d67SOleksandr Tymoshenko muge_set_mac_addr(struct usb_ether *ue) 1471d30c739cSEd Maste { 1472d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1473d30c739cSEd Maste uint32_t mac_h, mac_l; 1474d30c739cSEd Maste 1475d736b527SIan Lepore memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1476d30c739cSEd Maste 1477d30c739cSEd Maste uint32_t val; 1478d30c739cSEd Maste lan78xx_read_reg(sc, 0, &val); 1479d30c739cSEd Maste 1480e5151258SEd Maste /* Read current MAC address from RX_ADDRx registers. */ 148148bc1758SEd Maste if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 148248bc1758SEd Maste (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1483d736b527SIan Lepore ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1484d736b527SIan Lepore ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1485d736b527SIan Lepore ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1486d736b527SIan Lepore ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1487d736b527SIan Lepore ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1488d736b527SIan Lepore ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1489d30c739cSEd Maste } 1490d30c739cSEd Maste 1491a58040e7SIan Lepore /* 1492a58040e7SIan Lepore * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1493a58040e7SIan Lepore * doesn't work, try OTP. Whether any of these methods work or not, try 1494a58040e7SIan Lepore * FDT data, because it is allowed to override the EEPROM/OTP values. 1495a58040e7SIan Lepore */ 1496d736b527SIan Lepore if (ETHER_IS_VALID(ue->ue_eaddr)) { 1497b4872d67SOleksandr Tymoshenko muge_dbg_printf(sc, "MAC assigned from registers\n"); 1498a58040e7SIan Lepore } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1499a58040e7SIan Lepore ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1500a58040e7SIan Lepore ETHER_IS_VALID(ue->ue_eaddr)) { 1501a58040e7SIan Lepore muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1502a58040e7SIan Lepore } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1503a58040e7SIan Lepore ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1504a58040e7SIan Lepore muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1505b4872d67SOleksandr Tymoshenko } 1506b4872d67SOleksandr Tymoshenko 1507b4872d67SOleksandr Tymoshenko #ifdef FDT 150818dc4538SIan Lepore /* ue->ue_eaddr modified only if config exists for this dev instance. */ 150918dc4538SIan Lepore usb_fdt_get_mac_addr(ue->ue_dev, ue); 1510d736b527SIan Lepore if (ETHER_IS_VALID(ue->ue_eaddr)) { 1511a58040e7SIan Lepore muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1512b4872d67SOleksandr Tymoshenko } 1513b4872d67SOleksandr Tymoshenko #endif 1514b4872d67SOleksandr Tymoshenko 1515a58040e7SIan Lepore if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1516d30c739cSEd Maste muge_dbg_printf(sc, "MAC assigned randomly\n"); 1517d736b527SIan Lepore arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1518d736b527SIan Lepore ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1519d736b527SIan Lepore ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1520d30c739cSEd Maste } 1521a58040e7SIan Lepore } 1522b4872d67SOleksandr Tymoshenko 1523b4872d67SOleksandr Tymoshenko /** 152460ce15edSEd Maste * muge_set_leds - Initializes NIC LEDs pattern 152560ce15edSEd Maste * @ue: the USB ethernet device 152660ce15edSEd Maste * 152760ce15edSEd Maste * Tries to store the LED modes. 152860ce15edSEd Maste * Supports only DTB blob like the Linux driver does. 152960ce15edSEd Maste */ 153060ce15edSEd Maste static void 153160ce15edSEd Maste muge_set_leds(struct usb_ether *ue) 153260ce15edSEd Maste { 153360ce15edSEd Maste #ifdef FDT 15342c597054SIan Lepore struct muge_softc *sc = uether_getsc(ue); 153518dc4538SIan Lepore phandle_t node; 1536d736b527SIan Lepore pcell_t modes[4]; /* 4 LEDs are possible */ 153703dec173SEd Maste ssize_t proplen; 153860ce15edSEd Maste uint32_t count; 153960ce15edSEd Maste 154018dc4538SIan Lepore if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1541d736b527SIan Lepore (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1542d736b527SIan Lepore sizeof(modes))) > 0) { 154303dec173SEd Maste count = proplen / sizeof( uint32_t ); 154460ce15edSEd Maste sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 154560ce15edSEd Maste (count > 1) * ETH_HW_CFG_LED1_EN_ | 154660ce15edSEd Maste (count > 2) * ETH_HW_CFG_LED2_EN_ | 154760ce15edSEd Maste (count > 3) * ETH_HW_CFG_LED3_EN_; 154803dec173SEd Maste while (count-- > 0) { 1549d736b527SIan Lepore sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 15502c597054SIan Lepore sc->sc_led_modes_mask |= 0xf << (4 * count); 155103dec173SEd Maste } 155218dc4538SIan Lepore muge_dbg_printf(sc, "LED modes set from FDT data\n"); 155360ce15edSEd Maste } 155460ce15edSEd Maste #endif 155560ce15edSEd Maste } 155660ce15edSEd Maste 155760ce15edSEd Maste /** 1558b4872d67SOleksandr Tymoshenko * muge_attach_post - Called after the driver attached to the USB interface 1559b4872d67SOleksandr Tymoshenko * @ue: the USB ethernet device 1560b4872d67SOleksandr Tymoshenko * 1561b4872d67SOleksandr Tymoshenko * This is where the chip is intialised for the first time. This is 1562b4872d67SOleksandr Tymoshenko * different from the muge_init() function in that that one is designed to 1563b4872d67SOleksandr Tymoshenko * setup the H/W to match the UE settings and can be called after a reset. 1564b4872d67SOleksandr Tymoshenko * 1565b4872d67SOleksandr Tymoshenko */ 1566b4872d67SOleksandr Tymoshenko static void 1567b4872d67SOleksandr Tymoshenko muge_attach_post(struct usb_ether *ue) 1568b4872d67SOleksandr Tymoshenko { 1569b4872d67SOleksandr Tymoshenko struct muge_softc *sc = uether_getsc(ue); 1570b4872d67SOleksandr Tymoshenko 1571b4872d67SOleksandr Tymoshenko muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1572b4872d67SOleksandr Tymoshenko 1573b4872d67SOleksandr Tymoshenko /* Setup some of the basics */ 1574b4872d67SOleksandr Tymoshenko sc->sc_phyno = 1; 1575b4872d67SOleksandr Tymoshenko 1576b4872d67SOleksandr Tymoshenko muge_set_mac_addr(ue); 157760ce15edSEd Maste muge_set_leds(ue); 1578d30c739cSEd Maste 1579d30c739cSEd Maste /* Initialise the chip for the first time */ 1580d30c739cSEd Maste lan78xx_chip_init(sc); 1581d30c739cSEd Maste } 1582d30c739cSEd Maste 1583d30c739cSEd Maste /** 1584d30c739cSEd Maste * muge_attach_post_sub - Called after attach to the USB interface 1585d30c739cSEd Maste * @ue: the USB ethernet device 1586d30c739cSEd Maste * 1587d30c739cSEd Maste * Most of this is boilerplate code and copied from the base USB ethernet 1588d30c739cSEd Maste * driver. It has been overriden so that we can indicate to the system 1589d30c739cSEd Maste * that the chip supports H/W checksumming. 1590d30c739cSEd Maste * 1591d30c739cSEd Maste * RETURNS: 1592d30c739cSEd Maste * Returns 0 on success or a negative error code. 1593d30c739cSEd Maste */ 1594d30c739cSEd Maste static int 1595d30c739cSEd Maste muge_attach_post_sub(struct usb_ether *ue) 1596d30c739cSEd Maste { 1597d30c739cSEd Maste struct muge_softc *sc; 1598d30c739cSEd Maste struct ifnet *ifp; 1599d30c739cSEd Maste int error; 1600d30c739cSEd Maste 1601d30c739cSEd Maste sc = uether_getsc(ue); 1602d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1603d30c739cSEd Maste ifp = ue->ue_ifp; 1604d30c739cSEd Maste ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1605d30c739cSEd Maste ifp->if_start = uether_start; 1606d30c739cSEd Maste ifp->if_ioctl = muge_ioctl; 1607d30c739cSEd Maste ifp->if_init = uether_init; 1608d30c739cSEd Maste IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1609d30c739cSEd Maste ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1610d30c739cSEd Maste IFQ_SET_READY(&ifp->if_snd); 1611d30c739cSEd Maste 1612d30c739cSEd Maste /* 1613d30c739cSEd Maste * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1614d30c739cSEd Maste * however currently only RX checksum is supported in the driver 1615d30c739cSEd Maste * (see top of file). 1616d30c739cSEd Maste */ 161791c33ba3SEd Maste ifp->if_capabilities |= IFCAP_VLAN_MTU; 1618d30c739cSEd Maste ifp->if_hwassist = 0; 1619d30c739cSEd Maste if (MUGE_DEFAULT_RX_CSUM_ENABLE) 1620d30c739cSEd Maste ifp->if_capabilities |= IFCAP_RXCSUM; 1621d30c739cSEd Maste 1622d30c739cSEd Maste if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1623d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TXCSUM; 1624d30c739cSEd Maste 1625d30c739cSEd Maste /* 1626d30c739cSEd Maste * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1627d30c739cSEd Maste * here, that's something related to socket buffers used in Linux. 1628d30c739cSEd Maste * FreeBSD doesn't have that as an interface feature. 1629d30c739cSEd Maste */ 1630d30c739cSEd Maste if (MUGE_DEFAULT_TSO_CSUM_ENABLE) 1631d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1632d30c739cSEd Maste 1633d30c739cSEd Maste #if 0 1634d30c739cSEd Maste /* TX checksuming is disabled since not yet implemented. */ 1635d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TXCSUM; 1636d30c739cSEd Maste ifp->if_capenable |= IFCAP_TXCSUM; 1637d30c739cSEd Maste ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1638d30c739cSEd Maste #endif 1639d30c739cSEd Maste 1640d30c739cSEd Maste ifp->if_capenable = ifp->if_capabilities; 1641d30c739cSEd Maste 1642d30c739cSEd Maste mtx_lock(&Giant); 1643d30c739cSEd Maste error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1644d30c739cSEd Maste uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1645d30c739cSEd Maste BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1646d30c739cSEd Maste mtx_unlock(&Giant); 1647d30c739cSEd Maste 1648e5151258SEd Maste return (0); 1649d30c739cSEd Maste } 1650d30c739cSEd Maste 1651d30c739cSEd Maste /** 1652d30c739cSEd Maste * muge_start - Starts communication with the LAN78xx chip 1653d30c739cSEd Maste * @ue: USB ether interface 1654d30c739cSEd Maste */ 1655d30c739cSEd Maste static void 1656d30c739cSEd Maste muge_start(struct usb_ether *ue) 1657d30c739cSEd Maste { 1658d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1659d30c739cSEd Maste 1660d30c739cSEd Maste /* 1661d30c739cSEd Maste * Start the USB transfers, if not already started. 1662d30c739cSEd Maste */ 1663d30c739cSEd Maste usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1664d30c739cSEd Maste usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1665d30c739cSEd Maste } 1666d30c739cSEd Maste 1667d30c739cSEd Maste /** 1668d30c739cSEd Maste * muge_ioctl - ioctl function for the device 1669d30c739cSEd Maste * @ifp: interface pointer 1670d30c739cSEd Maste * @cmd: the ioctl command 1671d30c739cSEd Maste * @data: data passed in the ioctl call, typically a pointer to struct 1672d30c739cSEd Maste * ifreq. 1673d30c739cSEd Maste * 1674d30c739cSEd Maste * The ioctl routine is overridden to detect change requests for the H/W 1675d30c739cSEd Maste * checksum capabilities. 1676d30c739cSEd Maste * 1677d30c739cSEd Maste * RETURNS: 1678d30c739cSEd Maste * 0 on success and an error code on failure. 1679d30c739cSEd Maste */ 1680d30c739cSEd Maste static int 1681d30c739cSEd Maste muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1682d30c739cSEd Maste { 1683d30c739cSEd Maste struct usb_ether *ue = ifp->if_softc; 1684d30c739cSEd Maste struct muge_softc *sc; 1685d30c739cSEd Maste struct ifreq *ifr; 1686d30c739cSEd Maste int rc; 1687d30c739cSEd Maste int mask; 1688d30c739cSEd Maste int reinit; 1689d30c739cSEd Maste 1690d30c739cSEd Maste if (cmd == SIOCSIFCAP) { 1691d30c739cSEd Maste sc = uether_getsc(ue); 1692d30c739cSEd Maste ifr = (struct ifreq *)data; 1693d30c739cSEd Maste 1694d30c739cSEd Maste MUGE_LOCK(sc); 1695d30c739cSEd Maste 1696d30c739cSEd Maste rc = 0; 1697d30c739cSEd Maste reinit = 0; 1698d30c739cSEd Maste 1699d30c739cSEd Maste mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1700d30c739cSEd Maste 1701e5151258SEd Maste /* Modify the RX CSUM enable bits. */ 1702d30c739cSEd Maste if ((mask & IFCAP_RXCSUM) != 0 && 1703d30c739cSEd Maste (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1704d30c739cSEd Maste ifp->if_capenable ^= IFCAP_RXCSUM; 1705d30c739cSEd Maste 1706d30c739cSEd Maste if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1707d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1708d30c739cSEd Maste reinit = 1; 1709d30c739cSEd Maste } 1710d30c739cSEd Maste } 1711d30c739cSEd Maste 1712d30c739cSEd Maste MUGE_UNLOCK(sc); 1713d30c739cSEd Maste if (reinit) 1714d30c739cSEd Maste uether_init(ue); 1715d30c739cSEd Maste 1716d30c739cSEd Maste } else { 1717d30c739cSEd Maste rc = uether_ioctl(ifp, cmd, data); 1718d30c739cSEd Maste } 1719d30c739cSEd Maste 1720d30c739cSEd Maste return (rc); 1721d30c739cSEd Maste } 1722d30c739cSEd Maste 1723d30c739cSEd Maste /** 1724d30c739cSEd Maste * muge_reset - Reset the SMSC chip 1725d30c739cSEd Maste * @sc: device soft context 1726d30c739cSEd Maste * 1727d30c739cSEd Maste * LOCKING: 1728d30c739cSEd Maste * Should be called with the SMSC lock held. 1729d30c739cSEd Maste */ 1730d30c739cSEd Maste static void 1731d30c739cSEd Maste muge_reset(struct muge_softc *sc) 1732d30c739cSEd Maste { 1733d30c739cSEd Maste struct usb_config_descriptor *cd; 1734d30c739cSEd Maste usb_error_t err; 1735d30c739cSEd Maste 1736d30c739cSEd Maste cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1737d30c739cSEd Maste 1738d30c739cSEd Maste err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1739d30c739cSEd Maste cd->bConfigurationValue); 1740d30c739cSEd Maste if (err) 1741d30c739cSEd Maste muge_warn_printf(sc, "reset failed (ignored)\n"); 1742d30c739cSEd Maste 1743d30c739cSEd Maste /* Wait a little while for the chip to get its brains in order. */ 1744d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 1745d30c739cSEd Maste 1746d30c739cSEd Maste /* Reinitialize controller to achieve full reset. */ 1747d30c739cSEd Maste lan78xx_chip_init(sc); 1748d30c739cSEd Maste } 1749d30c739cSEd Maste 1750d30c739cSEd Maste /** 1751d30c739cSEd Maste * muge_set_addr_filter 1752d30c739cSEd Maste * 1753d30c739cSEd Maste * @sc: device soft context 1754d30c739cSEd Maste * @index: index of the entry to the perfect address table 1755d30c739cSEd Maste * @addr: address to be written 1756d30c739cSEd Maste * 1757d30c739cSEd Maste */ 1758d30c739cSEd Maste static void 1759d30c739cSEd Maste muge_set_addr_filter(struct muge_softc *sc, int index, 1760d30c739cSEd Maste uint8_t addr[ETHER_ADDR_LEN]) 1761d30c739cSEd Maste { 1762d30c739cSEd Maste uint32_t tmp; 1763d30c739cSEd Maste 1764d30c739cSEd Maste if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1765d30c739cSEd Maste tmp = addr[3]; 1766d30c739cSEd Maste tmp |= addr[2] | (tmp << 8); 1767d30c739cSEd Maste tmp |= addr[1] | (tmp << 8); 1768d30c739cSEd Maste tmp |= addr[0] | (tmp << 8); 1769d30c739cSEd Maste sc->sc_pfilter_table[index][1] = tmp; 1770d30c739cSEd Maste tmp = addr[5]; 1771d30c739cSEd Maste tmp |= addr[4] | (tmp << 8); 177248bc1758SEd Maste tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1773d30c739cSEd Maste sc->sc_pfilter_table[index][0] = tmp; 1774d30c739cSEd Maste } 1775d30c739cSEd Maste } 1776d30c739cSEd Maste 1777d30c739cSEd Maste /** 1778d30c739cSEd Maste * lan78xx_dataport_write - write to the selected RAM 1779d30c739cSEd Maste * @sc: The device soft context. 1780d30c739cSEd Maste * @ram_select: Select which RAM to access. 1781d30c739cSEd Maste * @addr: Starting address to write to. 1782d30c739cSEd Maste * @buf: word-sized buffer to write to RAM, starting at @addr. 1783d30c739cSEd Maste * @length: length of @buf 1784d30c739cSEd Maste * 1785d30c739cSEd Maste * 1786d30c739cSEd Maste * RETURNS: 1787d30c739cSEd Maste * 0 if write successful. 1788d30c739cSEd Maste */ 1789d30c739cSEd Maste static int 1790d30c739cSEd Maste lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1791d30c739cSEd Maste uint32_t addr, uint32_t length, uint32_t *buf) 1792d30c739cSEd Maste { 1793d30c739cSEd Maste uint32_t dp_sel; 1794d30c739cSEd Maste int i, ret; 1795d30c739cSEd Maste 1796d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 179748bc1758SEd Maste ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1798d30c739cSEd Maste if (ret < 0) 1799d30c739cSEd Maste goto done; 1800d30c739cSEd Maste 180148bc1758SEd Maste ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1802d30c739cSEd Maste 180348bc1758SEd Maste dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1804d30c739cSEd Maste dp_sel |= ram_select; 1805d30c739cSEd Maste 180648bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1807d30c739cSEd Maste 1808d30c739cSEd Maste for (i = 0; i < length; i++) { 180948bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 181048bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 181148bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 181248bc1758SEd Maste ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1813d30c739cSEd Maste if (ret != 0) 1814d30c739cSEd Maste goto done; 1815d30c739cSEd Maste } 1816d30c739cSEd Maste 1817d30c739cSEd Maste done: 1818e5151258SEd Maste return (ret); 1819d30c739cSEd Maste } 1820d30c739cSEd Maste 1821d30c739cSEd Maste /** 1822d30c739cSEd Maste * muge_multicast_write 1823d30c739cSEd Maste * @sc: device's soft context 1824d30c739cSEd Maste * 1825d30c739cSEd Maste * Writes perfect addres filters and hash address filters to their 1826d30c739cSEd Maste * corresponding registers and RAMs. 1827d30c739cSEd Maste * 1828d30c739cSEd Maste */ 1829d30c739cSEd Maste static void 1830d30c739cSEd Maste muge_multicast_write(struct muge_softc *sc) 1831d30c739cSEd Maste { 1832d30c739cSEd Maste int i, ret; 183348bc1758SEd Maste lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 183448bc1758SEd Maste ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 183548bc1758SEd Maste sc->sc_mchash_table); 1836d30c739cSEd Maste 1837d30c739cSEd Maste for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1838d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1839d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1840d30c739cSEd Maste sc->sc_pfilter_table[i][1]); 1841d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1842d30c739cSEd Maste sc->sc_pfilter_table[i][0]); 1843d30c739cSEd Maste } 1844d30c739cSEd Maste } 1845d30c739cSEd Maste 1846d30c739cSEd Maste /** 1847d30c739cSEd Maste * muge_hash - Calculate the hash of a mac address 1848d30c739cSEd Maste * @addr: The mac address to calculate the hash on 1849d30c739cSEd Maste * 1850d30c739cSEd Maste * This function is used when configuring a range of multicast mac 1851d30c739cSEd Maste * addresses to filter on. The hash of the mac address is put in the 1852d30c739cSEd Maste * device's mac hash table. 1853d30c739cSEd Maste * 1854d30c739cSEd Maste * RETURNS: 1855d30c739cSEd Maste * Returns a value from 0-63 value which is the hash of the mac address. 1856d30c739cSEd Maste */ 1857d30c739cSEd Maste static inline uint32_t 1858d30c739cSEd Maste muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1859d30c739cSEd Maste { 1860a99020fbSKevin Lo return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1861d30c739cSEd Maste } 1862d30c739cSEd Maste 186341840e2dSGleb Smirnoff static u_int 186441840e2dSGleb Smirnoff muge_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 186541840e2dSGleb Smirnoff { 186641840e2dSGleb Smirnoff struct muge_softc *sc = arg; 186741840e2dSGleb Smirnoff uint32_t bitnum; 186841840e2dSGleb Smirnoff 186941840e2dSGleb Smirnoff /* First fill up the perfect address table. */ 187041840e2dSGleb Smirnoff if (cnt < 32 /* XXX */) 187141840e2dSGleb Smirnoff muge_set_addr_filter(sc, cnt + 1, LLADDR(sdl)); 187241840e2dSGleb Smirnoff else { 187341840e2dSGleb Smirnoff bitnum = muge_hash(LLADDR(sdl)); 187441840e2dSGleb Smirnoff sc->sc_mchash_table[bitnum / 32] |= (1 << (bitnum % 32)); 187541840e2dSGleb Smirnoff sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_HASH_; 187641840e2dSGleb Smirnoff } 187741840e2dSGleb Smirnoff 187841840e2dSGleb Smirnoff return (1); 187941840e2dSGleb Smirnoff } 188041840e2dSGleb Smirnoff 1881d30c739cSEd Maste /** 1882d30c739cSEd Maste * muge_setmulti - Setup multicast 1883d30c739cSEd Maste * @ue: usb ethernet device context 1884d30c739cSEd Maste * 1885d30c739cSEd Maste * Tells the device to either accept frames with a multicast mac address, 1886d30c739cSEd Maste * a select group of m'cast mac addresses or just the devices mac address. 1887d30c739cSEd Maste * 1888d30c739cSEd Maste * LOCKING: 1889d30c739cSEd Maste * Should be called with the MUGE lock held. 1890d30c739cSEd Maste */ 1891d30c739cSEd Maste static void 1892d30c739cSEd Maste muge_setmulti(struct usb_ether *ue) 1893d30c739cSEd Maste { 1894d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1895d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 189641840e2dSGleb Smirnoff uint8_t i; 1897d30c739cSEd Maste 1898d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 1899d30c739cSEd Maste 190048bc1758SEd Maste sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 190148bc1758SEd Maste ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1902d30c739cSEd Maste 1903e5151258SEd Maste /* Initialize hash filter table. */ 190448bc1758SEd Maste for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1905d30c739cSEd Maste sc->sc_mchash_table[i] = 0; 1906d30c739cSEd Maste 1907e5151258SEd Maste /* Initialize perfect filter table. */ 1908d30c739cSEd Maste for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1909d30c739cSEd Maste sc->sc_pfilter_table[i][0] = 1910d30c739cSEd Maste sc->sc_pfilter_table[i][1] = 0; 1911d30c739cSEd Maste } 1912d30c739cSEd Maste 191348bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1914d30c739cSEd Maste 1915d30c739cSEd Maste if (ifp->if_flags & IFF_PROMISC) { 1916d30c739cSEd Maste muge_dbg_printf(sc, "promiscuous mode enabled\n"); 191748bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1918d30c739cSEd Maste } else if (ifp->if_flags & IFF_ALLMULTI){ 1919d30c739cSEd Maste muge_dbg_printf(sc, "receive all multicast enabled\n"); 192048bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1921d30c739cSEd Maste } else { 192241840e2dSGleb Smirnoff if_foreach_llmaddr(ifp, muge_hash_maddr, sc); 1923d30c739cSEd Maste muge_multicast_write(sc); 1924d30c739cSEd Maste } 192548bc1758SEd Maste lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1926d30c739cSEd Maste } 1927d30c739cSEd Maste 1928d30c739cSEd Maste /** 1929d30c739cSEd Maste * muge_setpromisc - Enables/disables promiscuous mode 1930d30c739cSEd Maste * @ue: usb ethernet device context 1931d30c739cSEd Maste * 1932d30c739cSEd Maste * LOCKING: 1933d30c739cSEd Maste * Should be called with the MUGE lock held. 1934d30c739cSEd Maste */ 1935d30c739cSEd Maste static void 1936d30c739cSEd Maste muge_setpromisc(struct usb_ether *ue) 1937d30c739cSEd Maste { 1938d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1939d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 1940d30c739cSEd Maste 1941d30c739cSEd Maste muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1942d30c739cSEd Maste (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1943d30c739cSEd Maste 1944d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 1945d30c739cSEd Maste 1946d30c739cSEd Maste if (ifp->if_flags & IFF_PROMISC) 194748bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1948d30c739cSEd Maste else 194948bc1758SEd Maste sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1950d30c739cSEd Maste 195148bc1758SEd Maste lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1952d30c739cSEd Maste } 1953d30c739cSEd Maste 1954d30c739cSEd Maste /** 1955d30c739cSEd Maste * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1956d30c739cSEd Maste * @sc: driver soft context 1957d30c739cSEd Maste * 1958d30c739cSEd Maste * LOCKING: 1959d30c739cSEd Maste * Should be called with the MUGE lock held. 1960d30c739cSEd Maste * 1961d30c739cSEd Maste * RETURNS: 1962d30c739cSEd Maste * Returns 0 on success or a negative error code. 1963d30c739cSEd Maste */ 1964d30c739cSEd Maste static int muge_sethwcsum(struct muge_softc *sc) 1965d30c739cSEd Maste { 1966d30c739cSEd Maste struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1967d30c739cSEd Maste int err; 1968d30c739cSEd Maste 1969d30c739cSEd Maste if (!ifp) 1970d30c739cSEd Maste return (-EIO); 1971d30c739cSEd Maste 1972d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 1973d30c739cSEd Maste 1974fa078712SEd Maste if (ifp->if_capenable & IFCAP_RXCSUM) { 197548bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 197648bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1977d30c739cSEd Maste } else { 197848bc1758SEd Maste sc->sc_rfe_ctl &= 197948bc1758SEd Maste ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 198048bc1758SEd Maste sc->sc_rfe_ctl &= 198148bc1758SEd Maste ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1982d30c739cSEd Maste } 1983d30c739cSEd Maste 198448bc1758SEd Maste sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1985d30c739cSEd Maste 198648bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1987d30c739cSEd Maste 1988d30c739cSEd Maste if (err != 0) { 198948bc1758SEd Maste muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 199048bc1758SEd Maste err); 1991d30c739cSEd Maste return (err); 1992d30c739cSEd Maste } 1993d30c739cSEd Maste 1994d30c739cSEd Maste return (0); 1995d30c739cSEd Maste } 1996d30c739cSEd Maste 1997d30c739cSEd Maste /** 1998d30c739cSEd Maste * muge_ifmedia_upd - Set media options 1999d30c739cSEd Maste * @ifp: interface pointer 2000d30c739cSEd Maste * 2001d30c739cSEd Maste * Basically boilerplate code that simply calls the mii functions to set 2002d30c739cSEd Maste * the media options. 2003d30c739cSEd Maste * 2004d30c739cSEd Maste * LOCKING: 2005d30c739cSEd Maste * The device lock must be held before this function is called. 2006d30c739cSEd Maste * 2007d30c739cSEd Maste * RETURNS: 2008d30c739cSEd Maste * Returns 0 on success or a negative error code. 2009d30c739cSEd Maste */ 2010d30c739cSEd Maste static int 2011d30c739cSEd Maste muge_ifmedia_upd(struct ifnet *ifp) 2012d30c739cSEd Maste { 2013d30c739cSEd Maste struct muge_softc *sc = ifp->if_softc; 2014d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2015d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2016d30c739cSEd Maste struct mii_softc *miisc; 2017d30c739cSEd Maste int err; 2018d30c739cSEd Maste 2019d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2020d30c739cSEd Maste 2021d30c739cSEd Maste LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2022d30c739cSEd Maste PHY_RESET(miisc); 2023d30c739cSEd Maste err = mii_mediachg(mii); 2024d30c739cSEd Maste return (err); 2025d30c739cSEd Maste } 2026d30c739cSEd Maste 2027d30c739cSEd Maste /** 2028d30c739cSEd Maste * muge_init - Initialises the LAN95xx chip 2029d30c739cSEd Maste * @ue: USB ether interface 2030d30c739cSEd Maste * 2031d30c739cSEd Maste * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2032d30c739cSEd Maste * initialise the interface and the rx/tx pipes. 2033d30c739cSEd Maste * 2034d30c739cSEd Maste * LOCKING: 2035d30c739cSEd Maste * Should be called with the MUGE lock held. 2036d30c739cSEd Maste */ 2037d30c739cSEd Maste static void 2038d30c739cSEd Maste muge_init(struct usb_ether *ue) 2039d30c739cSEd Maste { 2040d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2041d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_init.\n"); 2042d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 2043d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2044d30c739cSEd Maste 2045d30c739cSEd Maste if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2046d30c739cSEd Maste muge_dbg_printf(sc, "setting MAC address failed\n"); 2047d30c739cSEd Maste 2048d30c739cSEd Maste if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2049d30c739cSEd Maste return; 2050d30c739cSEd Maste 2051e5151258SEd Maste /* Cancel pending I/O. */ 2052d30c739cSEd Maste muge_stop(ue); 2053d30c739cSEd Maste 2054d30c739cSEd Maste /* Reset the ethernet interface. */ 2055d30c739cSEd Maste muge_reset(sc); 2056d30c739cSEd Maste 2057d30c739cSEd Maste /* Load the multicast filter. */ 2058d30c739cSEd Maste muge_setmulti(ue); 2059d30c739cSEd Maste 2060d30c739cSEd Maste /* TCP/UDP checksum offload engines. */ 2061d30c739cSEd Maste muge_sethwcsum(sc); 2062d30c739cSEd Maste 2063d30c739cSEd Maste usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2064d30c739cSEd Maste 2065d30c739cSEd Maste /* Indicate we are up and running. */ 2066d30c739cSEd Maste ifp->if_drv_flags |= IFF_DRV_RUNNING; 2067d30c739cSEd Maste 2068d30c739cSEd Maste /* Switch to selected media. */ 2069d30c739cSEd Maste muge_ifmedia_upd(ifp); 2070d30c739cSEd Maste muge_start(ue); 2071d30c739cSEd Maste } 2072d30c739cSEd Maste 2073d30c739cSEd Maste /** 2074d30c739cSEd Maste * muge_stop - Stops communication with the LAN78xx chip 2075d30c739cSEd Maste * @ue: USB ether interface 2076d30c739cSEd Maste */ 2077d30c739cSEd Maste static void 2078d30c739cSEd Maste muge_stop(struct usb_ether *ue) 2079d30c739cSEd Maste { 2080d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2081d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 2082d30c739cSEd Maste 2083d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2084d30c739cSEd Maste 2085d30c739cSEd Maste ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2086d30c739cSEd Maste sc->sc_flags &= ~MUGE_FLAG_LINK; 2087d30c739cSEd Maste 2088d30c739cSEd Maste /* 2089e5151258SEd Maste * Stop all the transfers, if not already stopped. 2090d30c739cSEd Maste */ 2091d30c739cSEd Maste usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2092d30c739cSEd Maste usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2093d30c739cSEd Maste } 2094d30c739cSEd Maste 2095d30c739cSEd Maste /** 2096d30c739cSEd Maste * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2097d30c739cSEd Maste * @ue: USB ether interface 2098d30c739cSEd Maste * 2099d30c739cSEd Maste * Simply calls the mii status functions to check the state of the link. 2100d30c739cSEd Maste * 2101d30c739cSEd Maste * LOCKING: 2102d30c739cSEd Maste * Should be called with the MUGE lock held. 2103d30c739cSEd Maste */ 2104d30c739cSEd Maste static void 2105d30c739cSEd Maste muge_tick(struct usb_ether *ue) 2106d30c739cSEd Maste { 2107d30c739cSEd Maste 2108d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2109d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2110d30c739cSEd Maste 2111d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2112d30c739cSEd Maste 2113d30c739cSEd Maste mii_tick(mii); 2114d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2115d30c739cSEd Maste lan78xx_miibus_statchg(ue->ue_dev); 2116d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2117d30c739cSEd Maste muge_start(ue); 2118d30c739cSEd Maste } 2119d30c739cSEd Maste } 2120d30c739cSEd Maste 2121d30c739cSEd Maste /** 2122d30c739cSEd Maste * muge_ifmedia_sts - Report current media status 2123d30c739cSEd Maste * @ifp: inet interface pointer 2124d30c739cSEd Maste * @ifmr: interface media request 2125d30c739cSEd Maste * 2126e5151258SEd Maste * Call the mii functions to get the media status. 2127d30c739cSEd Maste * 2128d30c739cSEd Maste * LOCKING: 2129d30c739cSEd Maste * Internally takes and releases the device lock. 2130d30c739cSEd Maste */ 2131d30c739cSEd Maste static void 2132d30c739cSEd Maste muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2133d30c739cSEd Maste { 2134d30c739cSEd Maste struct muge_softc *sc = ifp->if_softc; 2135d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2136d30c739cSEd Maste 2137d30c739cSEd Maste MUGE_LOCK(sc); 2138d30c739cSEd Maste mii_pollstat(mii); 2139d30c739cSEd Maste ifmr->ifm_active = mii->mii_media_active; 2140d30c739cSEd Maste ifmr->ifm_status = mii->mii_media_status; 2141d30c739cSEd Maste MUGE_UNLOCK(sc); 2142d30c739cSEd Maste } 2143d30c739cSEd Maste 2144d30c739cSEd Maste /** 2145d30c739cSEd Maste * muge_probe - Probe the interface. 2146d30c739cSEd Maste * @dev: muge device handle 2147d30c739cSEd Maste * 2148d30c739cSEd Maste * Checks if the device is a match for this driver. 2149d30c739cSEd Maste * 2150d30c739cSEd Maste * RETURNS: 2151d30c739cSEd Maste * Returns 0 on success or an error code on failure. 2152d30c739cSEd Maste */ 2153d30c739cSEd Maste static int 2154d30c739cSEd Maste muge_probe(device_t dev) 2155d30c739cSEd Maste { 2156d30c739cSEd Maste struct usb_attach_arg *uaa = device_get_ivars(dev); 2157d30c739cSEd Maste 2158d30c739cSEd Maste if (uaa->usb_mode != USB_MODE_HOST) 2159d30c739cSEd Maste return (ENXIO); 2160d30c739cSEd Maste if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2161d30c739cSEd Maste return (ENXIO); 2162d30c739cSEd Maste if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2163d30c739cSEd Maste return (ENXIO); 2164d30c739cSEd Maste return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2165d30c739cSEd Maste } 2166d30c739cSEd Maste 2167d30c739cSEd Maste /** 2168d30c739cSEd Maste * muge_attach - Attach the interface. 2169d30c739cSEd Maste * @dev: muge device handle 2170d30c739cSEd Maste * 2171d30c739cSEd Maste * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2172d30c739cSEd Maste * 2173d30c739cSEd Maste * RETURNS: 2174d30c739cSEd Maste * Returns 0 on success or a negative error code. 2175d30c739cSEd Maste */ 2176d30c739cSEd Maste static int 2177d30c739cSEd Maste muge_attach(device_t dev) 2178d30c739cSEd Maste { 2179d30c739cSEd Maste struct usb_attach_arg *uaa = device_get_ivars(dev); 2180d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 2181d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 2182d30c739cSEd Maste uint8_t iface_index; 2183d30c739cSEd Maste int err; 2184d30c739cSEd Maste 2185d30c739cSEd Maste sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2186d30c739cSEd Maste 2187d30c739cSEd Maste device_set_usb_desc(dev); 2188d30c739cSEd Maste 2189d30c739cSEd Maste mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2190d30c739cSEd Maste 2191e5151258SEd Maste /* Setup the endpoints for the Microchip LAN78xx device. */ 2192d30c739cSEd Maste iface_index = MUGE_IFACE_IDX; 2193d30c739cSEd Maste err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2194d30c739cSEd Maste muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2195d30c739cSEd Maste if (err) { 2196d30c739cSEd Maste device_printf(dev, "error: allocating USB transfers failed\n"); 219749b2a5feSEd Maste goto err; 2198d30c739cSEd Maste } 2199d30c739cSEd Maste 2200d30c739cSEd Maste ue->ue_sc = sc; 2201d30c739cSEd Maste ue->ue_dev = dev; 2202d30c739cSEd Maste ue->ue_udev = uaa->device; 2203d30c739cSEd Maste ue->ue_mtx = &sc->sc_mtx; 2204d30c739cSEd Maste ue->ue_methods = &muge_ue_methods; 2205d30c739cSEd Maste 2206d30c739cSEd Maste err = uether_ifattach(ue); 2207d30c739cSEd Maste if (err) { 2208d30c739cSEd Maste device_printf(dev, "error: could not attach interface\n"); 220949b2a5feSEd Maste goto err_usbd; 2210d30c739cSEd Maste } 221149b2a5feSEd Maste 221249b2a5feSEd Maste /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 221349b2a5feSEd Maste uether_ifattach_wait(ue); 221449b2a5feSEd Maste if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 221549b2a5feSEd Maste goto err_attached; 221649b2a5feSEd Maste 2217d30c739cSEd Maste return (0); 2218d30c739cSEd Maste 221949b2a5feSEd Maste err_attached: 222049b2a5feSEd Maste uether_ifdetach(ue); 222149b2a5feSEd Maste err_usbd: 222249b2a5feSEd Maste usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 222349b2a5feSEd Maste err: 222449b2a5feSEd Maste mtx_destroy(&sc->sc_mtx); 2225d30c739cSEd Maste return (ENXIO); 2226d30c739cSEd Maste } 2227d30c739cSEd Maste 2228d30c739cSEd Maste /** 2229d30c739cSEd Maste * muge_detach - Detach the interface. 2230d30c739cSEd Maste * @dev: muge device handle 2231d30c739cSEd Maste * 2232d30c739cSEd Maste * RETURNS: 2233d30c739cSEd Maste * Returns 0. 2234d30c739cSEd Maste */ 2235d30c739cSEd Maste static int 2236d30c739cSEd Maste muge_detach(device_t dev) 2237d30c739cSEd Maste { 2238d30c739cSEd Maste 2239d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 2240d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 2241d30c739cSEd Maste 2242d30c739cSEd Maste usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2243d30c739cSEd Maste uether_ifdetach(ue); 2244d30c739cSEd Maste mtx_destroy(&sc->sc_mtx); 2245d30c739cSEd Maste 2246d30c739cSEd Maste return (0); 2247d30c739cSEd Maste } 2248d30c739cSEd Maste 2249d30c739cSEd Maste static device_method_t muge_methods[] = { 2250d30c739cSEd Maste /* Device interface */ 2251d30c739cSEd Maste DEVMETHOD(device_probe, muge_probe), 2252d30c739cSEd Maste DEVMETHOD(device_attach, muge_attach), 2253d30c739cSEd Maste DEVMETHOD(device_detach, muge_detach), 2254d30c739cSEd Maste 2255d30c739cSEd Maste /* Bus interface */ 2256d30c739cSEd Maste DEVMETHOD(bus_print_child, bus_generic_print_child), 2257d30c739cSEd Maste DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2258d30c739cSEd Maste 2259d30c739cSEd Maste /* MII interface */ 2260d30c739cSEd Maste DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2261d30c739cSEd Maste DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2262d30c739cSEd Maste DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2263d30c739cSEd Maste 2264d30c739cSEd Maste DEVMETHOD_END 2265d30c739cSEd Maste }; 2266d30c739cSEd Maste 2267d30c739cSEd Maste static driver_t muge_driver = { 2268d30c739cSEd Maste .name = "muge", 2269d30c739cSEd Maste .methods = muge_methods, 2270d30c739cSEd Maste .size = sizeof(struct muge_softc), 2271d30c739cSEd Maste }; 2272d30c739cSEd Maste 2273d30c739cSEd Maste static devclass_t muge_devclass; 2274d30c739cSEd Maste 2275fea616deSEd Maste DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, NULL); 2276fea616deSEd Maste DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, NULL, NULL); 2277d30c739cSEd Maste MODULE_DEPEND(muge, uether, 1, 1, 1); 2278d30c739cSEd Maste MODULE_DEPEND(muge, usb, 1, 1, 1); 2279d30c739cSEd Maste MODULE_DEPEND(muge, ether, 1, 1, 1); 2280d30c739cSEd Maste MODULE_DEPEND(muge, miibus, 1, 1, 1); 2281d30c739cSEd Maste MODULE_VERSION(muge, 1); 2282d30c739cSEd Maste USB_PNP_HOST_INFO(lan78xx_devs); 2283