1d30c739cSEd Maste /*- 2d30c739cSEd Maste * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3d30c739cSEd Maste * 4d30c739cSEd Maste * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5d30c739cSEd Maste * Copyright (C) 2018 The FreeBSD Foundation. 6d30c739cSEd Maste * 7d30c739cSEd Maste * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8d30c739cSEd Maste * under sponsorship from the FreeBSD Foundation. 9d30c739cSEd Maste * 10d30c739cSEd Maste * Redistribution and use in source and binary forms, with or without 11d30c739cSEd Maste * modification, are permitted provided that the following conditions 12d30c739cSEd Maste * are met: 13d30c739cSEd Maste * 1. Redistributions of source code must retain the above copyright 14d30c739cSEd Maste * notice, this list of conditions and the following disclaimer. 15d30c739cSEd Maste * 2. Redistributions in binary form must reproduce the above copyright 16d30c739cSEd Maste * notice, this list of conditions and the following disclaimer in the 17d30c739cSEd Maste * documentation and/or other materials provided with the distribution. 18d30c739cSEd Maste * 19d30c739cSEd Maste * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20d30c739cSEd Maste * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21d30c739cSEd Maste * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22d30c739cSEd Maste * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23d30c739cSEd Maste * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24d30c739cSEd Maste * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25d30c739cSEd Maste * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26d30c739cSEd Maste * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27d30c739cSEd Maste * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28d30c739cSEd Maste * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29d30c739cSEd Maste * SUCH DAMAGE. 30d30c739cSEd Maste * 31d30c739cSEd Maste * $FreeBSD$ 32d30c739cSEd Maste */ 33d30c739cSEd Maste 34d30c739cSEd Maste #include <sys/cdefs.h> 35d30c739cSEd Maste __FBSDID("$FreeBSD$"); 36d30c739cSEd Maste 37d30c739cSEd Maste /* 38d30c739cSEd Maste * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39d30c739cSEd Maste * 40d30c739cSEd Maste * USB 3.1 to 10/100/1000 Mbps Ethernet 41d30c739cSEd Maste * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42d30c739cSEd Maste * 432d14fb8bSEd Maste * USB 2.0 to 10/100/1000 Mbps Ethernet 442d14fb8bSEd Maste * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 452d14fb8bSEd Maste * 46d30c739cSEd Maste * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47d30c739cSEd Maste * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48d30c739cSEd Maste * 49d30c739cSEd Maste * This driver is based on the if_smsc driver, with lan78xx-specific 50d30c739cSEd Maste * functionality modelled on Microchip's Linux lan78xx driver. 51d30c739cSEd Maste * 52d30c739cSEd Maste * UNIMPLEMENTED FEATURES 53d30c739cSEd Maste * ------------------ 54d30c739cSEd Maste * A number of features supported by the lan78xx are not yet implemented in 55d30c739cSEd Maste * this driver: 56d30c739cSEd Maste * 57d30c739cSEd Maste * 1. RX/TX checksum offloading: Nothing has been implemented yet for 58d30c739cSEd Maste * TX checksumming. RX checksumming works with ICMP messages, but is broken 59d30c739cSEd Maste * for TCP/UDP packets. 60d30c739cSEd Maste * 2. Direct address translation filtering: Implemented but untested. 61d30c739cSEd Maste * 3. VLAN tag removal. 62d30c739cSEd Maste * 4. Reading MAC address from the device tree: Specific to the RPi 3B+. 63d30c739cSEd Maste * Currently, the driver assigns a random MAC address itself. 64d30c739cSEd Maste * 5. Support for USB interrupt endpoints. 65d30c739cSEd Maste * 6. Latency Tolerance Messaging (LTM) support. 66d30c739cSEd Maste * 7. TCP LSO support. 67d30c739cSEd Maste * 68d30c739cSEd Maste */ 69d30c739cSEd Maste 70d30c739cSEd Maste #include <sys/param.h> 71d30c739cSEd Maste #include <sys/bus.h> 72d30c739cSEd Maste #include <sys/callout.h> 73d30c739cSEd Maste #include <sys/condvar.h> 74d30c739cSEd Maste #include <sys/kernel.h> 75d30c739cSEd Maste #include <sys/lock.h> 76d30c739cSEd Maste #include <sys/malloc.h> 77d30c739cSEd Maste #include <sys/module.h> 78d30c739cSEd Maste #include <sys/mutex.h> 79d30c739cSEd Maste #include <sys/priv.h> 80d30c739cSEd Maste #include <sys/queue.h> 81d30c739cSEd Maste #include <sys/random.h> 82d30c739cSEd Maste #include <sys/socket.h> 83d30c739cSEd Maste #include <sys/stddef.h> 84d30c739cSEd Maste #include <sys/stdint.h> 85d30c739cSEd Maste #include <sys/sx.h> 86d30c739cSEd Maste #include <sys/sysctl.h> 87d30c739cSEd Maste #include <sys/systm.h> 88d30c739cSEd Maste #include <sys/unistd.h> 89d30c739cSEd Maste 90d30c739cSEd Maste #include <net/if.h> 91d30c739cSEd Maste #include <net/if_var.h> 92d30c739cSEd Maste 93d30c739cSEd Maste #include <netinet/in.h> 94d30c739cSEd Maste #include <netinet/ip.h> 95d30c739cSEd Maste 96d30c739cSEd Maste #include "opt_platform.h" 97d30c739cSEd Maste 98*b4872d67SOleksandr Tymoshenko #ifdef FDT 99*b4872d67SOleksandr Tymoshenko #include <dev/fdt/fdt_common.h> 100*b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h> 101*b4872d67SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h> 102*b4872d67SOleksandr Tymoshenko #endif 103*b4872d67SOleksandr Tymoshenko 104d30c739cSEd Maste #include <dev/usb/usb.h> 105d30c739cSEd Maste #include <dev/usb/usbdi.h> 106d30c739cSEd Maste #include <dev/usb/usbdi_util.h> 107d30c739cSEd Maste #include "usbdevs.h" 108d30c739cSEd Maste 109d30c739cSEd Maste #define USB_DEBUG_VAR lan78xx_debug 110d30c739cSEd Maste #include <dev/usb/usb_debug.h> 111d30c739cSEd Maste #include <dev/usb/usb_process.h> 112d30c739cSEd Maste 113d30c739cSEd Maste #include <dev/usb/net/usb_ethernet.h> 114d30c739cSEd Maste 115d30c739cSEd Maste #include <dev/usb/net/if_mugereg.h> 116d30c739cSEd Maste 117d30c739cSEd Maste #ifdef USB_DEBUG 118d30c739cSEd Maste static int muge_debug = 0; 119d30c739cSEd Maste 120d30c739cSEd Maste SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0, 121d30c739cSEd Maste "Microchip LAN78xx USB-GigE"); 122d30c739cSEd Maste SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 123d30c739cSEd Maste "Debug level"); 124d30c739cSEd Maste #endif 125d30c739cSEd Maste 126d30c739cSEd Maste #define MUGE_DEFAULT_RX_CSUM_ENABLE (false) 127d30c739cSEd Maste #define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 128d30c739cSEd Maste #define MUGE_DEFAULT_TSO_CSUM_ENABLE (false) 129d30c739cSEd Maste 130d30c739cSEd Maste /* Supported Vendor and Product IDs. */ 131d30c739cSEd Maste static const struct usb_device_id lan78xx_devs[] = { 132d30c739cSEd Maste #define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 133d30c739cSEd Maste MUGE_DEV(LAN7800_ETH, 0), 13449b2a5feSEd Maste MUGE_DEV(LAN7801_ETH, 0), 13549b2a5feSEd Maste MUGE_DEV(LAN7850_ETH, 0), 136d30c739cSEd Maste #undef MUGE_DEV 137d30c739cSEd Maste }; 138d30c739cSEd Maste 139d30c739cSEd Maste #ifdef USB_DEBUG 140087522b8SAndreas Tobler #define muge_dbg_printf(sc, fmt, args...) \ 141d30c739cSEd Maste do { \ 142d30c739cSEd Maste if (muge_debug > 0) \ 143d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 144d30c739cSEd Maste } while(0) 145d30c739cSEd Maste #else 146d30c739cSEd Maste #define muge_dbg_printf(sc, fmt, args...) do { } while (0) 147d30c739cSEd Maste #endif 148d30c739cSEd Maste 149d30c739cSEd Maste #define muge_warn_printf(sc, fmt, args...) \ 150d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 151d30c739cSEd Maste 152d30c739cSEd Maste #define muge_err_printf(sc, fmt, args...) \ 153d30c739cSEd Maste device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 154d30c739cSEd Maste 155d30c739cSEd Maste #define ETHER_IS_ZERO(addr) \ 156d30c739cSEd Maste (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 157d30c739cSEd Maste 158d30c739cSEd Maste #define ETHER_IS_VALID(addr) \ 159d30c739cSEd Maste (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 160d30c739cSEd Maste 161d30c739cSEd Maste /* USB endpoints. */ 162d30c739cSEd Maste 163d30c739cSEd Maste enum { 164d30c739cSEd Maste MUGE_BULK_DT_RD, 165d30c739cSEd Maste MUGE_BULK_DT_WR, 166e5151258SEd Maste #if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 167e5151258SEd Maste MUGE_INTR_DT_WR, 168e5151258SEd Maste MUGE_INTR_DT_RD, 169e5151258SEd Maste #endif 170d30c739cSEd Maste MUGE_N_TRANSFER, 171d30c739cSEd Maste }; 172d30c739cSEd Maste 173d30c739cSEd Maste struct muge_softc { 174d30c739cSEd Maste struct usb_ether sc_ue; 175d30c739cSEd Maste struct mtx sc_mtx; 176d30c739cSEd Maste struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 177d30c739cSEd Maste int sc_phyno; 178d30c739cSEd Maste 179d30c739cSEd Maste /* Settings for the mac control (MAC_CSR) register. */ 180d30c739cSEd Maste uint32_t sc_rfe_ctl; 181d30c739cSEd Maste uint32_t sc_mdix_ctl; 18203ba5353SEd Maste uint16_t chipid; 18303ba5353SEd Maste uint16_t chiprev; 18448bc1758SEd Maste uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 185d30c739cSEd Maste uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 186d30c739cSEd Maste 187d30c739cSEd Maste uint32_t sc_flags; 188d30c739cSEd Maste #define MUGE_FLAG_LINK 0x0001 18949b2a5feSEd Maste #define MUGE_FLAG_INIT_DONE 0x0002 190d30c739cSEd Maste }; 191d30c739cSEd Maste 192d30c739cSEd Maste #define MUGE_IFACE_IDX 0 193d30c739cSEd Maste 194d30c739cSEd Maste #define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 195d30c739cSEd Maste #define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 196d30c739cSEd Maste #define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 197d30c739cSEd Maste 198d30c739cSEd Maste static device_probe_t muge_probe; 199d30c739cSEd Maste static device_attach_t muge_attach; 200d30c739cSEd Maste static device_detach_t muge_detach; 201d30c739cSEd Maste 202d30c739cSEd Maste static usb_callback_t muge_bulk_read_callback; 203d30c739cSEd Maste static usb_callback_t muge_bulk_write_callback; 204d30c739cSEd Maste 205d30c739cSEd Maste static miibus_readreg_t lan78xx_miibus_readreg; 206d30c739cSEd Maste static miibus_writereg_t lan78xx_miibus_writereg; 207d30c739cSEd Maste static miibus_statchg_t lan78xx_miibus_statchg; 208d30c739cSEd Maste 209d30c739cSEd Maste static int muge_attach_post_sub(struct usb_ether *ue); 210d30c739cSEd Maste static uether_fn_t muge_attach_post; 211d30c739cSEd Maste static uether_fn_t muge_init; 212d30c739cSEd Maste static uether_fn_t muge_stop; 213d30c739cSEd Maste static uether_fn_t muge_start; 214d30c739cSEd Maste static uether_fn_t muge_tick; 215d30c739cSEd Maste static uether_fn_t muge_setmulti; 216d30c739cSEd Maste static uether_fn_t muge_setpromisc; 217d30c739cSEd Maste 218d30c739cSEd Maste static int muge_ifmedia_upd(struct ifnet *); 219d30c739cSEd Maste static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 220d30c739cSEd Maste 221d30c739cSEd Maste static int lan78xx_chip_init(struct muge_softc *sc); 222d30c739cSEd Maste static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 223d30c739cSEd Maste 224d30c739cSEd Maste static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 225d30c739cSEd Maste 226d30c739cSEd Maste [MUGE_BULK_DT_WR] = { 227d30c739cSEd Maste .type = UE_BULK, 228d30c739cSEd Maste .endpoint = UE_ADDR_ANY, 229d30c739cSEd Maste .direction = UE_DIR_OUT, 230d30c739cSEd Maste .frames = 16, 231d30c739cSEd Maste .bufsize = 16 * (MCLBYTES + 16), 232d30c739cSEd Maste .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 233d30c739cSEd Maste .callback = muge_bulk_write_callback, 234d30c739cSEd Maste .timeout = 10000, /* 10 seconds */ 235d30c739cSEd Maste }, 236d30c739cSEd Maste 237d30c739cSEd Maste [MUGE_BULK_DT_RD] = { 238d30c739cSEd Maste .type = UE_BULK, 239d30c739cSEd Maste .endpoint = UE_ADDR_ANY, 240d30c739cSEd Maste .direction = UE_DIR_IN, 241d30c739cSEd Maste .bufsize = 20480, /* bytes */ 242d30c739cSEd Maste .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 243d30c739cSEd Maste .callback = muge_bulk_read_callback, 244d30c739cSEd Maste .timeout = 0, /* no timeout */ 245d30c739cSEd Maste }, 246d30c739cSEd Maste /* 247d30c739cSEd Maste * The chip supports interrupt endpoints, however they aren't 248d30c739cSEd Maste * needed as we poll on the MII status. 249d30c739cSEd Maste */ 250d30c739cSEd Maste }; 251d30c739cSEd Maste 252d30c739cSEd Maste static const struct usb_ether_methods muge_ue_methods = { 253d30c739cSEd Maste .ue_attach_post = muge_attach_post, 254d30c739cSEd Maste .ue_attach_post_sub = muge_attach_post_sub, 255d30c739cSEd Maste .ue_start = muge_start, 256d30c739cSEd Maste .ue_ioctl = muge_ioctl, 257d30c739cSEd Maste .ue_init = muge_init, 258d30c739cSEd Maste .ue_stop = muge_stop, 259d30c739cSEd Maste .ue_tick = muge_tick, 260d30c739cSEd Maste .ue_setmulti = muge_setmulti, 261d30c739cSEd Maste .ue_setpromisc = muge_setpromisc, 262d30c739cSEd Maste .ue_mii_upd = muge_ifmedia_upd, 263d30c739cSEd Maste .ue_mii_sts = muge_ifmedia_sts, 264d30c739cSEd Maste }; 265d30c739cSEd Maste 266d30c739cSEd Maste /** 267d30c739cSEd Maste * lan78xx_read_reg - Read a 32-bit register on the device 268d30c739cSEd Maste * @sc: driver soft context 269d30c739cSEd Maste * @off: offset of the register 270d30c739cSEd Maste * @data: pointer a value that will be populated with the register value 271d30c739cSEd Maste * 272d30c739cSEd Maste * LOCKING: 273d30c739cSEd Maste * The device lock must be held before calling this function. 274d30c739cSEd Maste * 275d30c739cSEd Maste * RETURNS: 276d30c739cSEd Maste * 0 on success, a USB_ERR_?? error code on failure. 277d30c739cSEd Maste */ 278d30c739cSEd Maste static int 279d30c739cSEd Maste lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 280d30c739cSEd Maste { 281d30c739cSEd Maste struct usb_device_request req; 282d30c739cSEd Maste uint32_t buf; 283d30c739cSEd Maste usb_error_t err; 284d30c739cSEd Maste 285d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 286d30c739cSEd Maste 287d30c739cSEd Maste req.bmRequestType = UT_READ_VENDOR_DEVICE; 288d30c739cSEd Maste req.bRequest = UVR_READ_REG; 289d30c739cSEd Maste USETW(req.wValue, 0); 290d30c739cSEd Maste USETW(req.wIndex, off); 291d30c739cSEd Maste USETW(req.wLength, 4); 292d30c739cSEd Maste 293d30c739cSEd Maste err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 294d30c739cSEd Maste if (err != 0) 295d30c739cSEd Maste muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 296d30c739cSEd Maste *data = le32toh(buf); 297d30c739cSEd Maste return (err); 298d30c739cSEd Maste } 299d30c739cSEd Maste 300d30c739cSEd Maste /** 301d30c739cSEd Maste * lan78xx_write_reg - Write a 32-bit register on the device 302d30c739cSEd Maste * @sc: driver soft context 303d30c739cSEd Maste * @off: offset of the register 304d30c739cSEd Maste * @data: the 32-bit value to write into the register 305d30c739cSEd Maste * 306d30c739cSEd Maste * LOCKING: 307d30c739cSEd Maste * The device lock must be held before calling this function. 308d30c739cSEd Maste * 309d30c739cSEd Maste * RETURNS: 310d30c739cSEd Maste * 0 on success, a USB_ERR_?? error code on failure. 311d30c739cSEd Maste */ 312d30c739cSEd Maste static int 313d30c739cSEd Maste lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 314d30c739cSEd Maste { 315d30c739cSEd Maste struct usb_device_request req; 316d30c739cSEd Maste uint32_t buf; 317d30c739cSEd Maste usb_error_t err; 318d30c739cSEd Maste 319d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 320d30c739cSEd Maste 321d30c739cSEd Maste buf = htole32(data); 322d30c739cSEd Maste 323d30c739cSEd Maste req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 324d30c739cSEd Maste req.bRequest = UVR_WRITE_REG; 325d30c739cSEd Maste USETW(req.wValue, 0); 326d30c739cSEd Maste USETW(req.wIndex, off); 327d30c739cSEd Maste USETW(req.wLength, 4); 328d30c739cSEd Maste 329d30c739cSEd Maste err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 330d30c739cSEd Maste if (err != 0) 331d30c739cSEd Maste muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 332d30c739cSEd Maste return (err); 333d30c739cSEd Maste } 334d30c739cSEd Maste 335d30c739cSEd Maste /** 336d30c739cSEd Maste * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 337d30c739cSEd Maste * @sc: soft context 338d30c739cSEd Maste * @reg: offset of the register 339d30c739cSEd Maste * @bits: if the bits are clear the function returns 340d30c739cSEd Maste * 341d30c739cSEd Maste * LOCKING: 342d30c739cSEd Maste * The device lock must be held before calling this function. 343d30c739cSEd Maste * 344d30c739cSEd Maste * RETURNS: 345d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 346d30c739cSEd Maste */ 347d30c739cSEd Maste static int 348d30c739cSEd Maste lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 349d30c739cSEd Maste { 350d30c739cSEd Maste usb_ticks_t start_ticks; 351d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 352d30c739cSEd Maste uint32_t val; 353d30c739cSEd Maste int err; 354d30c739cSEd Maste 355d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 356d30c739cSEd Maste 357d30c739cSEd Maste start_ticks = (usb_ticks_t)ticks; 358d30c739cSEd Maste do { 359d30c739cSEd Maste if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 360d30c739cSEd Maste return (err); 361d30c739cSEd Maste if (!(val & bits)) 362d30c739cSEd Maste return (0); 363d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 364d30c739cSEd Maste } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 365d30c739cSEd Maste 366d30c739cSEd Maste return (USB_ERR_TIMEOUT); 367d30c739cSEd Maste } 368d30c739cSEd Maste 369d30c739cSEd Maste /** 370d30c739cSEd Maste * lan78xx_eeprom_read_raw - Read the attached EEPROM 371d30c739cSEd Maste * @sc: soft context 372d30c739cSEd Maste * @off: the eeprom address offset 373d30c739cSEd Maste * @buf: stores the bytes 374d30c739cSEd Maste * @buflen: the number of bytes to read 375d30c739cSEd Maste * 376d30c739cSEd Maste * Simply reads bytes from an attached eeprom. 377d30c739cSEd Maste * 378d30c739cSEd Maste * LOCKING: 379d30c739cSEd Maste * The function takes and releases the device lock if not already held. 380d30c739cSEd Maste * 381d30c739cSEd Maste * RETURNS: 382d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 383d30c739cSEd Maste */ 384d30c739cSEd Maste static int 385d30c739cSEd Maste lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 386d30c739cSEd Maste uint16_t buflen) 387d30c739cSEd Maste { 388d30c739cSEd Maste usb_ticks_t start_ticks; 389d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 390d30c739cSEd Maste int err, locked; 391d30c739cSEd Maste uint32_t val, saved; 392d30c739cSEd Maste uint16_t i; 393d30c739cSEd Maste 394d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); /* XXX */ 395d30c739cSEd Maste if (!locked) 396d30c739cSEd Maste MUGE_LOCK(sc); 397d30c739cSEd Maste 3982d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 3992d14fb8bSEd Maste /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 40048bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 401d30c739cSEd Maste saved = val; 402d30c739cSEd Maste 40348bc1758SEd Maste val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 40448bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 4052d14fb8bSEd Maste } 406d30c739cSEd Maste 40748bc1758SEd Maste err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 408d30c739cSEd Maste if (err != 0) { 409d30c739cSEd Maste muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 410d30c739cSEd Maste goto done; 411d30c739cSEd Maste } 412d30c739cSEd Maste 413d30c739cSEd Maste /* Start reading the bytes, one at a time. */ 414d30c739cSEd Maste for (i = 0; i < buflen; i++) { 41548bc1758SEd Maste val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 41648bc1758SEd Maste val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 41748bc1758SEd Maste if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 418d30c739cSEd Maste goto done; 419d30c739cSEd Maste 420d30c739cSEd Maste start_ticks = (usb_ticks_t)ticks; 421d30c739cSEd Maste do { 42248bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 42348bc1758SEd Maste 0) 424d30c739cSEd Maste goto done; 42548bc1758SEd Maste if (!(val & ETH_E2P_CMD_BUSY_) || 42648bc1758SEd Maste (val & ETH_E2P_CMD_TIMEOUT_)) 427d30c739cSEd Maste break; 428d30c739cSEd Maste 429d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 430d30c739cSEd Maste } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 431d30c739cSEd Maste 43248bc1758SEd Maste if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 433d30c739cSEd Maste muge_warn_printf(sc, "eeprom command failed\n"); 434d30c739cSEd Maste err = USB_ERR_IOERROR; 435d30c739cSEd Maste break; 436d30c739cSEd Maste } 437d30c739cSEd Maste 43848bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 439d30c739cSEd Maste goto done; 440d30c739cSEd Maste 441d30c739cSEd Maste buf[i] = (val & 0xff); 442d30c739cSEd Maste } 443d30c739cSEd Maste 444d30c739cSEd Maste done: 445d30c739cSEd Maste if (!locked) 446d30c739cSEd Maste MUGE_UNLOCK(sc); 4472d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 4482d14fb8bSEd Maste /* Restore saved LED configuration. */ 44948bc1758SEd Maste lan78xx_write_reg(sc, ETH_HW_CFG, saved); 4502d14fb8bSEd Maste } 451d30c739cSEd Maste return (err); 452d30c739cSEd Maste } 453d30c739cSEd Maste 4542c8cf0c5SEd Maste static bool 4552c8cf0c5SEd Maste lan78xx_eeprom_present(struct muge_softc *sc) 456d30c739cSEd Maste { 457d30c739cSEd Maste int ret; 4582c8cf0c5SEd Maste uint8_t sig; 459d30c739cSEd Maste 46048bc1758SEd Maste ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 4612c8cf0c5SEd Maste return (ret == 0 && sig == ETH_E2P_INDICATOR); 462d30c739cSEd Maste } 463d30c739cSEd Maste 464d30c739cSEd Maste /** 465d30c739cSEd Maste * lan78xx_otp_read_raw 466d30c739cSEd Maste * @sc: soft context 467d30c739cSEd Maste * @off: the otp address offset 468d30c739cSEd Maste * @buf: stores the bytes 469d30c739cSEd Maste * @buflen: the number of bytes to read 470d30c739cSEd Maste * 471d30c739cSEd Maste * Simply reads bytes from the OTP. 472d30c739cSEd Maste * 473d30c739cSEd Maste * LOCKING: 474d30c739cSEd Maste * The function takes and releases the device lock if not already held. 475d30c739cSEd Maste * 476d30c739cSEd Maste * RETURNS: 477d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 478d30c739cSEd Maste * 479d30c739cSEd Maste */ 480d30c739cSEd Maste static int 481d30c739cSEd Maste lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 482d30c739cSEd Maste uint16_t buflen) 483d30c739cSEd Maste { 484d30c739cSEd Maste int locked, err; 485d30c739cSEd Maste uint32_t val; 486d30c739cSEd Maste uint16_t i; 487d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 488d30c739cSEd Maste if (!locked) 489d30c739cSEd Maste MUGE_LOCK(sc); 490d30c739cSEd Maste 491d30c739cSEd Maste err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 492d30c739cSEd Maste 493e5151258SEd Maste /* Checking if bit is set. */ 494d30c739cSEd Maste if (val & OTP_PWR_DN_PWRDN_N) { 495e5151258SEd Maste /* Clear it, then wait for it to be cleared. */ 496d30c739cSEd Maste lan78xx_write_reg(sc, OTP_PWR_DN, 0); 497d30c739cSEd Maste err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 498d30c739cSEd Maste if (err != 0) { 499d30c739cSEd Maste muge_warn_printf(sc, "OTP off? failed to read data\n"); 500d30c739cSEd Maste goto done; 501d30c739cSEd Maste } 502d30c739cSEd Maste } 503e5151258SEd Maste /* Start reading the bytes, one at a time. */ 504d30c739cSEd Maste for (i = 0; i < buflen; i++) { 505d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_ADDR1, 506d30c739cSEd Maste ((off + i) >> 8) & OTP_ADDR1_15_11); 507d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_ADDR2, 508d30c739cSEd Maste ((off + i) & OTP_ADDR2_10_3)); 509d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 510d30c739cSEd Maste err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 511d30c739cSEd Maste 512d30c739cSEd Maste err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 513d30c739cSEd Maste if (err != 0) { 514d30c739cSEd Maste muge_warn_printf(sc, "OTP busy failed to read data\n"); 515d30c739cSEd Maste goto done; 516d30c739cSEd Maste } 517d30c739cSEd Maste 518d30c739cSEd Maste if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 519d30c739cSEd Maste goto done; 520d30c739cSEd Maste 521d30c739cSEd Maste buf[i] = (uint8_t)(val & 0xff); 522d30c739cSEd Maste } 523d30c739cSEd Maste 524d30c739cSEd Maste done: 525d30c739cSEd Maste if (!locked) 526d30c739cSEd Maste MUGE_UNLOCK(sc); 527d30c739cSEd Maste return (err); 528d30c739cSEd Maste } 529d30c739cSEd Maste 530d30c739cSEd Maste /** 531d30c739cSEd Maste * lan78xx_otp_read 532d30c739cSEd Maste * @sc: soft context 533d30c739cSEd Maste * @off: the otp address offset 534d30c739cSEd Maste * @buf: stores the bytes 535d30c739cSEd Maste * @buflen: the number of bytes to read 536d30c739cSEd Maste * 537d30c739cSEd Maste * Simply reads bytes from the otp. 538d30c739cSEd Maste * 539d30c739cSEd Maste * LOCKING: 540d30c739cSEd Maste * The function takes and releases device lock if it is not already held. 541d30c739cSEd Maste * 542d30c739cSEd Maste * RETURNS: 543d30c739cSEd Maste * 0 on success, or a USB_ERR_?? error code on failure. 544d30c739cSEd Maste */ 545d30c739cSEd Maste static int 546d30c739cSEd Maste lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 547d30c739cSEd Maste uint16_t buflen) 548d30c739cSEd Maste { 549d30c739cSEd Maste uint8_t sig; 550d30c739cSEd Maste int err; 551d30c739cSEd Maste 552d30c739cSEd Maste err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 553d30c739cSEd Maste if (err == 0) { 554d30c739cSEd Maste if (sig == OTP_INDICATOR_1) { 555d30c739cSEd Maste } else if (sig == OTP_INDICATOR_2) { 556e5151258SEd Maste off += 0x100; /* XXX */ 557d30c739cSEd Maste } else { 558d30c739cSEd Maste err = -EINVAL; 559d30c739cSEd Maste } 560d30c739cSEd Maste if (!err) 561d30c739cSEd Maste err = lan78xx_otp_read_raw(sc, off, buf, buflen); 562d30c739cSEd Maste } 563e5151258SEd Maste return (err); 564d30c739cSEd Maste } 565d30c739cSEd Maste 566d30c739cSEd Maste /** 567d30c739cSEd Maste * lan78xx_setmacaddress - Set the mac address in the device 568d30c739cSEd Maste * @sc: driver soft context 569d30c739cSEd Maste * @addr: pointer to array contain at least 6 bytes of the mac 570d30c739cSEd Maste * 571d30c739cSEd Maste * LOCKING: 572d30c739cSEd Maste * Should be called with the MUGE lock held. 573d30c739cSEd Maste * 574d30c739cSEd Maste * RETURNS: 575d30c739cSEd Maste * Returns 0 on success or a negative error code. 576d30c739cSEd Maste */ 577d30c739cSEd Maste static int 578d30c739cSEd Maste lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 579d30c739cSEd Maste { 580d30c739cSEd Maste int err; 581d30c739cSEd Maste uint32_t val; 582d30c739cSEd Maste 583d30c739cSEd Maste muge_dbg_printf(sc, 584d30c739cSEd Maste "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 585d30c739cSEd Maste addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 586d30c739cSEd Maste 587d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 588d30c739cSEd Maste 589d30c739cSEd Maste val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 59048bc1758SEd Maste if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 591d30c739cSEd Maste goto done; 592d30c739cSEd Maste 593d30c739cSEd Maste val = (addr[5] << 8) | addr[4]; 59448bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 595d30c739cSEd Maste 596d30c739cSEd Maste done: 597d30c739cSEd Maste return (err); 598d30c739cSEd Maste } 599d30c739cSEd Maste 600d30c739cSEd Maste /** 601d30c739cSEd Maste * lan78xx_set_rx_max_frame_length 602d30c739cSEd Maste * @sc: driver soft context 603d30c739cSEd Maste * @size: pointer to array contain at least 6 bytes of the mac 604d30c739cSEd Maste * 605d30c739cSEd Maste * Sets the maximum frame length to be received. Frames bigger than 606d30c739cSEd Maste * this size are aborted. 607d30c739cSEd Maste * 608d30c739cSEd Maste * RETURNS: 609d30c739cSEd Maste * Returns 0 on success or a negative error code. 610d30c739cSEd Maste */ 611d30c739cSEd Maste static int 612d30c739cSEd Maste lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 613d30c739cSEd Maste { 614d30c739cSEd Maste int err = 0; 615d30c739cSEd Maste uint32_t buf; 616d30c739cSEd Maste bool rxenabled; 617d30c739cSEd Maste 618e5151258SEd Maste /* First we have to disable rx before changing the length. */ 61948bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 62048bc1758SEd Maste rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 621d30c739cSEd Maste 622d30c739cSEd Maste if (rxenabled) { 62348bc1758SEd Maste buf &= ~ETH_MAC_RX_EN_; 62448bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 625d30c739cSEd Maste } 626d30c739cSEd Maste 627e5151258SEd Maste /* Setting max frame length. */ 62848bc1758SEd Maste buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 62948bc1758SEd Maste buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 63048bc1758SEd Maste ETH_MAC_RX_MAX_FR_SIZE_MASK_); 63148bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 632d30c739cSEd Maste 633d30c739cSEd Maste /* If it were enabled before, we enable it back. */ 634d30c739cSEd Maste 635d30c739cSEd Maste if (rxenabled) { 63648bc1758SEd Maste buf |= ETH_MAC_RX_EN_; 63748bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 638d30c739cSEd Maste } 639d30c739cSEd Maste 640e5151258SEd Maste return (0); 641d30c739cSEd Maste } 642d30c739cSEd Maste 643d30c739cSEd Maste /** 644d30c739cSEd Maste * lan78xx_miibus_readreg - Read a MII/MDIO register 645d30c739cSEd Maste * @dev: usb ether device 646d30c739cSEd Maste * @phy: the number of phy reading from 647d30c739cSEd Maste * @reg: the register address 648d30c739cSEd Maste * 649d30c739cSEd Maste * LOCKING: 650d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 651d30c739cSEd Maste * 652d30c739cSEd Maste * RETURNS: 653d30c739cSEd Maste * Returns the 16-bits read from the MII register, if this function fails 654d30c739cSEd Maste * 0 is returned. 655d30c739cSEd Maste */ 656d30c739cSEd Maste static int 657d30c739cSEd Maste lan78xx_miibus_readreg(device_t dev, int phy, int reg) { 658d30c739cSEd Maste 659d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 660d30c739cSEd Maste int locked; 661d30c739cSEd Maste uint32_t addr, val; 662d30c739cSEd Maste 663d30c739cSEd Maste val = 0; 664d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 665d30c739cSEd Maste if (!locked) 666d30c739cSEd Maste MUGE_LOCK(sc); 667d30c739cSEd Maste 66848bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 66948bc1758SEd Maste 0) { 670d30c739cSEd Maste muge_warn_printf(sc, "MII is busy\n"); 671d30c739cSEd Maste goto done; 672d30c739cSEd Maste } 673d30c739cSEd Maste 67448bc1758SEd Maste addr = (phy << 11) | (reg << 6) | 67548bc1758SEd Maste ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 67648bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_ACC, addr); 677d30c739cSEd Maste 67848bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 67948bc1758SEd Maste 0) { 680d30c739cSEd Maste muge_warn_printf(sc, "MII read timeout\n"); 681d30c739cSEd Maste goto done; 682d30c739cSEd Maste } 683d30c739cSEd Maste 68448bc1758SEd Maste lan78xx_read_reg(sc, ETH_MII_DATA, &val); 685d30c739cSEd Maste val = le32toh(val); 686d30c739cSEd Maste 687d30c739cSEd Maste done: 688d30c739cSEd Maste if (!locked) 689d30c739cSEd Maste MUGE_UNLOCK(sc); 690d30c739cSEd Maste 691d30c739cSEd Maste return (val & 0xFFFF); 692d30c739cSEd Maste } 693d30c739cSEd Maste 694d30c739cSEd Maste /** 695d30c739cSEd Maste * lan78xx_miibus_writereg - Writes a MII/MDIO register 696d30c739cSEd Maste * @dev: usb ether device 697d30c739cSEd Maste * @phy: the number of phy writing to 698d30c739cSEd Maste * @reg: the register address 699d30c739cSEd Maste * @val: the value to write 700d30c739cSEd Maste * 701d30c739cSEd Maste * Attempts to write a PHY register through the usb controller registers. 702d30c739cSEd Maste * 703d30c739cSEd Maste * LOCKING: 704d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 705d30c739cSEd Maste * 706d30c739cSEd Maste * RETURNS: 707d30c739cSEd Maste * Always returns 0 regardless of success or failure. 708d30c739cSEd Maste */ 709d30c739cSEd Maste static int 710d30c739cSEd Maste lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 711d30c739cSEd Maste { 712d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 713d30c739cSEd Maste int locked; 714d30c739cSEd Maste uint32_t addr; 715d30c739cSEd Maste 716d30c739cSEd Maste if (sc->sc_phyno != phy) 717d30c739cSEd Maste return (0); 718d30c739cSEd Maste 719d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 720d30c739cSEd Maste if (!locked) 721d30c739cSEd Maste MUGE_LOCK(sc); 722d30c739cSEd Maste 72348bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 72448bc1758SEd Maste 0) { 725d30c739cSEd Maste muge_warn_printf(sc, "MII is busy\n"); 726d30c739cSEd Maste goto done; 727d30c739cSEd Maste } 728d30c739cSEd Maste 729d30c739cSEd Maste val = htole32(val); 73048bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_DATA, val); 731d30c739cSEd Maste 732e5151258SEd Maste addr = (phy << 11) | (reg << 6) | 733e5151258SEd Maste ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 73448bc1758SEd Maste lan78xx_write_reg(sc, ETH_MII_ACC, addr); 735d30c739cSEd Maste 73648bc1758SEd Maste if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 737d30c739cSEd Maste muge_warn_printf(sc, "MII write timeout\n"); 738d30c739cSEd Maste 739d30c739cSEd Maste done: 740d30c739cSEd Maste if (!locked) 741d30c739cSEd Maste MUGE_UNLOCK(sc); 742d30c739cSEd Maste return (0); 743d30c739cSEd Maste } 744d30c739cSEd Maste 745d30c739cSEd Maste /* 746d30c739cSEd Maste * lan78xx_miibus_statchg - Called to detect phy status change 747d30c739cSEd Maste * @dev: usb ether device 748d30c739cSEd Maste * 749d30c739cSEd Maste * This function is called periodically by the system to poll for status 750d30c739cSEd Maste * changes of the link. 751d30c739cSEd Maste * 752d30c739cSEd Maste * LOCKING: 753d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 754d30c739cSEd Maste */ 755d30c739cSEd Maste static void 756d30c739cSEd Maste lan78xx_miibus_statchg(device_t dev) 757d30c739cSEd Maste { 758d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 759d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 760d30c739cSEd Maste struct ifnet *ifp; 761d30c739cSEd Maste int locked; 762d30c739cSEd Maste int err; 763d30c739cSEd Maste uint32_t flow = 0; 764d30c739cSEd Maste uint32_t fct_flow = 0; 765d30c739cSEd Maste 766d30c739cSEd Maste locked = mtx_owned(&sc->sc_mtx); 767d30c739cSEd Maste if (!locked) 768d30c739cSEd Maste MUGE_LOCK(sc); 769d30c739cSEd Maste 770d30c739cSEd Maste ifp = uether_getifp(&sc->sc_ue); 771d30c739cSEd Maste if (mii == NULL || ifp == NULL || 772d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 773d30c739cSEd Maste goto done; 774d30c739cSEd Maste 775d30c739cSEd Maste /* Use the MII status to determine link status */ 776d30c739cSEd Maste sc->sc_flags &= ~MUGE_FLAG_LINK; 777d30c739cSEd Maste if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 778d30c739cSEd Maste (IFM_ACTIVE | IFM_AVALID)) { 779d30c739cSEd Maste muge_dbg_printf(sc, "media is active\n"); 780d30c739cSEd Maste switch (IFM_SUBTYPE(mii->mii_media_active)) { 781d30c739cSEd Maste case IFM_10_T: 782d30c739cSEd Maste case IFM_100_TX: 783d30c739cSEd Maste sc->sc_flags |= MUGE_FLAG_LINK; 784d30c739cSEd Maste muge_dbg_printf(sc, "10/100 ethernet\n"); 785d30c739cSEd Maste break; 786d30c739cSEd Maste case IFM_1000_T: 787d30c739cSEd Maste sc->sc_flags |= MUGE_FLAG_LINK; 788d30c739cSEd Maste muge_dbg_printf(sc, "Gigabit ethernet\n"); 789d30c739cSEd Maste break; 790d30c739cSEd Maste default: 791d30c739cSEd Maste break; 792d30c739cSEd Maste } 793d30c739cSEd Maste } 794d30c739cSEd Maste /* Lost link, do nothing. */ 795d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 796d30c739cSEd Maste muge_dbg_printf(sc, "link flag not set\n"); 797d30c739cSEd Maste goto done; 798d30c739cSEd Maste } 799d30c739cSEd Maste 80048bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 801d30c739cSEd Maste if (err) { 802d30c739cSEd Maste muge_warn_printf(sc, 803d30c739cSEd Maste "failed to read initial flow control thresholds, error %d\n", 804d30c739cSEd Maste err); 805d30c739cSEd Maste goto done; 806d30c739cSEd Maste } 807d30c739cSEd Maste 808e5151258SEd Maste /* Enable/disable full duplex operation and TX/RX pause. */ 809d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 810d30c739cSEd Maste muge_dbg_printf(sc, "full duplex operation\n"); 811d30c739cSEd Maste 812e5151258SEd Maste /* Enable transmit MAC flow control function. */ 813d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 81448bc1758SEd Maste flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 815d30c739cSEd Maste 816d30c739cSEd Maste if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 81748bc1758SEd Maste flow |= ETH_FLOW_CR_RX_FCEN_; 818d30c739cSEd Maste } 819d30c739cSEd Maste 820e5151258SEd Maste /* XXX Flow control settings obtained from Microchip's driver. */ 821d30c739cSEd Maste switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 822d30c739cSEd Maste case USB_SPEED_SUPER: 823e5151258SEd Maste fct_flow = 0x817; 824d30c739cSEd Maste break; 825d30c739cSEd Maste case USB_SPEED_HIGH: 826e5151258SEd Maste fct_flow = 0x211; 827d30c739cSEd Maste break; 828d30c739cSEd Maste default: 829d30c739cSEd Maste break; 830d30c739cSEd Maste } 831d30c739cSEd Maste 83248bc1758SEd Maste err += lan78xx_write_reg(sc, ETH_FLOW, flow); 83348bc1758SEd Maste err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 834d30c739cSEd Maste if (err) 835d30c739cSEd Maste muge_warn_printf(sc, "media change failed, error %d\n", err); 836d30c739cSEd Maste 837d30c739cSEd Maste done: 838d30c739cSEd Maste if (!locked) 839d30c739cSEd Maste MUGE_UNLOCK(sc); 840d30c739cSEd Maste } 841d30c739cSEd Maste 842d30c739cSEd Maste /* 843d30c739cSEd Maste * lan78xx_set_mdix_auto - Configure the device to enable automatic 844d30c739cSEd Maste * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 845d30c739cSEd Maste * functionality for seamless crossover and polarity detection. 846d30c739cSEd Maste * 847d30c739cSEd Maste * @sc: driver soft context 848d30c739cSEd Maste * 849d30c739cSEd Maste * LOCKING: 850d30c739cSEd Maste * Takes and releases the device mutex lock if not already held. 851d30c739cSEd Maste */ 852d30c739cSEd Maste static void 853d30c739cSEd Maste lan78xx_set_mdix_auto(struct muge_softc *sc) 854d30c739cSEd Maste { 855d30c739cSEd Maste uint32_t buf, err; 856d30c739cSEd Maste 857d30c739cSEd Maste err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 858d30c739cSEd Maste MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 859d30c739cSEd Maste 860d30c739cSEd Maste buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 861d30c739cSEd Maste MUGE_EXT_MODE_CTRL); 862d30c739cSEd Maste buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 863d30c739cSEd Maste buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 864d30c739cSEd Maste 865d30c739cSEd Maste lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 866d30c739cSEd Maste err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 867d30c739cSEd Maste MUGE_EXT_MODE_CTRL, buf); 868d30c739cSEd Maste 869d30c739cSEd Maste err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 870d30c739cSEd Maste MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 871d30c739cSEd Maste 872d30c739cSEd Maste if (err != 0) 873d30c739cSEd Maste muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 874d30c739cSEd Maste 875d30c739cSEd Maste sc->sc_mdix_ctl = buf; 876d30c739cSEd Maste } 877d30c739cSEd Maste 878d30c739cSEd Maste /** 879d30c739cSEd Maste * lan78xx_phy_init - Initialises the in-built MUGE phy 880d30c739cSEd Maste * @sc: driver soft context 881d30c739cSEd Maste * 882d30c739cSEd Maste * Resets the PHY part of the chip and then initialises it to default 883d30c739cSEd Maste * values. The 'link down' and 'auto-negotiation complete' interrupts 884d30c739cSEd Maste * from the PHY are also enabled, however we don't monitor the interrupt 885d30c739cSEd Maste * endpoints for the moment. 886d30c739cSEd Maste * 887d30c739cSEd Maste * RETURNS: 888d30c739cSEd Maste * Returns 0 on success or EIO if failed to reset the PHY. 889d30c739cSEd Maste */ 890d30c739cSEd Maste static int 891d30c739cSEd Maste lan78xx_phy_init(struct muge_softc *sc) 892d30c739cSEd Maste { 893d30c739cSEd Maste muge_dbg_printf(sc, "Initializing PHY.\n"); 894d30c739cSEd Maste uint16_t bmcr; 895d30c739cSEd Maste usb_ticks_t start_ticks; 896d30c739cSEd Maste const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 897d30c739cSEd Maste 898d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 899d30c739cSEd Maste 900e5151258SEd Maste /* Reset phy and wait for reset to complete. */ 901d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 902d30c739cSEd Maste BMCR_RESET); 903d30c739cSEd Maste 904d30c739cSEd Maste start_ticks = ticks; 905d30c739cSEd Maste do { 906d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 907d30c739cSEd Maste bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 908d30c739cSEd Maste MII_BMCR); 909d30c739cSEd Maste } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 910d30c739cSEd Maste 911d30c739cSEd Maste if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 912d30c739cSEd Maste muge_err_printf(sc, "PHY reset timed-out\n"); 913d30c739cSEd Maste return (EIO); 914d30c739cSEd Maste } 915d30c739cSEd Maste 916d30c739cSEd Maste /* Setup phy to interrupt upon link down or autoneg completion. */ 917d30c739cSEd Maste lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 918d30c739cSEd Maste MUGE_PHY_INTR_STAT); 919d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 920d30c739cSEd Maste MUGE_PHY_INTR_MASK, 921d30c739cSEd Maste (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 922d30c739cSEd Maste 923d30c739cSEd Maste /* Enable Auto-MDIX for crossover and polarity detection. */ 924d30c739cSEd Maste lan78xx_set_mdix_auto(sc); 925d30c739cSEd Maste 926d30c739cSEd Maste /* Enable all modes. */ 927d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 928d30c739cSEd Maste ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 929d30c739cSEd Maste ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 930d30c739cSEd Maste 931e5151258SEd Maste /* Restart auto-negotation. */ 932d30c739cSEd Maste bmcr |= BMCR_STARTNEG; 933d30c739cSEd Maste bmcr |= BMCR_AUTOEN; 934d30c739cSEd Maste lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 935d30c739cSEd Maste bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 936d30c739cSEd Maste return (0); 937d30c739cSEd Maste } 938d30c739cSEd Maste 939d30c739cSEd Maste /** 940d30c739cSEd Maste * lan78xx_chip_init - Initialises the chip after power on 941d30c739cSEd Maste * @sc: driver soft context 942d30c739cSEd Maste * 943d30c739cSEd Maste * This initialisation sequence is modelled on the procedure in the Linux 944d30c739cSEd Maste * driver. 945d30c739cSEd Maste * 946d30c739cSEd Maste * RETURNS: 947d30c739cSEd Maste * Returns 0 on success or an error code on failure. 948d30c739cSEd Maste */ 949d30c739cSEd Maste static int 950d30c739cSEd Maste lan78xx_chip_init(struct muge_softc *sc) 951d30c739cSEd Maste { 952d30c739cSEd Maste int err; 953d30c739cSEd Maste uint32_t buf; 954d30c739cSEd Maste uint32_t burst_cap; 955d30c739cSEd Maste 956097f721bSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 957d30c739cSEd Maste 958e5151258SEd Maste /* Enter H/W config mode. */ 95948bc1758SEd Maste lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 960d30c739cSEd Maste 96148bc1758SEd Maste if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 96248bc1758SEd Maste 0) { 963d30c739cSEd Maste muge_warn_printf(sc, 964d30c739cSEd Maste "timed-out waiting for lite reset to complete\n"); 965d30c739cSEd Maste goto init_failed; 966d30c739cSEd Maste } 967d30c739cSEd Maste 968e5151258SEd Maste /* Set the mac address. */ 969d30c739cSEd Maste if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 970d30c739cSEd Maste muge_warn_printf(sc, "failed to set the MAC address\n"); 971d30c739cSEd Maste goto init_failed; 972d30c739cSEd Maste } 973d30c739cSEd Maste 974e5151258SEd Maste /* Read and display the revision register. */ 97503ba5353SEd Maste if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 97648bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 97748bc1758SEd Maste err); 978d30c739cSEd Maste goto init_failed; 979d30c739cSEd Maste } 98003ba5353SEd Maste sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 98103ba5353SEd Maste sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 9822d14fb8bSEd Maste switch (sc->chipid) { 9832d14fb8bSEd Maste case ETH_ID_REV_CHIP_ID_7800_: 9842d14fb8bSEd Maste case ETH_ID_REV_CHIP_ID_7850_: 9852d14fb8bSEd Maste break; 9862d14fb8bSEd Maste default: 98703ba5353SEd Maste muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 98803ba5353SEd Maste sc->chipid); 98903ba5353SEd Maste goto init_failed; 99003ba5353SEd Maste } 99103ba5353SEd Maste device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 99203ba5353SEd Maste sc->chiprev); 993d30c739cSEd Maste 994d30c739cSEd Maste /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 99548bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 99648bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 997d30c739cSEd Maste goto init_failed; 998d30c739cSEd Maste } 99948bc1758SEd Maste buf |= ETH_USB_CFG_BIR_; 100048bc1758SEd Maste lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1001d30c739cSEd Maste 1002d30c739cSEd Maste /* 1003e5151258SEd Maste * XXX LTM support will go here. 1004d30c739cSEd Maste */ 1005d30c739cSEd Maste 1006d30c739cSEd Maste /* Configuring the burst cap. */ 1007d30c739cSEd Maste switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1008d30c739cSEd Maste case USB_SPEED_SUPER: 1009d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1010d30c739cSEd Maste break; 1011d30c739cSEd Maste case USB_SPEED_HIGH: 1012d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1013d30c739cSEd Maste break; 1014d30c739cSEd Maste default: 1015d30c739cSEd Maste burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1016d30c739cSEd Maste } 1017d30c739cSEd Maste 101848bc1758SEd Maste lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1019d30c739cSEd Maste 1020e5151258SEd Maste /* Set the default bulk in delay (same value from Linux driver). */ 102148bc1758SEd Maste lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1022d30c739cSEd Maste 1023e5151258SEd Maste /* Multiple ethernet frames per USB packets. */ 102448bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 102548bc1758SEd Maste buf |= ETH_HW_CFG_MEF_; 102648bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1027d30c739cSEd Maste 1028d30c739cSEd Maste /* Enable burst cap. */ 102948bc1758SEd Maste if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 103048bc1758SEd Maste muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1031d30c739cSEd Maste err); 1032d30c739cSEd Maste goto init_failed; 1033d30c739cSEd Maste } 103448bc1758SEd Maste buf |= ETH_USB_CFG_BCE_; 103548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1036d30c739cSEd Maste 1037d30c739cSEd Maste /* 1038d30c739cSEd Maste * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1039d30c739cSEd Maste * already the default value. But we initialize it to the same value 1040d30c739cSEd Maste * anyways, as that's what the Linux driver does. 1041d30c739cSEd Maste * 1042d30c739cSEd Maste */ 1043d30c739cSEd Maste buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 104448bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1045d30c739cSEd Maste 1046d30c739cSEd Maste buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 104748bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1048d30c739cSEd Maste 1049d30c739cSEd Maste /* Enabling interrupts. (Not using them for now) */ 105048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1051d30c739cSEd Maste 1052d30c739cSEd Maste /* 1053d30c739cSEd Maste * Initializing flow control registers to 0. These registers are 1054d30c739cSEd Maste * properly set is handled in link-reset function in the Linux driver. 1055d30c739cSEd Maste */ 105648bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FLOW, 0); 105748bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1058d30c739cSEd Maste 1059d30c739cSEd Maste /* 1060d30c739cSEd Maste * Settings for the RFE, we enable broadcast and destination address 1061d30c739cSEd Maste * perfect filtering. 1062d30c739cSEd Maste */ 106348bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 106448bc1758SEd Maste buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 106548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1066d30c739cSEd Maste 1067d30c739cSEd Maste /* 1068d30c739cSEd Maste * At this point the Linux driver writes multicast tables, and enables 1069d30c739cSEd Maste * checksum engines. But in FreeBSD that gets done in muge_init, 1070d30c739cSEd Maste * which gets called when the interface is brought up. 1071d30c739cSEd Maste */ 1072d30c739cSEd Maste 1073d30c739cSEd Maste /* Reset the PHY. */ 107448bc1758SEd Maste lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 107548bc1758SEd Maste if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 107648bc1758SEd Maste ETH_PMT_CTL_PHY_RST_)) != 0) { 1077d30c739cSEd Maste muge_warn_printf(sc, 1078d30c739cSEd Maste "timed-out waiting for phy reset to complete\n"); 1079d30c739cSEd Maste goto init_failed; 1080d30c739cSEd Maste } 1081d30c739cSEd Maste 108248bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 10832d14fb8bSEd Maste if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 10842d14fb8bSEd Maste !lan78xx_eeprom_present(sc)) { 10852d14fb8bSEd Maste /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 108648bc1758SEd Maste buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 10872d14fb8bSEd Maste } 108848bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1089d30c739cSEd Maste 1090d30c739cSEd Maste /* 1091d30c739cSEd Maste * Enable PHY interrupts (Not really getting used for now) 109248bc1758SEd Maste * ETH_INT_EP_CTL: interrupt endpoint control register 1093d30c739cSEd Maste * phy events cause interrupts to be issued 1094d30c739cSEd Maste */ 109548bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 109648bc1758SEd Maste buf |= ETH_INT_ENP_PHY_INT; 109748bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1098d30c739cSEd Maste 1099d30c739cSEd Maste /* 1100d30c739cSEd Maste * Enables mac's transmitter. It will transmit frames from the buffer 1101d30c739cSEd Maste * onto the cable. 1102d30c739cSEd Maste */ 110348bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 110448bc1758SEd Maste buf |= ETH_MAC_TX_TXEN_; 110548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1106d30c739cSEd Maste 1107e5151258SEd Maste /* FIFO is capable of transmitting frames to MAC. */ 110848bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 110948bc1758SEd Maste buf |= ETH_FCT_TX_CTL_EN_; 111048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1111d30c739cSEd Maste 1112d30c739cSEd Maste /* 1113d30c739cSEd Maste * Set max frame length. In linux this is dev->mtu (which by default 1114e5151258SEd Maste * is 1500) + VLAN_ETH_HLEN = 1518. 1115d30c739cSEd Maste */ 1116d30c739cSEd Maste err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1117d30c739cSEd Maste 1118e5151258SEd Maste /* Initialise the PHY. */ 1119d30c739cSEd Maste if ((err = lan78xx_phy_init(sc)) != 0) 1120d30c739cSEd Maste goto init_failed; 1121d30c739cSEd Maste 1122e5151258SEd Maste /* Enable MAC RX. */ 112348bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 112448bc1758SEd Maste buf |= ETH_MAC_RX_EN_; 112548bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1126d30c739cSEd Maste 1127e5151258SEd Maste /* Enable FIFO controller RX. */ 112848bc1758SEd Maste err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 112948bc1758SEd Maste buf |= ETH_FCT_TX_CTL_EN_; 113048bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1131d30c739cSEd Maste 113249b2a5feSEd Maste sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1133e5151258SEd Maste return (0); 1134d30c739cSEd Maste 1135d30c739cSEd Maste init_failed: 1136d30c739cSEd Maste muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1137d30c739cSEd Maste return (err); 1138d30c739cSEd Maste } 1139d30c739cSEd Maste 1140d30c739cSEd Maste static void 1141d30c739cSEd Maste muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1142d30c739cSEd Maste { 1143d30c739cSEd Maste struct muge_softc *sc = usbd_xfer_softc(xfer); 1144d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 1145d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 1146d30c739cSEd Maste struct mbuf *m; 1147d30c739cSEd Maste struct usb_page_cache *pc; 1148d30c739cSEd Maste uint16_t pktlen; 1149d30c739cSEd Maste uint32_t rx_cmd_a, rx_cmd_b; 1150d30c739cSEd Maste uint16_t rx_cmd_c; 1151d30c739cSEd Maste int off; 1152d30c739cSEd Maste int actlen; 1153d30c739cSEd Maste 1154d30c739cSEd Maste usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1155d30c739cSEd Maste muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1156d30c739cSEd Maste 1157d30c739cSEd Maste switch (USB_GET_STATE(xfer)) { 1158d30c739cSEd Maste case USB_ST_TRANSFERRED: 1159d30c739cSEd Maste 1160d30c739cSEd Maste /* 1161d30c739cSEd Maste * There is always a zero length frame after bringing the 1162d30c739cSEd Maste * interface up. 1163d30c739cSEd Maste */ 1164d30c739cSEd Maste if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1165d30c739cSEd Maste goto tr_setup; 1166d30c739cSEd Maste 1167d30c739cSEd Maste /* 1168d30c739cSEd Maste * There may be multiple packets in the USB frame. Each will 1169d30c739cSEd Maste * have a header and each needs to have its own mbuf allocated 1170d30c739cSEd Maste * and populated for it. 1171d30c739cSEd Maste */ 1172d30c739cSEd Maste pc = usbd_xfer_get_frame(xfer, 0); 1173d30c739cSEd Maste off = 0; 1174d30c739cSEd Maste 1175d30c739cSEd Maste while (off < actlen) { 1176d30c739cSEd Maste 1177d30c739cSEd Maste /* The frame header is aligned on a 4 byte boundary. */ 1178d30c739cSEd Maste off = ((off + 0x3) & ~0x3); 1179d30c739cSEd Maste 1180d30c739cSEd Maste /* Extract RX CMD A. */ 1181d30c739cSEd Maste if (off + sizeof(rx_cmd_a) > actlen) 1182d30c739cSEd Maste goto tr_setup; 1183d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1184d30c739cSEd Maste off += (sizeof(rx_cmd_a)); 1185d30c739cSEd Maste rx_cmd_a = le32toh(rx_cmd_a); 1186d30c739cSEd Maste 1187d30c739cSEd Maste 1188d30c739cSEd Maste /* Extract RX CMD B. */ 1189d30c739cSEd Maste if (off + sizeof(rx_cmd_b) > actlen) 1190d30c739cSEd Maste goto tr_setup; 1191d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1192d30c739cSEd Maste off += (sizeof(rx_cmd_b)); 1193d30c739cSEd Maste rx_cmd_b = le32toh(rx_cmd_b); 1194d30c739cSEd Maste 1195d30c739cSEd Maste 1196d30c739cSEd Maste /* Extract RX CMD C. */ 1197d30c739cSEd Maste if (off + sizeof(rx_cmd_c) > actlen) 1198d30c739cSEd Maste goto tr_setup; 1199d30c739cSEd Maste usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1200d30c739cSEd Maste off += (sizeof(rx_cmd_c)); 1201d30c739cSEd Maste rx_cmd_c = le32toh(rx_cmd_c); 1202d30c739cSEd Maste 1203d30c739cSEd Maste if (off > actlen) 1204d30c739cSEd Maste goto tr_setup; 1205d30c739cSEd Maste 1206d30c739cSEd Maste pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1207d30c739cSEd Maste 1208d30c739cSEd Maste muge_dbg_printf(sc, 1209d30c739cSEd Maste "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1210d30c739cSEd Maste " pktlen %d actlen %d off %d\n", 1211d30c739cSEd Maste rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1212d30c739cSEd Maste 1213d30c739cSEd Maste if (rx_cmd_a & RX_CMD_A_RED_) { 1214d30c739cSEd Maste muge_dbg_printf(sc, 1215d30c739cSEd Maste "rx error (hdr 0x%08x)\n", rx_cmd_a); 1216d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1217d30c739cSEd Maste } else { 1218d30c739cSEd Maste /* Ethernet frame too big or too small? */ 1219d30c739cSEd Maste if ((pktlen < ETHER_HDR_LEN) || 1220d30c739cSEd Maste (pktlen > (actlen - off))) 1221d30c739cSEd Maste goto tr_setup; 1222d30c739cSEd Maste 1223e5151258SEd Maste /* Create a new mbuf to store the packet. */ 1224d30c739cSEd Maste m = uether_newbuf(); 1225d30c739cSEd Maste if (m == NULL) { 1226d30c739cSEd Maste muge_warn_printf(sc, 1227d30c739cSEd Maste "failed to create new mbuf\n"); 1228d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1229d30c739cSEd Maste 1); 1230d30c739cSEd Maste goto tr_setup; 1231d30c739cSEd Maste } 1232d30c739cSEd Maste 1233d30c739cSEd Maste usbd_copy_out(pc, off, mtod(m, uint8_t *), 1234d30c739cSEd Maste pktlen); 1235d30c739cSEd Maste 1236d30c739cSEd Maste /* 1237d30c739cSEd Maste * Check if RX checksums are computed, and 1238d30c739cSEd Maste * offload them 1239d30c739cSEd Maste */ 1240d30c739cSEd Maste if ((ifp->if_capabilities & IFCAP_RXCSUM) && 1241d30c739cSEd Maste !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1242d30c739cSEd Maste struct ether_header *eh; 1243d30c739cSEd Maste eh = mtod(m, struct ether_header *); 1244d30c739cSEd Maste /* 1245d30c739cSEd Maste * Remove the extra 2 bytes of the csum 1246d30c739cSEd Maste * 1247d30c739cSEd Maste * The checksum appears to be 1248d30c739cSEd Maste * simplistically calculated over the 1249d30c739cSEd Maste * protocol headers up to the end of the 1250d30c739cSEd Maste * eth frame. Which means if the eth 1251d30c739cSEd Maste * frame is padded the csum calculation 1252d30c739cSEd Maste * is incorrectly performed over the 1253d30c739cSEd Maste * padding bytes as well. Therefore to 1254d30c739cSEd Maste * be safe we ignore the H/W csum on 1255d30c739cSEd Maste * frames less than or equal to 1256d30c739cSEd Maste * 64 bytes. 1257d30c739cSEd Maste * 1258d30c739cSEd Maste * Protocols checksummed: 1259d30c739cSEd Maste * TCP, UDP, ICMP, IGMP, IP 1260d30c739cSEd Maste */ 1261d30c739cSEd Maste if (pktlen > ETHER_MIN_LEN) { 1262d30c739cSEd Maste m->m_pkthdr.csum_flags |= 1263d30c739cSEd Maste CSUM_DATA_VALID; 1264d30c739cSEd Maste 1265d30c739cSEd Maste /* 1266d30c739cSEd Maste * Copy the checksum from the 1267d30c739cSEd Maste * last 2 bytes of the transfer 1268d30c739cSEd Maste * and put in the csum_data 1269d30c739cSEd Maste * field. 1270d30c739cSEd Maste */ 1271d30c739cSEd Maste usbd_copy_out(pc, 1272d30c739cSEd Maste (off + pktlen), 1273d30c739cSEd Maste &m->m_pkthdr.csum_data, 2); 1274d30c739cSEd Maste 1275d30c739cSEd Maste /* 1276d30c739cSEd Maste * The data is copied in network 1277d30c739cSEd Maste * order, but the csum algorithm 1278d30c739cSEd Maste * in the kernel expects it to 1279d30c739cSEd Maste * be in host network order. 1280d30c739cSEd Maste */ 1281d30c739cSEd Maste m->m_pkthdr.csum_data = 1282d30c739cSEd Maste ntohs(m->m_pkthdr.csum_data); 1283d30c739cSEd Maste 1284d30c739cSEd Maste muge_dbg_printf(sc, 1285d30c739cSEd Maste "RX checksum offloaded (0x%04x)\n", 1286d30c739cSEd Maste m->m_pkthdr.csum_data); 1287d30c739cSEd Maste } 1288d30c739cSEd Maste } 1289d30c739cSEd Maste 1290d30c739cSEd Maste /* Enqueue the mbuf on the receive queue. */ 1291d30c739cSEd Maste if (pktlen < (4 + ETHER_HDR_LEN)) { 1292d30c739cSEd Maste m_freem(m); 1293d30c739cSEd Maste goto tr_setup; 1294d30c739cSEd Maste } 1295d30c739cSEd Maste /* Remove 4 trailing bytes */ 1296d30c739cSEd Maste uether_rxmbuf(ue, m, pktlen - 4); 1297d30c739cSEd Maste } 1298d30c739cSEd Maste 1299d30c739cSEd Maste /* 1300d30c739cSEd Maste * Update the offset to move to the next potential 1301d30c739cSEd Maste * packet. 1302d30c739cSEd Maste */ 1303d30c739cSEd Maste off += pktlen; 1304d30c739cSEd Maste } 1305d30c739cSEd Maste 1306d30c739cSEd Maste /* FALLTHROUGH */ 1307d30c739cSEd Maste case USB_ST_SETUP: 1308d30c739cSEd Maste tr_setup: 1309d30c739cSEd Maste usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1310d30c739cSEd Maste usbd_transfer_submit(xfer); 1311d30c739cSEd Maste uether_rxflush(ue); 1312d30c739cSEd Maste return; 1313d30c739cSEd Maste 1314d30c739cSEd Maste default: 1315d30c739cSEd Maste if (error != USB_ERR_CANCELLED) { 1316d30c739cSEd Maste muge_warn_printf(sc, "bulk read error, %s\n", 1317d30c739cSEd Maste usbd_errstr(error)); 1318d30c739cSEd Maste usbd_xfer_set_stall(xfer); 1319d30c739cSEd Maste goto tr_setup; 1320d30c739cSEd Maste } 1321d30c739cSEd Maste return; 1322d30c739cSEd Maste } 1323d30c739cSEd Maste } 1324d30c739cSEd Maste 1325d30c739cSEd Maste /** 1326d30c739cSEd Maste * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1327d30c739cSEd Maste * @xfer: the USB transfer 1328d30c739cSEd Maste * @error: error code if the transfers is in an errored state 1329d30c739cSEd Maste * 1330d30c739cSEd Maste * The main write function that pulls ethernet frames off the queue and 1331d30c739cSEd Maste * sends them out. 1332d30c739cSEd Maste * 1333d30c739cSEd Maste */ 1334d30c739cSEd Maste static void 1335d30c739cSEd Maste muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1336d30c739cSEd Maste { 1337d30c739cSEd Maste struct muge_softc *sc = usbd_xfer_softc(xfer); 1338d30c739cSEd Maste struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1339d30c739cSEd Maste struct usb_page_cache *pc; 1340d30c739cSEd Maste struct mbuf *m; 1341d30c739cSEd Maste int nframes; 1342d30c739cSEd Maste uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1343d30c739cSEd Maste 1344d30c739cSEd Maste switch (USB_GET_STATE(xfer)) { 1345d30c739cSEd Maste case USB_ST_TRANSFERRED: 1346d30c739cSEd Maste muge_dbg_printf(sc, 1347d30c739cSEd Maste "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1348d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1349d30c739cSEd Maste /* FALLTHROUGH */ 1350d30c739cSEd Maste case USB_ST_SETUP: 1351d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1352d30c739cSEd Maste tr_setup: 1353d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1354d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1355d30c739cSEd Maste muge_dbg_printf(sc, 1356d30c739cSEd Maste "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1357d30c739cSEd Maste (sc->sc_flags & MUGE_FLAG_LINK)); 1358d30c739cSEd Maste muge_dbg_printf(sc, 1359d30c739cSEd Maste "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1360d30c739cSEd Maste (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1361d30c739cSEd Maste muge_dbg_printf(sc, 1362d30c739cSEd Maste "USB TRANSFER not sending: no link or controller is busy \n"); 1363d30c739cSEd Maste /* 1364d30c739cSEd Maste * Don't send anything if there is no link or 1365d30c739cSEd Maste * controller is busy. 1366d30c739cSEd Maste */ 1367d30c739cSEd Maste return; 1368d30c739cSEd Maste } 1369d30c739cSEd Maste for (nframes = 0; nframes < 16 && 1370d30c739cSEd Maste !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1371d30c739cSEd Maste IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1372d30c739cSEd Maste if (m == NULL) 1373d30c739cSEd Maste break; 1374d30c739cSEd Maste usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1375d30c739cSEd Maste nframes); 1376d30c739cSEd Maste frm_len = 0; 1377d30c739cSEd Maste pc = usbd_xfer_get_frame(xfer, nframes); 1378d30c739cSEd Maste 1379d30c739cSEd Maste /* 1380d30c739cSEd Maste * Each frame is prefixed with two 32-bit values 1381d30c739cSEd Maste * describing the length of the packet and buffer. 1382d30c739cSEd Maste */ 1383d30c739cSEd Maste tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1384d30c739cSEd Maste TX_CMD_A_FCS_; 1385d30c739cSEd Maste tx_cmd_a = htole32(tx_cmd_a); 1386d30c739cSEd Maste usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1387d30c739cSEd Maste 1388d30c739cSEd Maste tx_cmd_b = 0; 1389d30c739cSEd Maste 1390d30c739cSEd Maste /* TCP LSO Support will probably be implemented here. */ 1391d30c739cSEd Maste tx_cmd_b = htole32(tx_cmd_b); 1392d30c739cSEd Maste usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1393d30c739cSEd Maste 1394d30c739cSEd Maste frm_len += 8; 1395d30c739cSEd Maste 1396d30c739cSEd Maste /* Next copy in the actual packet */ 1397d30c739cSEd Maste usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1398d30c739cSEd Maste frm_len += m->m_pkthdr.len; 1399d30c739cSEd Maste 1400d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1401d30c739cSEd Maste 1402d30c739cSEd Maste /* 1403d30c739cSEd Maste * If there's a BPF listener, bounce a copy of this 1404d30c739cSEd Maste * frame to it. 1405d30c739cSEd Maste */ 1406d30c739cSEd Maste BPF_MTAP(ifp, m); 1407d30c739cSEd Maste m_freem(m); 1408d30c739cSEd Maste 1409d30c739cSEd Maste /* Set frame length. */ 1410d30c739cSEd Maste usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1411d30c739cSEd Maste } 1412d30c739cSEd Maste 1413d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1414d30c739cSEd Maste if (nframes != 0) { 1415d30c739cSEd Maste muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1416d30c739cSEd Maste usbd_xfer_set_frames(xfer, nframes); 1417d30c739cSEd Maste usbd_transfer_submit(xfer); 1418d30c739cSEd Maste ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1419d30c739cSEd Maste } 1420d30c739cSEd Maste return; 1421d30c739cSEd Maste 1422d30c739cSEd Maste default: 1423d30c739cSEd Maste if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1424d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1425d30c739cSEd Maste 1426d30c739cSEd Maste if (error != USB_ERR_CANCELLED) { 1427d30c739cSEd Maste muge_err_printf(sc, 1428d30c739cSEd Maste "usb error on tx: %s\n", usbd_errstr(error)); 1429d30c739cSEd Maste usbd_xfer_set_stall(xfer); 1430d30c739cSEd Maste goto tr_setup; 1431d30c739cSEd Maste } 1432d30c739cSEd Maste return; 1433d30c739cSEd Maste } 1434d30c739cSEd Maste } 1435d30c739cSEd Maste 1436*b4872d67SOleksandr Tymoshenko #ifdef FDT 1437d30c739cSEd Maste /** 1438*b4872d67SOleksandr Tymoshenko * muge_fdt_find_eth_node - find descendant node with required compatibility 1439*b4872d67SOleksandr Tymoshenko * @start: start node 1440*b4872d67SOleksandr Tymoshenko * @compatible: compatible string used to identify the node 1441*b4872d67SOleksandr Tymoshenko * 1442*b4872d67SOleksandr Tymoshenko * Loop through all descendant nodes and return first match with required 1443*b4872d67SOleksandr Tymoshenko * compatibility. 1444*b4872d67SOleksandr Tymoshenko * 1445*b4872d67SOleksandr Tymoshenko * RETURNS: 1446*b4872d67SOleksandr Tymoshenko * Returns node's phandle on success -1 otherwise 1447*b4872d67SOleksandr Tymoshenko */ 1448*b4872d67SOleksandr Tymoshenko static phandle_t 1449*b4872d67SOleksandr Tymoshenko muge_fdt_find_eth_node(phandle_t start, const char *compatible) 1450*b4872d67SOleksandr Tymoshenko { 1451*b4872d67SOleksandr Tymoshenko phandle_t child, node; 1452*b4872d67SOleksandr Tymoshenko 1453*b4872d67SOleksandr Tymoshenko /* Traverse through entire tree to find usb ethernet nodes. */ 1454*b4872d67SOleksandr Tymoshenko for (node = OF_child(start); node != 0; node = OF_peer(node)) { 1455*b4872d67SOleksandr Tymoshenko if (ofw_bus_node_is_compatible(node, compatible)) 1456*b4872d67SOleksandr Tymoshenko return (node); 1457*b4872d67SOleksandr Tymoshenko child = muge_fdt_find_eth_node(node, compatible); 1458*b4872d67SOleksandr Tymoshenko if (child != -1) 1459*b4872d67SOleksandr Tymoshenko return (child); 1460*b4872d67SOleksandr Tymoshenko } 1461*b4872d67SOleksandr Tymoshenko 1462*b4872d67SOleksandr Tymoshenko return (-1); 1463*b4872d67SOleksandr Tymoshenko } 1464*b4872d67SOleksandr Tymoshenko 1465*b4872d67SOleksandr Tymoshenko /** 1466*b4872d67SOleksandr Tymoshenko * muge_fdt_read_mac_property - read MAC address from node 1467*b4872d67SOleksandr Tymoshenko * @node: USB device node 1468*b4872d67SOleksandr Tymoshenko * @mac: memory to store MAC address to 1469*b4872d67SOleksandr Tymoshenko * 1470*b4872d67SOleksandr Tymoshenko * Check for common properties that might contain MAC address 1471*b4872d67SOleksandr Tymoshenko * passed by boot loader. 1472*b4872d67SOleksandr Tymoshenko * 1473*b4872d67SOleksandr Tymoshenko * RETURNS: 1474*b4872d67SOleksandr Tymoshenko * Returns 0 on success, error code otherwise 1475*b4872d67SOleksandr Tymoshenko */ 1476*b4872d67SOleksandr Tymoshenko static int 1477*b4872d67SOleksandr Tymoshenko muge_fdt_read_mac_property(phandle_t node, unsigned char *mac) 1478*b4872d67SOleksandr Tymoshenko { 1479*b4872d67SOleksandr Tymoshenko int len; 1480*b4872d67SOleksandr Tymoshenko 1481*b4872d67SOleksandr Tymoshenko /* Check if there is property */ 1482*b4872d67SOleksandr Tymoshenko if ((len = OF_getproplen(node, "local-mac-address")) > 0) { 1483*b4872d67SOleksandr Tymoshenko if (len != ETHER_ADDR_LEN) 1484*b4872d67SOleksandr Tymoshenko return (EINVAL); 1485*b4872d67SOleksandr Tymoshenko 1486*b4872d67SOleksandr Tymoshenko OF_getprop(node, "local-mac-address", mac, 1487*b4872d67SOleksandr Tymoshenko ETHER_ADDR_LEN); 1488*b4872d67SOleksandr Tymoshenko return (0); 1489*b4872d67SOleksandr Tymoshenko } 1490*b4872d67SOleksandr Tymoshenko 1491*b4872d67SOleksandr Tymoshenko if ((len = OF_getproplen(node, "mac-address")) > 0) { 1492*b4872d67SOleksandr Tymoshenko if (len != ETHER_ADDR_LEN) 1493*b4872d67SOleksandr Tymoshenko return (EINVAL); 1494*b4872d67SOleksandr Tymoshenko 1495*b4872d67SOleksandr Tymoshenko OF_getprop(node, "mac-address", mac, 1496*b4872d67SOleksandr Tymoshenko ETHER_ADDR_LEN); 1497*b4872d67SOleksandr Tymoshenko return (0); 1498*b4872d67SOleksandr Tymoshenko } 1499*b4872d67SOleksandr Tymoshenko 1500*b4872d67SOleksandr Tymoshenko return (ENXIO); 1501*b4872d67SOleksandr Tymoshenko } 1502*b4872d67SOleksandr Tymoshenko 1503*b4872d67SOleksandr Tymoshenko /** 1504*b4872d67SOleksandr Tymoshenko * muge_fdt_find_mac - read MAC address from node 1505*b4872d67SOleksandr Tymoshenko * @compatible: compatible string for DTB node in the form "usb[N]NNN,[M]MMM" 1506*b4872d67SOleksandr Tymoshenko * where NNN is vendor id and MMM is product id 1507*b4872d67SOleksandr Tymoshenko * @mac: memory to store MAC address to 1508*b4872d67SOleksandr Tymoshenko * 1509*b4872d67SOleksandr Tymoshenko * Tries to find matching node in DTS and obtain MAC address info from it 1510*b4872d67SOleksandr Tymoshenko * 1511*b4872d67SOleksandr Tymoshenko * RETURNS: 1512*b4872d67SOleksandr Tymoshenko * Returns 0 on success, error code otherwise 1513*b4872d67SOleksandr Tymoshenko */ 1514*b4872d67SOleksandr Tymoshenko static int 1515*b4872d67SOleksandr Tymoshenko muge_fdt_find_mac(const char *compatible, unsigned char *mac) 1516*b4872d67SOleksandr Tymoshenko { 1517*b4872d67SOleksandr Tymoshenko phandle_t node, root; 1518*b4872d67SOleksandr Tymoshenko 1519*b4872d67SOleksandr Tymoshenko root = OF_finddevice("/"); 1520*b4872d67SOleksandr Tymoshenko node = muge_fdt_find_eth_node(root, compatible); 1521*b4872d67SOleksandr Tymoshenko if (node != -1) { 1522*b4872d67SOleksandr Tymoshenko if (muge_fdt_read_mac_property(node, mac) == 0) 1523*b4872d67SOleksandr Tymoshenko return (0); 1524*b4872d67SOleksandr Tymoshenko } 1525*b4872d67SOleksandr Tymoshenko 1526*b4872d67SOleksandr Tymoshenko return (ENXIO); 1527*b4872d67SOleksandr Tymoshenko } 1528*b4872d67SOleksandr Tymoshenko #endif 1529*b4872d67SOleksandr Tymoshenko 1530*b4872d67SOleksandr Tymoshenko /** 1531*b4872d67SOleksandr Tymoshenko * muge_set_mac_addr - Initiailizes NIC MAC address 1532d30c739cSEd Maste * @ue: the USB ethernet device 1533d30c739cSEd Maste * 1534*b4872d67SOleksandr Tymoshenko * Tries to obtain MAC address from number of sources: registers, 1535*b4872d67SOleksandr Tymoshenko * EEPROM, DTB blob. If all sources fail - generates random MAC. 1536d30c739cSEd Maste */ 1537d30c739cSEd Maste static void 1538*b4872d67SOleksandr Tymoshenko muge_set_mac_addr(struct usb_ether *ue) 1539d30c739cSEd Maste { 1540d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1541d30c739cSEd Maste uint32_t mac_h, mac_l; 1542*b4872d67SOleksandr Tymoshenko #ifdef FDT 1543*b4872d67SOleksandr Tymoshenko char compatible[16]; 1544*b4872d67SOleksandr Tymoshenko struct usb_attach_arg *uaa = device_get_ivars(ue->ue_dev); 1545*b4872d67SOleksandr Tymoshenko #endif 1546d30c739cSEd Maste 1547d30c739cSEd Maste memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1548d30c739cSEd Maste 1549d30c739cSEd Maste uint32_t val; 1550d30c739cSEd Maste lan78xx_read_reg(sc, 0, &val); 1551d30c739cSEd Maste 1552e5151258SEd Maste /* Read current MAC address from RX_ADDRx registers. */ 155348bc1758SEd Maste if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 155448bc1758SEd Maste (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1555d30c739cSEd Maste sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1556d30c739cSEd Maste sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1557d30c739cSEd Maste sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1558d30c739cSEd Maste sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1559d30c739cSEd Maste sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1560d30c739cSEd Maste sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1561d30c739cSEd Maste } 1562d30c739cSEd Maste 1563e5151258SEd Maste /* If RX_ADDRx did not provide a valid MAC address, try EEPROM. */ 1564*b4872d67SOleksandr Tymoshenko if (ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1565*b4872d67SOleksandr Tymoshenko muge_dbg_printf(sc, "MAC assigned from registers\n"); 1566*b4872d67SOleksandr Tymoshenko return; 1567*b4872d67SOleksandr Tymoshenko } 1568*b4872d67SOleksandr Tymoshenko 15692c8cf0c5SEd Maste if ((lan78xx_eeprom_present(sc) && 15702c8cf0c5SEd Maste lan78xx_eeprom_read_raw(sc, ETH_E2P_MAC_OFFSET, 1571d30c739cSEd Maste sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN) == 0) || 1572d30c739cSEd Maste (lan78xx_otp_read(sc, OTP_MAC_OFFSET, 1573d30c739cSEd Maste sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN) == 0)) { 1574d30c739cSEd Maste if (ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1575d30c739cSEd Maste muge_dbg_printf(sc, "MAC read from EEPROM\n"); 1576*b4872d67SOleksandr Tymoshenko return; 1577d30c739cSEd Maste } 1578*b4872d67SOleksandr Tymoshenko } 1579*b4872d67SOleksandr Tymoshenko 1580*b4872d67SOleksandr Tymoshenko #ifdef FDT 1581*b4872d67SOleksandr Tymoshenko snprintf(compatible, sizeof(compatible), "usb%x,%x", 1582*b4872d67SOleksandr Tymoshenko uaa->info.idVendor, uaa->info.idProduct); 1583*b4872d67SOleksandr Tymoshenko if (muge_fdt_find_mac(compatible, sc->sc_ue.ue_eaddr) == 0) { 1584*b4872d67SOleksandr Tymoshenko muge_dbg_printf(sc, "MAC assigned from FDT blob\n"); 1585*b4872d67SOleksandr Tymoshenko return; 1586*b4872d67SOleksandr Tymoshenko } 1587*b4872d67SOleksandr Tymoshenko #endif 1588*b4872d67SOleksandr Tymoshenko 1589d30c739cSEd Maste muge_dbg_printf(sc, "MAC assigned randomly\n"); 1590d30c739cSEd Maste arc4rand(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN, 0); 1591d30c739cSEd Maste sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1592d30c739cSEd Maste sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1593d30c739cSEd Maste } 1594*b4872d67SOleksandr Tymoshenko 1595*b4872d67SOleksandr Tymoshenko /** 1596*b4872d67SOleksandr Tymoshenko * muge_attach_post - Called after the driver attached to the USB interface 1597*b4872d67SOleksandr Tymoshenko * @ue: the USB ethernet device 1598*b4872d67SOleksandr Tymoshenko * 1599*b4872d67SOleksandr Tymoshenko * This is where the chip is intialised for the first time. This is 1600*b4872d67SOleksandr Tymoshenko * different from the muge_init() function in that that one is designed to 1601*b4872d67SOleksandr Tymoshenko * setup the H/W to match the UE settings and can be called after a reset. 1602*b4872d67SOleksandr Tymoshenko * 1603*b4872d67SOleksandr Tymoshenko */ 1604*b4872d67SOleksandr Tymoshenko static void 1605*b4872d67SOleksandr Tymoshenko muge_attach_post(struct usb_ether *ue) 1606*b4872d67SOleksandr Tymoshenko { 1607*b4872d67SOleksandr Tymoshenko struct muge_softc *sc = uether_getsc(ue); 1608*b4872d67SOleksandr Tymoshenko 1609*b4872d67SOleksandr Tymoshenko muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1610*b4872d67SOleksandr Tymoshenko 1611*b4872d67SOleksandr Tymoshenko /* Setup some of the basics */ 1612*b4872d67SOleksandr Tymoshenko sc->sc_phyno = 1; 1613*b4872d67SOleksandr Tymoshenko 1614*b4872d67SOleksandr Tymoshenko muge_set_mac_addr(ue); 1615d30c739cSEd Maste 1616d30c739cSEd Maste /* Initialise the chip for the first time */ 1617d30c739cSEd Maste lan78xx_chip_init(sc); 1618d30c739cSEd Maste } 1619d30c739cSEd Maste 1620d30c739cSEd Maste /** 1621d30c739cSEd Maste * muge_attach_post_sub - Called after attach to the USB interface 1622d30c739cSEd Maste * @ue: the USB ethernet device 1623d30c739cSEd Maste * 1624d30c739cSEd Maste * Most of this is boilerplate code and copied from the base USB ethernet 1625d30c739cSEd Maste * driver. It has been overriden so that we can indicate to the system 1626d30c739cSEd Maste * that the chip supports H/W checksumming. 1627d30c739cSEd Maste * 1628d30c739cSEd Maste * RETURNS: 1629d30c739cSEd Maste * Returns 0 on success or a negative error code. 1630d30c739cSEd Maste */ 1631d30c739cSEd Maste static int 1632d30c739cSEd Maste muge_attach_post_sub(struct usb_ether *ue) 1633d30c739cSEd Maste { 1634d30c739cSEd Maste struct muge_softc *sc; 1635d30c739cSEd Maste struct ifnet *ifp; 1636d30c739cSEd Maste int error; 1637d30c739cSEd Maste 1638d30c739cSEd Maste sc = uether_getsc(ue); 1639d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1640d30c739cSEd Maste ifp = ue->ue_ifp; 1641d30c739cSEd Maste ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1642d30c739cSEd Maste ifp->if_start = uether_start; 1643d30c739cSEd Maste ifp->if_ioctl = muge_ioctl; 1644d30c739cSEd Maste ifp->if_init = uether_init; 1645d30c739cSEd Maste IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1646d30c739cSEd Maste ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1647d30c739cSEd Maste IFQ_SET_READY(&ifp->if_snd); 1648d30c739cSEd Maste 1649d30c739cSEd Maste /* 1650d30c739cSEd Maste * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1651d30c739cSEd Maste * however currently only RX checksum is supported in the driver 1652d30c739cSEd Maste * (see top of file). 1653d30c739cSEd Maste */ 1654d30c739cSEd Maste ifp->if_hwassist = 0; 1655d30c739cSEd Maste if (MUGE_DEFAULT_RX_CSUM_ENABLE) 1656d30c739cSEd Maste ifp->if_capabilities |= IFCAP_RXCSUM; 1657d30c739cSEd Maste 1658d30c739cSEd Maste if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1659d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TXCSUM; 1660d30c739cSEd Maste 1661d30c739cSEd Maste /* 1662d30c739cSEd Maste * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1663d30c739cSEd Maste * here, that's something related to socket buffers used in Linux. 1664d30c739cSEd Maste * FreeBSD doesn't have that as an interface feature. 1665d30c739cSEd Maste */ 1666d30c739cSEd Maste if (MUGE_DEFAULT_TSO_CSUM_ENABLE) 1667d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1668d30c739cSEd Maste 1669d30c739cSEd Maste #if 0 1670d30c739cSEd Maste /* TX checksuming is disabled since not yet implemented. */ 1671d30c739cSEd Maste ifp->if_capabilities |= IFCAP_TXCSUM; 1672d30c739cSEd Maste ifp->if_capenable |= IFCAP_TXCSUM; 1673d30c739cSEd Maste ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1674d30c739cSEd Maste #endif 1675d30c739cSEd Maste 1676d30c739cSEd Maste ifp->if_capenable = ifp->if_capabilities; 1677d30c739cSEd Maste 1678d30c739cSEd Maste mtx_lock(&Giant); 1679d30c739cSEd Maste error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1680d30c739cSEd Maste uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1681d30c739cSEd Maste BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1682d30c739cSEd Maste mtx_unlock(&Giant); 1683d30c739cSEd Maste 1684e5151258SEd Maste return (0); 1685d30c739cSEd Maste } 1686d30c739cSEd Maste 1687d30c739cSEd Maste /** 1688d30c739cSEd Maste * muge_start - Starts communication with the LAN78xx chip 1689d30c739cSEd Maste * @ue: USB ether interface 1690d30c739cSEd Maste */ 1691d30c739cSEd Maste static void 1692d30c739cSEd Maste muge_start(struct usb_ether *ue) 1693d30c739cSEd Maste { 1694d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1695d30c739cSEd Maste 1696d30c739cSEd Maste /* 1697d30c739cSEd Maste * Start the USB transfers, if not already started. 1698d30c739cSEd Maste */ 1699d30c739cSEd Maste usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1700d30c739cSEd Maste usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1701d30c739cSEd Maste } 1702d30c739cSEd Maste 1703d30c739cSEd Maste /** 1704d30c739cSEd Maste * muge_ioctl - ioctl function for the device 1705d30c739cSEd Maste * @ifp: interface pointer 1706d30c739cSEd Maste * @cmd: the ioctl command 1707d30c739cSEd Maste * @data: data passed in the ioctl call, typically a pointer to struct 1708d30c739cSEd Maste * ifreq. 1709d30c739cSEd Maste * 1710d30c739cSEd Maste * The ioctl routine is overridden to detect change requests for the H/W 1711d30c739cSEd Maste * checksum capabilities. 1712d30c739cSEd Maste * 1713d30c739cSEd Maste * RETURNS: 1714d30c739cSEd Maste * 0 on success and an error code on failure. 1715d30c739cSEd Maste */ 1716d30c739cSEd Maste static int 1717d30c739cSEd Maste muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1718d30c739cSEd Maste { 1719d30c739cSEd Maste struct usb_ether *ue = ifp->if_softc; 1720d30c739cSEd Maste struct muge_softc *sc; 1721d30c739cSEd Maste struct ifreq *ifr; 1722d30c739cSEd Maste int rc; 1723d30c739cSEd Maste int mask; 1724d30c739cSEd Maste int reinit; 1725d30c739cSEd Maste 1726d30c739cSEd Maste if (cmd == SIOCSIFCAP) { 1727d30c739cSEd Maste sc = uether_getsc(ue); 1728d30c739cSEd Maste ifr = (struct ifreq *)data; 1729d30c739cSEd Maste 1730d30c739cSEd Maste MUGE_LOCK(sc); 1731d30c739cSEd Maste 1732d30c739cSEd Maste rc = 0; 1733d30c739cSEd Maste reinit = 0; 1734d30c739cSEd Maste 1735d30c739cSEd Maste mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1736d30c739cSEd Maste 1737e5151258SEd Maste /* Modify the RX CSUM enable bits. */ 1738d30c739cSEd Maste if ((mask & IFCAP_RXCSUM) != 0 && 1739d30c739cSEd Maste (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1740d30c739cSEd Maste ifp->if_capenable ^= IFCAP_RXCSUM; 1741d30c739cSEd Maste 1742d30c739cSEd Maste if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1743d30c739cSEd Maste ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1744d30c739cSEd Maste reinit = 1; 1745d30c739cSEd Maste } 1746d30c739cSEd Maste } 1747d30c739cSEd Maste 1748d30c739cSEd Maste MUGE_UNLOCK(sc); 1749d30c739cSEd Maste if (reinit) 1750d30c739cSEd Maste uether_init(ue); 1751d30c739cSEd Maste 1752d30c739cSEd Maste } else { 1753d30c739cSEd Maste rc = uether_ioctl(ifp, cmd, data); 1754d30c739cSEd Maste } 1755d30c739cSEd Maste 1756d30c739cSEd Maste return (rc); 1757d30c739cSEd Maste } 1758d30c739cSEd Maste 1759d30c739cSEd Maste /** 1760d30c739cSEd Maste * muge_reset - Reset the SMSC chip 1761d30c739cSEd Maste * @sc: device soft context 1762d30c739cSEd Maste * 1763d30c739cSEd Maste * LOCKING: 1764d30c739cSEd Maste * Should be called with the SMSC lock held. 1765d30c739cSEd Maste */ 1766d30c739cSEd Maste static void 1767d30c739cSEd Maste muge_reset(struct muge_softc *sc) 1768d30c739cSEd Maste { 1769d30c739cSEd Maste struct usb_config_descriptor *cd; 1770d30c739cSEd Maste usb_error_t err; 1771d30c739cSEd Maste 1772d30c739cSEd Maste cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1773d30c739cSEd Maste 1774d30c739cSEd Maste err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1775d30c739cSEd Maste cd->bConfigurationValue); 1776d30c739cSEd Maste if (err) 1777d30c739cSEd Maste muge_warn_printf(sc, "reset failed (ignored)\n"); 1778d30c739cSEd Maste 1779d30c739cSEd Maste /* Wait a little while for the chip to get its brains in order. */ 1780d30c739cSEd Maste uether_pause(&sc->sc_ue, hz / 100); 1781d30c739cSEd Maste 1782d30c739cSEd Maste /* Reinitialize controller to achieve full reset. */ 1783d30c739cSEd Maste lan78xx_chip_init(sc); 1784d30c739cSEd Maste } 1785d30c739cSEd Maste 1786d30c739cSEd Maste /** 1787d30c739cSEd Maste * muge_set_addr_filter 1788d30c739cSEd Maste * 1789d30c739cSEd Maste * @sc: device soft context 1790d30c739cSEd Maste * @index: index of the entry to the perfect address table 1791d30c739cSEd Maste * @addr: address to be written 1792d30c739cSEd Maste * 1793d30c739cSEd Maste */ 1794d30c739cSEd Maste static void 1795d30c739cSEd Maste muge_set_addr_filter(struct muge_softc *sc, int index, 1796d30c739cSEd Maste uint8_t addr[ETHER_ADDR_LEN]) 1797d30c739cSEd Maste { 1798d30c739cSEd Maste uint32_t tmp; 1799d30c739cSEd Maste 1800d30c739cSEd Maste if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1801d30c739cSEd Maste tmp = addr[3]; 1802d30c739cSEd Maste tmp |= addr[2] | (tmp << 8); 1803d30c739cSEd Maste tmp |= addr[1] | (tmp << 8); 1804d30c739cSEd Maste tmp |= addr[0] | (tmp << 8); 1805d30c739cSEd Maste sc->sc_pfilter_table[index][1] = tmp; 1806d30c739cSEd Maste tmp = addr[5]; 1807d30c739cSEd Maste tmp |= addr[4] | (tmp << 8); 180848bc1758SEd Maste tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1809d30c739cSEd Maste sc->sc_pfilter_table[index][0] = tmp; 1810d30c739cSEd Maste } 1811d30c739cSEd Maste } 1812d30c739cSEd Maste 1813d30c739cSEd Maste /** 1814d30c739cSEd Maste * lan78xx_dataport_write - write to the selected RAM 1815d30c739cSEd Maste * @sc: The device soft context. 1816d30c739cSEd Maste * @ram_select: Select which RAM to access. 1817d30c739cSEd Maste * @addr: Starting address to write to. 1818d30c739cSEd Maste * @buf: word-sized buffer to write to RAM, starting at @addr. 1819d30c739cSEd Maste * @length: length of @buf 1820d30c739cSEd Maste * 1821d30c739cSEd Maste * 1822d30c739cSEd Maste * RETURNS: 1823d30c739cSEd Maste * 0 if write successful. 1824d30c739cSEd Maste */ 1825d30c739cSEd Maste static int 1826d30c739cSEd Maste lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1827d30c739cSEd Maste uint32_t addr, uint32_t length, uint32_t *buf) 1828d30c739cSEd Maste { 1829d30c739cSEd Maste uint32_t dp_sel; 1830d30c739cSEd Maste int i, ret; 1831d30c739cSEd Maste 1832d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 183348bc1758SEd Maste ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1834d30c739cSEd Maste if (ret < 0) 1835d30c739cSEd Maste goto done; 1836d30c739cSEd Maste 183748bc1758SEd Maste ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1838d30c739cSEd Maste 183948bc1758SEd Maste dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1840d30c739cSEd Maste dp_sel |= ram_select; 1841d30c739cSEd Maste 184248bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1843d30c739cSEd Maste 1844d30c739cSEd Maste for (i = 0; i < length; i++) { 184548bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 184648bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 184748bc1758SEd Maste ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 184848bc1758SEd Maste ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1849d30c739cSEd Maste if (ret != 0) 1850d30c739cSEd Maste goto done; 1851d30c739cSEd Maste } 1852d30c739cSEd Maste 1853d30c739cSEd Maste done: 1854e5151258SEd Maste return (ret); 1855d30c739cSEd Maste } 1856d30c739cSEd Maste 1857d30c739cSEd Maste /** 1858d30c739cSEd Maste * muge_multicast_write 1859d30c739cSEd Maste * @sc: device's soft context 1860d30c739cSEd Maste * 1861d30c739cSEd Maste * Writes perfect addres filters and hash address filters to their 1862d30c739cSEd Maste * corresponding registers and RAMs. 1863d30c739cSEd Maste * 1864d30c739cSEd Maste */ 1865d30c739cSEd Maste static void 1866d30c739cSEd Maste muge_multicast_write(struct muge_softc *sc) 1867d30c739cSEd Maste { 1868d30c739cSEd Maste int i, ret; 186948bc1758SEd Maste lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 187048bc1758SEd Maste ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 187148bc1758SEd Maste sc->sc_mchash_table); 1872d30c739cSEd Maste 1873d30c739cSEd Maste for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1874d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1875d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1876d30c739cSEd Maste sc->sc_pfilter_table[i][1]); 1877d30c739cSEd Maste ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1878d30c739cSEd Maste sc->sc_pfilter_table[i][0]); 1879d30c739cSEd Maste } 1880d30c739cSEd Maste } 1881d30c739cSEd Maste 1882d30c739cSEd Maste /** 1883d30c739cSEd Maste * muge_hash - Calculate the hash of a mac address 1884d30c739cSEd Maste * @addr: The mac address to calculate the hash on 1885d30c739cSEd Maste * 1886d30c739cSEd Maste * This function is used when configuring a range of multicast mac 1887d30c739cSEd Maste * addresses to filter on. The hash of the mac address is put in the 1888d30c739cSEd Maste * device's mac hash table. 1889d30c739cSEd Maste * 1890d30c739cSEd Maste * RETURNS: 1891d30c739cSEd Maste * Returns a value from 0-63 value which is the hash of the mac address. 1892d30c739cSEd Maste */ 1893d30c739cSEd Maste static inline uint32_t 1894d30c739cSEd Maste muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1895d30c739cSEd Maste { 1896d30c739cSEd Maste return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 1897d30c739cSEd Maste } 1898d30c739cSEd Maste 1899d30c739cSEd Maste /** 1900d30c739cSEd Maste * muge_setmulti - Setup multicast 1901d30c739cSEd Maste * @ue: usb ethernet device context 1902d30c739cSEd Maste * 1903d30c739cSEd Maste * Tells the device to either accept frames with a multicast mac address, 1904d30c739cSEd Maste * a select group of m'cast mac addresses or just the devices mac address. 1905d30c739cSEd Maste * 1906d30c739cSEd Maste * LOCKING: 1907d30c739cSEd Maste * Should be called with the MUGE lock held. 1908d30c739cSEd Maste */ 1909d30c739cSEd Maste static void 1910d30c739cSEd Maste muge_setmulti(struct usb_ether *ue) 1911d30c739cSEd Maste { 1912d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1913d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 1914d30c739cSEd Maste uint8_t i, *addr; 1915d30c739cSEd Maste struct ifmultiaddr *ifma; 1916d30c739cSEd Maste 1917d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 1918d30c739cSEd Maste 191948bc1758SEd Maste sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 192048bc1758SEd Maste ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1921d30c739cSEd Maste 1922e5151258SEd Maste /* Initialize hash filter table. */ 192348bc1758SEd Maste for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1924d30c739cSEd Maste sc->sc_mchash_table[i] = 0; 1925d30c739cSEd Maste 1926e5151258SEd Maste /* Initialize perfect filter table. */ 1927d30c739cSEd Maste for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1928d30c739cSEd Maste sc->sc_pfilter_table[i][0] = 1929d30c739cSEd Maste sc->sc_pfilter_table[i][1] = 0; 1930d30c739cSEd Maste } 1931d30c739cSEd Maste 193248bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1933d30c739cSEd Maste 1934d30c739cSEd Maste if (ifp->if_flags & IFF_PROMISC) { 1935d30c739cSEd Maste muge_dbg_printf(sc, "promiscuous mode enabled\n"); 193648bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1937d30c739cSEd Maste } else if (ifp->if_flags & IFF_ALLMULTI){ 1938d30c739cSEd Maste muge_dbg_printf(sc, "receive all multicast enabled\n"); 193948bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1940d30c739cSEd Maste } else { 1941e5151258SEd Maste /* Lock the mac address list before hashing each of them. */ 1942d30c739cSEd Maste if_maddr_rlock(ifp); 19430842ea9bSEd Maste if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) { 1944d30c739cSEd Maste i = 1; 19450842ea9bSEd Maste CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, 19460842ea9bSEd Maste ifma_link) { 1947e5151258SEd Maste /* First fill up the perfect address table. */ 1948d30c739cSEd Maste addr = LLADDR((struct sockaddr_dl *) 1949d30c739cSEd Maste ifma->ifma_addr); 1950d30c739cSEd Maste if (i < 33 /* XXX */) { 1951d30c739cSEd Maste muge_set_addr_filter(sc, i, addr); 1952d30c739cSEd Maste } else { 1953d30c739cSEd Maste uint32_t bitnum = muge_hash(addr); 1954d30c739cSEd Maste sc->sc_mchash_table[bitnum / 32] |= 1955d30c739cSEd Maste (1 << (bitnum % 32)); 195648bc1758SEd Maste sc->sc_rfe_ctl |= 195748bc1758SEd Maste ETH_RFE_CTL_MCAST_HASH_; 1958d30c739cSEd Maste } 1959d30c739cSEd Maste i++; 1960d30c739cSEd Maste } 1961d30c739cSEd Maste } 1962d30c739cSEd Maste if_maddr_runlock(ifp); 1963d30c739cSEd Maste muge_multicast_write(sc); 1964d30c739cSEd Maste } 196548bc1758SEd Maste lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1966d30c739cSEd Maste } 1967d30c739cSEd Maste 1968d30c739cSEd Maste /** 1969d30c739cSEd Maste * muge_setpromisc - Enables/disables promiscuous mode 1970d30c739cSEd Maste * @ue: usb ethernet device context 1971d30c739cSEd Maste * 1972d30c739cSEd Maste * LOCKING: 1973d30c739cSEd Maste * Should be called with the MUGE lock held. 1974d30c739cSEd Maste */ 1975d30c739cSEd Maste static void 1976d30c739cSEd Maste muge_setpromisc(struct usb_ether *ue) 1977d30c739cSEd Maste { 1978d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 1979d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 1980d30c739cSEd Maste 1981d30c739cSEd Maste muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1982d30c739cSEd Maste (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1983d30c739cSEd Maste 1984d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 1985d30c739cSEd Maste 1986d30c739cSEd Maste if (ifp->if_flags & IFF_PROMISC) 198748bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1988d30c739cSEd Maste else 198948bc1758SEd Maste sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1990d30c739cSEd Maste 199148bc1758SEd Maste lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1992d30c739cSEd Maste } 1993d30c739cSEd Maste 1994d30c739cSEd Maste /** 1995d30c739cSEd Maste * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1996d30c739cSEd Maste * @sc: driver soft context 1997d30c739cSEd Maste * 1998d30c739cSEd Maste * LOCKING: 1999d30c739cSEd Maste * Should be called with the MUGE lock held. 2000d30c739cSEd Maste * 2001d30c739cSEd Maste * RETURNS: 2002d30c739cSEd Maste * Returns 0 on success or a negative error code. 2003d30c739cSEd Maste */ 2004d30c739cSEd Maste static int muge_sethwcsum(struct muge_softc *sc) 2005d30c739cSEd Maste { 2006d30c739cSEd Maste struct ifnet *ifp = uether_getifp(&sc->sc_ue); 2007d30c739cSEd Maste int err; 2008d30c739cSEd Maste 2009d30c739cSEd Maste if (!ifp) 2010d30c739cSEd Maste return (-EIO); 2011d30c739cSEd Maste 2012d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2013d30c739cSEd Maste 2014d30c739cSEd Maste if (ifp->if_capabilities & IFCAP_RXCSUM) { 201548bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 201648bc1758SEd Maste sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 2017d30c739cSEd Maste } else { 201848bc1758SEd Maste sc->sc_rfe_ctl &= 201948bc1758SEd Maste ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 202048bc1758SEd Maste sc->sc_rfe_ctl &= 202148bc1758SEd Maste ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 2022d30c739cSEd Maste } 2023d30c739cSEd Maste 202448bc1758SEd Maste sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 2025d30c739cSEd Maste 202648bc1758SEd Maste err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 2027d30c739cSEd Maste 2028d30c739cSEd Maste if (err != 0) { 202948bc1758SEd Maste muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 203048bc1758SEd Maste err); 2031d30c739cSEd Maste return (err); 2032d30c739cSEd Maste } 2033d30c739cSEd Maste 2034d30c739cSEd Maste return (0); 2035d30c739cSEd Maste } 2036d30c739cSEd Maste 2037d30c739cSEd Maste /** 2038d30c739cSEd Maste * muge_ifmedia_upd - Set media options 2039d30c739cSEd Maste * @ifp: interface pointer 2040d30c739cSEd Maste * 2041d30c739cSEd Maste * Basically boilerplate code that simply calls the mii functions to set 2042d30c739cSEd Maste * the media options. 2043d30c739cSEd Maste * 2044d30c739cSEd Maste * LOCKING: 2045d30c739cSEd Maste * The device lock must be held before this function is called. 2046d30c739cSEd Maste * 2047d30c739cSEd Maste * RETURNS: 2048d30c739cSEd Maste * Returns 0 on success or a negative error code. 2049d30c739cSEd Maste */ 2050d30c739cSEd Maste static int 2051d30c739cSEd Maste muge_ifmedia_upd(struct ifnet *ifp) 2052d30c739cSEd Maste { 2053d30c739cSEd Maste struct muge_softc *sc = ifp->if_softc; 2054d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2055d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2056d30c739cSEd Maste struct mii_softc *miisc; 2057d30c739cSEd Maste int err; 2058d30c739cSEd Maste 2059d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2060d30c739cSEd Maste 2061d30c739cSEd Maste LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2062d30c739cSEd Maste PHY_RESET(miisc); 2063d30c739cSEd Maste err = mii_mediachg(mii); 2064d30c739cSEd Maste return (err); 2065d30c739cSEd Maste } 2066d30c739cSEd Maste 2067d30c739cSEd Maste /** 2068d30c739cSEd Maste * muge_init - Initialises the LAN95xx chip 2069d30c739cSEd Maste * @ue: USB ether interface 2070d30c739cSEd Maste * 2071d30c739cSEd Maste * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2072d30c739cSEd Maste * initialise the interface and the rx/tx pipes. 2073d30c739cSEd Maste * 2074d30c739cSEd Maste * LOCKING: 2075d30c739cSEd Maste * Should be called with the MUGE lock held. 2076d30c739cSEd Maste */ 2077d30c739cSEd Maste static void 2078d30c739cSEd Maste muge_init(struct usb_ether *ue) 2079d30c739cSEd Maste { 2080d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2081d30c739cSEd Maste muge_dbg_printf(sc, "Calling muge_init.\n"); 2082d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 2083d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2084d30c739cSEd Maste 2085d30c739cSEd Maste if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2086d30c739cSEd Maste muge_dbg_printf(sc, "setting MAC address failed\n"); 2087d30c739cSEd Maste 2088d30c739cSEd Maste if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2089d30c739cSEd Maste return; 2090d30c739cSEd Maste 2091e5151258SEd Maste /* Cancel pending I/O. */ 2092d30c739cSEd Maste muge_stop(ue); 2093d30c739cSEd Maste 2094d30c739cSEd Maste /* Reset the ethernet interface. */ 2095d30c739cSEd Maste muge_reset(sc); 2096d30c739cSEd Maste 2097d30c739cSEd Maste /* Load the multicast filter. */ 2098d30c739cSEd Maste muge_setmulti(ue); 2099d30c739cSEd Maste 2100d30c739cSEd Maste /* TCP/UDP checksum offload engines. */ 2101d30c739cSEd Maste muge_sethwcsum(sc); 2102d30c739cSEd Maste 2103d30c739cSEd Maste usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2104d30c739cSEd Maste 2105d30c739cSEd Maste /* Indicate we are up and running. */ 2106d30c739cSEd Maste ifp->if_drv_flags |= IFF_DRV_RUNNING; 2107d30c739cSEd Maste 2108d30c739cSEd Maste /* Switch to selected media. */ 2109d30c739cSEd Maste muge_ifmedia_upd(ifp); 2110d30c739cSEd Maste muge_start(ue); 2111d30c739cSEd Maste } 2112d30c739cSEd Maste 2113d30c739cSEd Maste /** 2114d30c739cSEd Maste * muge_stop - Stops communication with the LAN78xx chip 2115d30c739cSEd Maste * @ue: USB ether interface 2116d30c739cSEd Maste */ 2117d30c739cSEd Maste static void 2118d30c739cSEd Maste muge_stop(struct usb_ether *ue) 2119d30c739cSEd Maste { 2120d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2121d30c739cSEd Maste struct ifnet *ifp = uether_getifp(ue); 2122d30c739cSEd Maste 2123d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2124d30c739cSEd Maste 2125d30c739cSEd Maste ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2126d30c739cSEd Maste sc->sc_flags &= ~MUGE_FLAG_LINK; 2127d30c739cSEd Maste 2128d30c739cSEd Maste /* 2129e5151258SEd Maste * Stop all the transfers, if not already stopped. 2130d30c739cSEd Maste */ 2131d30c739cSEd Maste usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2132d30c739cSEd Maste usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2133d30c739cSEd Maste } 2134d30c739cSEd Maste 2135d30c739cSEd Maste /** 2136d30c739cSEd Maste * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2137d30c739cSEd Maste * @ue: USB ether interface 2138d30c739cSEd Maste * 2139d30c739cSEd Maste * Simply calls the mii status functions to check the state of the link. 2140d30c739cSEd Maste * 2141d30c739cSEd Maste * LOCKING: 2142d30c739cSEd Maste * Should be called with the MUGE lock held. 2143d30c739cSEd Maste */ 2144d30c739cSEd Maste static void 2145d30c739cSEd Maste muge_tick(struct usb_ether *ue) 2146d30c739cSEd Maste { 2147d30c739cSEd Maste 2148d30c739cSEd Maste struct muge_softc *sc = uether_getsc(ue); 2149d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2150d30c739cSEd Maste 2151d30c739cSEd Maste MUGE_LOCK_ASSERT(sc, MA_OWNED); 2152d30c739cSEd Maste 2153d30c739cSEd Maste mii_tick(mii); 2154d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2155d30c739cSEd Maste lan78xx_miibus_statchg(ue->ue_dev); 2156d30c739cSEd Maste if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2157d30c739cSEd Maste muge_start(ue); 2158d30c739cSEd Maste } 2159d30c739cSEd Maste } 2160d30c739cSEd Maste 2161d30c739cSEd Maste /** 2162d30c739cSEd Maste * muge_ifmedia_sts - Report current media status 2163d30c739cSEd Maste * @ifp: inet interface pointer 2164d30c739cSEd Maste * @ifmr: interface media request 2165d30c739cSEd Maste * 2166e5151258SEd Maste * Call the mii functions to get the media status. 2167d30c739cSEd Maste * 2168d30c739cSEd Maste * LOCKING: 2169d30c739cSEd Maste * Internally takes and releases the device lock. 2170d30c739cSEd Maste */ 2171d30c739cSEd Maste static void 2172d30c739cSEd Maste muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2173d30c739cSEd Maste { 2174d30c739cSEd Maste struct muge_softc *sc = ifp->if_softc; 2175d30c739cSEd Maste struct mii_data *mii = uether_getmii(&sc->sc_ue); 2176d30c739cSEd Maste 2177d30c739cSEd Maste MUGE_LOCK(sc); 2178d30c739cSEd Maste mii_pollstat(mii); 2179d30c739cSEd Maste ifmr->ifm_active = mii->mii_media_active; 2180d30c739cSEd Maste ifmr->ifm_status = mii->mii_media_status; 2181d30c739cSEd Maste MUGE_UNLOCK(sc); 2182d30c739cSEd Maste } 2183d30c739cSEd Maste 2184d30c739cSEd Maste /** 2185d30c739cSEd Maste * muge_probe - Probe the interface. 2186d30c739cSEd Maste * @dev: muge device handle 2187d30c739cSEd Maste * 2188d30c739cSEd Maste * Checks if the device is a match for this driver. 2189d30c739cSEd Maste * 2190d30c739cSEd Maste * RETURNS: 2191d30c739cSEd Maste * Returns 0 on success or an error code on failure. 2192d30c739cSEd Maste */ 2193d30c739cSEd Maste static int 2194d30c739cSEd Maste muge_probe(device_t dev) 2195d30c739cSEd Maste { 2196d30c739cSEd Maste struct usb_attach_arg *uaa = device_get_ivars(dev); 2197d30c739cSEd Maste 2198d30c739cSEd Maste if (uaa->usb_mode != USB_MODE_HOST) 2199d30c739cSEd Maste return (ENXIO); 2200d30c739cSEd Maste if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2201d30c739cSEd Maste return (ENXIO); 2202d30c739cSEd Maste if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2203d30c739cSEd Maste return (ENXIO); 2204d30c739cSEd Maste return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2205d30c739cSEd Maste } 2206d30c739cSEd Maste 2207d30c739cSEd Maste /** 2208d30c739cSEd Maste * muge_attach - Attach the interface. 2209d30c739cSEd Maste * @dev: muge device handle 2210d30c739cSEd Maste * 2211d30c739cSEd Maste * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2212d30c739cSEd Maste * 2213d30c739cSEd Maste * RETURNS: 2214d30c739cSEd Maste * Returns 0 on success or a negative error code. 2215d30c739cSEd Maste */ 2216d30c739cSEd Maste static int 2217d30c739cSEd Maste muge_attach(device_t dev) 2218d30c739cSEd Maste { 2219d30c739cSEd Maste struct usb_attach_arg *uaa = device_get_ivars(dev); 2220d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 2221d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 2222d30c739cSEd Maste uint8_t iface_index; 2223d30c739cSEd Maste int err; 2224d30c739cSEd Maste 2225d30c739cSEd Maste sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2226d30c739cSEd Maste 2227d30c739cSEd Maste device_set_usb_desc(dev); 2228d30c739cSEd Maste 2229d30c739cSEd Maste mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2230d30c739cSEd Maste 2231e5151258SEd Maste /* Setup the endpoints for the Microchip LAN78xx device. */ 2232d30c739cSEd Maste iface_index = MUGE_IFACE_IDX; 2233d30c739cSEd Maste err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2234d30c739cSEd Maste muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2235d30c739cSEd Maste if (err) { 2236d30c739cSEd Maste device_printf(dev, "error: allocating USB transfers failed\n"); 223749b2a5feSEd Maste goto err; 2238d30c739cSEd Maste } 2239d30c739cSEd Maste 2240d30c739cSEd Maste ue->ue_sc = sc; 2241d30c739cSEd Maste ue->ue_dev = dev; 2242d30c739cSEd Maste ue->ue_udev = uaa->device; 2243d30c739cSEd Maste ue->ue_mtx = &sc->sc_mtx; 2244d30c739cSEd Maste ue->ue_methods = &muge_ue_methods; 2245d30c739cSEd Maste 2246d30c739cSEd Maste err = uether_ifattach(ue); 2247d30c739cSEd Maste if (err) { 2248d30c739cSEd Maste device_printf(dev, "error: could not attach interface\n"); 224949b2a5feSEd Maste goto err_usbd; 2250d30c739cSEd Maste } 225149b2a5feSEd Maste 225249b2a5feSEd Maste /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 225349b2a5feSEd Maste uether_ifattach_wait(ue); 225449b2a5feSEd Maste if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 225549b2a5feSEd Maste goto err_attached; 225649b2a5feSEd Maste 2257d30c739cSEd Maste return (0); 2258d30c739cSEd Maste 225949b2a5feSEd Maste err_attached: 226049b2a5feSEd Maste uether_ifdetach(ue); 226149b2a5feSEd Maste err_usbd: 226249b2a5feSEd Maste usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 226349b2a5feSEd Maste err: 226449b2a5feSEd Maste mtx_destroy(&sc->sc_mtx); 2265d30c739cSEd Maste return (ENXIO); 2266d30c739cSEd Maste } 2267d30c739cSEd Maste 2268d30c739cSEd Maste /** 2269d30c739cSEd Maste * muge_detach - Detach the interface. 2270d30c739cSEd Maste * @dev: muge device handle 2271d30c739cSEd Maste * 2272d30c739cSEd Maste * RETURNS: 2273d30c739cSEd Maste * Returns 0. 2274d30c739cSEd Maste */ 2275d30c739cSEd Maste static int 2276d30c739cSEd Maste muge_detach(device_t dev) 2277d30c739cSEd Maste { 2278d30c739cSEd Maste 2279d30c739cSEd Maste struct muge_softc *sc = device_get_softc(dev); 2280d30c739cSEd Maste struct usb_ether *ue = &sc->sc_ue; 2281d30c739cSEd Maste 2282d30c739cSEd Maste usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2283d30c739cSEd Maste uether_ifdetach(ue); 2284d30c739cSEd Maste mtx_destroy(&sc->sc_mtx); 2285d30c739cSEd Maste 2286d30c739cSEd Maste return (0); 2287d30c739cSEd Maste } 2288d30c739cSEd Maste 2289d30c739cSEd Maste static device_method_t muge_methods[] = { 2290d30c739cSEd Maste /* Device interface */ 2291d30c739cSEd Maste DEVMETHOD(device_probe, muge_probe), 2292d30c739cSEd Maste DEVMETHOD(device_attach, muge_attach), 2293d30c739cSEd Maste DEVMETHOD(device_detach, muge_detach), 2294d30c739cSEd Maste 2295d30c739cSEd Maste /* Bus interface */ 2296d30c739cSEd Maste DEVMETHOD(bus_print_child, bus_generic_print_child), 2297d30c739cSEd Maste DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2298d30c739cSEd Maste 2299d30c739cSEd Maste /* MII interface */ 2300d30c739cSEd Maste DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2301d30c739cSEd Maste DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2302d30c739cSEd Maste DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2303d30c739cSEd Maste 2304d30c739cSEd Maste DEVMETHOD_END 2305d30c739cSEd Maste }; 2306d30c739cSEd Maste 2307d30c739cSEd Maste static driver_t muge_driver = { 2308d30c739cSEd Maste .name = "muge", 2309d30c739cSEd Maste .methods = muge_methods, 2310d30c739cSEd Maste .size = sizeof(struct muge_softc), 2311d30c739cSEd Maste }; 2312d30c739cSEd Maste 2313d30c739cSEd Maste static devclass_t muge_devclass; 2314d30c739cSEd Maste 2315d30c739cSEd Maste DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, 0); 2316d30c739cSEd Maste DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, 0, 0); 2317d30c739cSEd Maste MODULE_DEPEND(muge, uether, 1, 1, 1); 2318d30c739cSEd Maste MODULE_DEPEND(muge, usb, 1, 1, 1); 2319d30c739cSEd Maste MODULE_DEPEND(muge, ether, 1, 1, 1); 2320d30c739cSEd Maste MODULE_DEPEND(muge, miibus, 1, 1, 1); 2321d30c739cSEd Maste MODULE_VERSION(muge, 1); 2322d30c739cSEd Maste USB_PNP_HOST_INFO(lan78xx_devs); 2323