xref: /freebsd/sys/dev/usb/net/if_mosreg.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
1 /*-
2  * Copyright (c) 2010, 2011 Rick van der Zwet <info@rickvanderzwet.nl>
3  *
4  * Permission to use, copy, modify, and distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 /*-
18  * Copyright (c) 2008 Johann Christian Rode <jcrode@gmx.net>
19  *
20  * Permission to use, copy, modify, and distribute this software for any
21  * purpose with or without fee is hereby granted, provided that the above
22  * copyright notice and this permission notice appear in all copies.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
25  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
26  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
27  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
28  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
29  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
30  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
31  */
32 
33 /*-
34  * SPDX-License-Identifier: BSD-4-Clause
35  *
36  * Copyright (c) 1997, 1998, 1999, 2000-2003
37  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
38  *
39  * Redistribution and use in source and binary forms, with or without
40  * modification, are permitted provided that the following conditions
41  * are met:
42  * 1. Redistributions of source code must retain the above copyright
43  *    notice, this list of conditions and the following disclaimer.
44  * 2. Redistributions in binary form must reproduce the above copyright
45  *    notice, this list of conditions and the following disclaimer in the
46  *    documentation and/or other materials provided with the distribution.
47  * 3. All advertising materials mentioning features or use of this software
48  *    must display the following acknowledgement:
49  *	This product includes software developed by Ravikanth.
50  * 4. Neither the name of the author nor the names of any co-contributors
51  *    may be used to endorse or promote products derived from this software
52  *    without specific prior written permission.
53  *
54  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
57  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR
58  * THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
59  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
60  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
61  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
62  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
63  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
64  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65  *
66  */
67 
68 /*
69  * Register definitions for the Moschip MCS7x30 ethernet controller.
70  */
71 #define	MOS_MCAST_TABLE 	0x00
72 #define	MOS_IPG0		0x08
73 #define	MOS_IPG1		0x09
74 #define	MOS_PHY_DATA0		0x0a
75 #define	MOS_PHY_DATA1		0x0b
76 #define	MOS_PHY_CTL		0x0c
77 #define	MOS_PHY_STS		0x0d
78 #define	MOS_PHY_DATA		MOS_PHY_DATA0
79 #define	MOS_CTL			0x0e
80 #define	MOS_MAC0		0x0f
81 #define	MOS_MAC1		0x10
82 #define	MOS_MAC2		0x11
83 #define	MOS_MAC3		0x12
84 #define	MOS_MAC4		0x13
85 #define	MOS_MAC5		0x14
86 #define	MOS_MAC			MOS_MAC0
87 /* apparently only available on hardware rev. C */
88 #define	MOS_FRAME_DROP_CNT	0x15
89 #define	MOS_PAUSE_TRHD		0x16
90 
91 #define	MOS_PHYCTL_PHYADDR	0x1f
92 #define	MOS_PHYCTL_WRITE	0x20
93 #define	MOS_PHYCTL_READ		0x40
94 
95 #define	MOS_PHYSTS_PHYREG	0x1f
96 #define	MOS_PHYSTS_READY	0x40
97 #define	MOS_PHYSTS_PENDING	0x80
98 
99 #define	MOS_CTL_RX_PROMISC	0x01
100 #define	MOS_CTL_ALLMULTI	0x02
101 #define	MOS_CTL_SLEEP		0x04
102 #define	MOS_CTL_TX_ENB		0x08
103 /*
104  * The documentation calls this bit 'reserved', but in the FreeBSD driver
105  * provided by the vendor, this enables the receiver.
106  */
107 #define	MOS_CTL_RX_ENB		0x10
108 #define	MOS_CTL_FDX_ENB		0x20
109 /* 0 = 10 Mbps, 1 = 100 Mbps */
110 #define	MOS_CTL_SPEEDSEL	0x40
111 /* 0 = PHY controls speed/duplex mode, 1 = bridge controls speed/duplex mode */
112 #define	MOS_CTL_BS_ENB		0x80
113 
114 #define	MOS_RXSTS_SHORT_FRAME	0x01
115 #define	MOS_RXSTS_LENGTH_ERROR	0x02
116 #define	MOS_RXSTS_ALIGN_ERROR	0x04
117 #define	MOS_RXSTS_CRC_ERROR	0x08
118 #define	MOS_RXSTS_LARGE_FRAME	0x10
119 #define	MOS_RXSTS_VALID		0x20
120 /*
121  * The EtherType field of an Ethernet frame can contain values other than
122  * the frame length, hence length errors are ignored.
123  */
124 #define	MOS_RXSTS_MASK		0x3d
125 
126 #define	MOS_PAUSE_TRHD_DEFAULT	0
127 #define	MOS_PAUSE_REWRITES	3
128 
129 #define	MOS_TIMEOUT		1000
130 
131 #define	MOS_RX_LIST_CNT		1
132 #define	MOS_TX_LIST_CNT		1
133 
134 /* Maximum size of a fast ethernet frame plus one byte for the status */
135 #define	MOS_BUFSZ	 	(ETHER_MAX_LEN+1)
136 
137 /*
138  * USB endpoints.
139  */
140 #define	MOS_ENDPT_RX		0
141 #define	MOS_ENDPT_TX		1
142 #define	MOS_ENDPT_INTR		2
143 #define	MOS_ENDPT_MAX		3
144 
145 /*
146  * USB vendor requests.
147  */
148 #define	MOS_UR_READREG		0x0e
149 #define	MOS_UR_WRITEREG		0x0d
150 
151 #define	MOS_CONFIG_IDX		0
152 #define	MOS_IFACE_IDX		0
153 
154 #define	MCS7730	0x0001
155 #define	MCS7830	0x0002
156 #define	MCS7832	0x0004
157 
158 #define	MOS_INC(x, y)           (x) = (x + 1) % y
159 
160 struct mos_softc {
161 	struct usb_ether sc_ue;
162 
163 	struct mtx sc_mtx;
164 	struct usb_xfer *sc_xfer[MOS_ENDPT_MAX];
165 
166 	uint16_t mos_flags;
167 
168 	int mos_link;
169 	unsigned char mos_ipgs[2];
170 	unsigned char mos_phyaddrs[2];
171 };
172 
173 #define	GET_MII(sc)		uether_getmii(&(sc)->sc_ue)
174 #define	MOS_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
175 #define	MOS_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
176 #define	MOS_LOCK_ASSERT(_sc, t)	mtx_assert(&(_sc)->sc_mtx, t)
177