1 /*- 2 * Copyright (c) 1997, 1998, 1999, 2000-2003 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. 38 * Used in the LinkSys USB200M and various other adapters. 39 * 40 * Manuals available from: 41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43 * controller) to find the definitions for the RX control register. 44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45 * 46 * Written by Bill Paul <wpaul@windriver.com> 47 * Senior Engineer 48 * Wind River Systems 49 */ 50 51 /* 52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53 * It uses an external PHY (reference designs use a RealTek chip), 54 * and has a 64-bit multicast hash filter. There is some information 55 * missing from the manual which one needs to know in order to make 56 * the chip function: 57 * 58 * - You must set bit 7 in the RX control register, otherwise the 59 * chip won't receive any packets. 60 * - You must initialize all 3 IPG registers, or you won't be able 61 * to send any packets. 62 * 63 * Note that this device appears to only support loading the station 64 * address via autload from the EEPROM (i.e. there's no way to manaully 65 * set it). 66 * 67 * (Adam Weinberger wanted me to name this driver if_gir.c.) 68 */ 69 70 /* 71 * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73 * 74 * Manual here: 75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77 */ 78 79 #include <sys/stdint.h> 80 #include <sys/stddef.h> 81 #include <sys/param.h> 82 #include <sys/queue.h> 83 #include <sys/types.h> 84 #include <sys/systm.h> 85 #include <sys/kernel.h> 86 #include <sys/bus.h> 87 #include <sys/linker_set.h> 88 #include <sys/module.h> 89 #include <sys/lock.h> 90 #include <sys/mutex.h> 91 #include <sys/condvar.h> 92 #include <sys/sysctl.h> 93 #include <sys/sx.h> 94 #include <sys/unistd.h> 95 #include <sys/callout.h> 96 #include <sys/malloc.h> 97 #include <sys/priv.h> 98 99 #include <dev/usb/usb.h> 100 #include <dev/usb/usbdi.h> 101 #include <dev/usb/usbdi_util.h> 102 #include "usbdevs.h" 103 104 #define USB_DEBUG_VAR axe_debug 105 #include <dev/usb/usb_debug.h> 106 #include <dev/usb/usb_process.h> 107 108 #include <dev/usb/net/usb_ethernet.h> 109 #include <dev/usb/net/if_axereg.h> 110 111 /* 112 * AXE_178_MAX_FRAME_BURST 113 * max frame burst size for Ax88178 and Ax88772 114 * 0 2048 bytes 115 * 1 4096 bytes 116 * 2 8192 bytes 117 * 3 16384 bytes 118 * use the largest your system can handle without USB stalling. 119 * 120 * NB: 88772 parts appear to generate lots of input errors with 121 * a 2K rx buffer and 8K is only slightly faster than 4K on an 122 * EHCI port on a T42 so change at your own risk. 123 */ 124 #define AXE_178_MAX_FRAME_BURST 1 125 126 #if USB_DEBUG 127 static int axe_debug = 0; 128 129 SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 130 SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 131 "Debug level"); 132 #endif 133 134 /* 135 * Various supported device vendors/products. 136 */ 137 static const struct usb_device_id axe_devs[] = { 138 {USB_VPI(USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200, 0)}, 139 {USB_VPI(USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2, 0)}, 140 {USB_VPI(USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET, AXE_FLAG_772)}, 141 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172, 0)}, 142 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178, AXE_FLAG_178)}, 143 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772, AXE_FLAG_772)}, 144 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A, AXE_FLAG_772)}, 145 {USB_VPI(USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T, 0)}, 146 {USB_VPI(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055, AXE_FLAG_178)}, 147 {USB_VPI(USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR, 0)}, 148 {USB_VPI(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2, AXE_FLAG_772)}, 149 {USB_VPI(USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX, 0)}, 150 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100, 0)}, 151 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1, AXE_FLAG_772)}, 152 {USB_VPI(USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E, 0)}, 153 {USB_VPI(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2, AXE_FLAG_178)}, 154 {USB_VPI(USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1, 0)}, 155 {USB_VPI(USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M, 0)}, 156 {USB_VPI(USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000, AXE_FLAG_178)}, 157 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX, 0)}, 158 {USB_VPI(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120, 0)}, 159 {USB_VPI(USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS, AXE_FLAG_772)}, 160 {USB_VPI(USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T, AXE_FLAG_178)}, 161 {USB_VPI(USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029, 0)}, 162 {USB_VPI(USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028, AXE_FLAG_178)}, 163 {USB_VPI(USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL, 0)}, 164 }; 165 166 static device_probe_t axe_probe; 167 static device_attach_t axe_attach; 168 static device_detach_t axe_detach; 169 170 static usb_callback_t axe_intr_callback; 171 static usb_callback_t axe_bulk_read_callback; 172 static usb_callback_t axe_bulk_write_callback; 173 174 static miibus_readreg_t axe_miibus_readreg; 175 static miibus_writereg_t axe_miibus_writereg; 176 static miibus_statchg_t axe_miibus_statchg; 177 178 static uether_fn_t axe_attach_post; 179 static uether_fn_t axe_init; 180 static uether_fn_t axe_stop; 181 static uether_fn_t axe_start; 182 static uether_fn_t axe_tick; 183 static uether_fn_t axe_setmulti; 184 static uether_fn_t axe_setpromisc; 185 186 static int axe_ifmedia_upd(struct ifnet *); 187 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 188 static int axe_cmd(struct axe_softc *, int, int, int, void *); 189 static void axe_ax88178_init(struct axe_softc *); 190 static void axe_ax88772_init(struct axe_softc *); 191 static int axe_get_phyno(struct axe_softc *, int); 192 193 static const struct usb_config axe_config[AXE_N_TRANSFER] = { 194 195 [AXE_BULK_DT_WR] = { 196 .type = UE_BULK, 197 .endpoint = UE_ADDR_ANY, 198 .direction = UE_DIR_OUT, 199 .bufsize = AXE_BULK_BUF_SIZE, 200 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 201 .callback = axe_bulk_write_callback, 202 .timeout = 10000, /* 10 seconds */ 203 }, 204 205 [AXE_BULK_DT_RD] = { 206 .type = UE_BULK, 207 .endpoint = UE_ADDR_ANY, 208 .direction = UE_DIR_IN, 209 .bufsize = 16384, /* bytes */ 210 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 211 .callback = axe_bulk_read_callback, 212 .timeout = 0, /* no timeout */ 213 }, 214 215 [AXE_INTR_DT_RD] = { 216 .type = UE_INTERRUPT, 217 .endpoint = UE_ADDR_ANY, 218 .direction = UE_DIR_IN, 219 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 220 .bufsize = 0, /* use wMaxPacketSize */ 221 .callback = axe_intr_callback, 222 }, 223 }; 224 225 static device_method_t axe_methods[] = { 226 /* Device interface */ 227 DEVMETHOD(device_probe, axe_probe), 228 DEVMETHOD(device_attach, axe_attach), 229 DEVMETHOD(device_detach, axe_detach), 230 231 /* bus interface */ 232 DEVMETHOD(bus_print_child, bus_generic_print_child), 233 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 234 235 /* MII interface */ 236 DEVMETHOD(miibus_readreg, axe_miibus_readreg), 237 DEVMETHOD(miibus_writereg, axe_miibus_writereg), 238 DEVMETHOD(miibus_statchg, axe_miibus_statchg), 239 240 {0, 0} 241 }; 242 243 static driver_t axe_driver = { 244 .name = "axe", 245 .methods = axe_methods, 246 .size = sizeof(struct axe_softc), 247 }; 248 249 static devclass_t axe_devclass; 250 251 DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0); 252 DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 253 MODULE_DEPEND(axe, uether, 1, 1, 1); 254 MODULE_DEPEND(axe, usb, 1, 1, 1); 255 MODULE_DEPEND(axe, ether, 1, 1, 1); 256 MODULE_DEPEND(axe, miibus, 1, 1, 1); 257 258 static const struct usb_ether_methods axe_ue_methods = { 259 .ue_attach_post = axe_attach_post, 260 .ue_start = axe_start, 261 .ue_init = axe_init, 262 .ue_stop = axe_stop, 263 .ue_tick = axe_tick, 264 .ue_setmulti = axe_setmulti, 265 .ue_setpromisc = axe_setpromisc, 266 .ue_mii_upd = axe_ifmedia_upd, 267 .ue_mii_sts = axe_ifmedia_sts, 268 }; 269 270 static int 271 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 272 { 273 struct usb_device_request req; 274 usb_error_t err; 275 276 AXE_LOCK_ASSERT(sc, MA_OWNED); 277 278 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 279 UT_WRITE_VENDOR_DEVICE : 280 UT_READ_VENDOR_DEVICE); 281 req.bRequest = AXE_CMD_CMD(cmd); 282 USETW(req.wValue, val); 283 USETW(req.wIndex, index); 284 USETW(req.wLength, AXE_CMD_LEN(cmd)); 285 286 err = uether_do_request(&sc->sc_ue, &req, buf, 1000); 287 288 return (err); 289 } 290 291 static int 292 axe_miibus_readreg(device_t dev, int phy, int reg) 293 { 294 struct axe_softc *sc = device_get_softc(dev); 295 uint16_t val; 296 int locked; 297 298 if (sc->sc_phyno != phy) 299 return (0); 300 301 locked = mtx_owned(&sc->sc_mtx); 302 if (!locked) 303 AXE_LOCK(sc); 304 305 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 306 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 307 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 308 309 val = le16toh(val); 310 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) { 311 /* 312 * BMSR of AX88772 indicates that it supports extended 313 * capability but the extended status register is 314 * revered for embedded ethernet PHY. So clear the 315 * extended capability bit of BMSR. 316 */ 317 val &= ~BMSR_EXTCAP; 318 } 319 320 if (!locked) 321 AXE_UNLOCK(sc); 322 return (val); 323 } 324 325 static int 326 axe_miibus_writereg(device_t dev, int phy, int reg, int val) 327 { 328 struct axe_softc *sc = device_get_softc(dev); 329 int locked; 330 331 val = htole32(val); 332 333 if (sc->sc_phyno != phy) 334 return (0); 335 336 locked = mtx_owned(&sc->sc_mtx); 337 if (!locked) 338 AXE_LOCK(sc); 339 340 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 341 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 342 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 343 344 if (!locked) 345 AXE_UNLOCK(sc); 346 return (0); 347 } 348 349 static void 350 axe_miibus_statchg(device_t dev) 351 { 352 struct axe_softc *sc = device_get_softc(dev); 353 struct mii_data *mii = GET_MII(sc); 354 struct ifnet *ifp; 355 uint16_t val; 356 int err, locked; 357 358 locked = mtx_owned(&sc->sc_mtx); 359 if (!locked) 360 AXE_LOCK(sc); 361 362 ifp = uether_getifp(&sc->sc_ue); 363 if (mii == NULL || ifp == NULL || 364 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 365 goto done; 366 367 sc->sc_flags &= ~AXE_FLAG_LINK; 368 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 369 (IFM_ACTIVE | IFM_AVALID)) { 370 switch (IFM_SUBTYPE(mii->mii_media_active)) { 371 case IFM_10_T: 372 case IFM_100_TX: 373 sc->sc_flags |= AXE_FLAG_LINK; 374 break; 375 case IFM_1000_T: 376 if ((sc->sc_flags & AXE_FLAG_178) == 0) 377 break; 378 sc->sc_flags |= AXE_FLAG_LINK; 379 break; 380 default: 381 break; 382 } 383 } 384 385 /* Lost link, do nothing. */ 386 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 387 goto done; 388 389 val = 0; 390 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 391 val |= AXE_MEDIA_FULL_DUPLEX; 392 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 393 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 394 if ((sc->sc_flags & AXE_FLAG_178) != 0) 395 val |= AXE_178_MEDIA_ENCK; 396 switch (IFM_SUBTYPE(mii->mii_media_active)) { 397 case IFM_1000_T: 398 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 399 break; 400 case IFM_100_TX: 401 val |= AXE_178_MEDIA_100TX; 402 break; 403 case IFM_10_T: 404 /* doesn't need to be handled */ 405 break; 406 } 407 } 408 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 409 if (err) 410 device_printf(dev, "media change failed, error %d\n", err); 411 done: 412 if (!locked) 413 AXE_UNLOCK(sc); 414 } 415 416 /* 417 * Set media options. 418 */ 419 static int 420 axe_ifmedia_upd(struct ifnet *ifp) 421 { 422 struct axe_softc *sc = ifp->if_softc; 423 struct mii_data *mii = GET_MII(sc); 424 int error; 425 426 AXE_LOCK_ASSERT(sc, MA_OWNED); 427 428 if (mii->mii_instance) { 429 struct mii_softc *miisc; 430 431 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 432 mii_phy_reset(miisc); 433 } 434 error = mii_mediachg(mii); 435 return (error); 436 } 437 438 /* 439 * Report current media status. 440 */ 441 static void 442 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 443 { 444 struct axe_softc *sc = ifp->if_softc; 445 struct mii_data *mii = GET_MII(sc); 446 447 AXE_LOCK(sc); 448 mii_pollstat(mii); 449 AXE_UNLOCK(sc); 450 ifmr->ifm_active = mii->mii_media_active; 451 ifmr->ifm_status = mii->mii_media_status; 452 } 453 454 static void 455 axe_setmulti(struct usb_ether *ue) 456 { 457 struct axe_softc *sc = uether_getsc(ue); 458 struct ifnet *ifp = uether_getifp(ue); 459 struct ifmultiaddr *ifma; 460 uint32_t h = 0; 461 uint16_t rxmode; 462 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 463 464 AXE_LOCK_ASSERT(sc, MA_OWNED); 465 466 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 467 rxmode = le16toh(rxmode); 468 469 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 470 rxmode |= AXE_RXCMD_ALLMULTI; 471 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 472 return; 473 } 474 rxmode &= ~AXE_RXCMD_ALLMULTI; 475 476 if_maddr_rlock(ifp); 477 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) 478 { 479 if (ifma->ifma_addr->sa_family != AF_LINK) 480 continue; 481 h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 482 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 483 hashtbl[h / 8] |= 1 << (h % 8); 484 } 485 if_maddr_runlock(ifp); 486 487 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 488 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 489 } 490 491 static int 492 axe_get_phyno(struct axe_softc *sc, int sel) 493 { 494 int phyno; 495 496 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 497 case PHY_TYPE_100_HOME: 498 case PHY_TYPE_GIG: 499 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 500 break; 501 case PHY_TYPE_SPECIAL: 502 /* FALLTHROUGH */ 503 case PHY_TYPE_RSVD: 504 /* FALLTHROUGH */ 505 case PHY_TYPE_NON_SUP: 506 /* FALLTHROUGH */ 507 default: 508 phyno = -1; 509 break; 510 } 511 512 return (phyno); 513 } 514 515 static void 516 axe_ax88178_init(struct axe_softc *sc) 517 { 518 int gpio0 = 0, phymode = 0; 519 uint16_t eeprom; 520 521 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 522 /* XXX magic */ 523 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 524 eeprom = le16toh(eeprom); 525 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 526 527 /* if EEPROM is invalid we have to use to GPIO0 */ 528 if (eeprom == 0xffff) { 529 phymode = 0; 530 gpio0 = 1; 531 } else { 532 phymode = eeprom & 7; 533 gpio0 = (eeprom & 0x80) ? 0 : 1; 534 } 535 536 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL); 537 uether_pause(&sc->sc_ue, hz / 16); 538 539 if ((eeprom >> 8) != 0x01) { 540 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 541 uether_pause(&sc->sc_ue, hz / 32); 542 543 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL); 544 uether_pause(&sc->sc_ue, hz / 3); 545 546 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 547 uether_pause(&sc->sc_ue, hz / 32); 548 } else { 549 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL); 550 uether_pause(&sc->sc_ue, hz / 32); 551 552 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL); 553 uether_pause(&sc->sc_ue, hz / 32); 554 } 555 556 /* soft reset */ 557 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 558 uether_pause(&sc->sc_ue, hz / 4); 559 560 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 561 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 562 uether_pause(&sc->sc_ue, hz / 4); 563 /* Enable MII/GMII/RGMII interface to work with external PHY. */ 564 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 565 uether_pause(&sc->sc_ue, hz / 4); 566 567 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 568 } 569 570 static void 571 axe_ax88772_init(struct axe_softc *sc) 572 { 573 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 574 uether_pause(&sc->sc_ue, hz / 16); 575 576 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 577 /* ask for the embedded PHY */ 578 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 579 uether_pause(&sc->sc_ue, hz / 64); 580 581 /* power down and reset state, pin reset state */ 582 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 583 AXE_SW_RESET_CLEAR, NULL); 584 uether_pause(&sc->sc_ue, hz / 16); 585 586 /* power down/reset state, pin operating state */ 587 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 588 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 589 uether_pause(&sc->sc_ue, hz / 4); 590 591 /* power up, reset */ 592 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 593 594 /* power up, operating */ 595 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 596 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 597 } else { 598 /* ask for external PHY */ 599 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 600 uether_pause(&sc->sc_ue, hz / 64); 601 602 /* power down internal PHY */ 603 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 604 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 605 } 606 607 uether_pause(&sc->sc_ue, hz / 4); 608 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 609 } 610 611 static void 612 axe_reset(struct axe_softc *sc) 613 { 614 struct usb_config_descriptor *cd; 615 usb_error_t err; 616 617 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 618 619 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 620 cd->bConfigurationValue); 621 if (err) 622 DPRINTF("reset failed (ignored)\n"); 623 624 /* Wait a little while for the chip to get its brains in order. */ 625 uether_pause(&sc->sc_ue, hz / 100); 626 } 627 628 static void 629 axe_attach_post(struct usb_ether *ue) 630 { 631 struct axe_softc *sc = uether_getsc(ue); 632 633 /* 634 * Load PHY indexes first. Needed by axe_xxx_init(). 635 */ 636 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 637 #if 1 638 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n", 639 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 640 #endif 641 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 642 if (sc->sc_phyno == -1) 643 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 644 if (sc->sc_phyno == -1) { 645 device_printf(sc->sc_ue.ue_dev, 646 "no valid PHY address found, assuming PHY address 0\n"); 647 sc->sc_phyno = 0; 648 } 649 650 if (sc->sc_flags & AXE_FLAG_178) 651 axe_ax88178_init(sc); 652 else if (sc->sc_flags & AXE_FLAG_772) 653 axe_ax88772_init(sc); 654 655 /* 656 * Get station address. 657 */ 658 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) 659 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 660 else 661 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 662 663 /* 664 * Fetch IPG values. 665 */ 666 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 667 } 668 669 /* 670 * Probe for a AX88172 chip. 671 */ 672 static int 673 axe_probe(device_t dev) 674 { 675 struct usb_attach_arg *uaa = device_get_ivars(dev); 676 677 if (uaa->usb_mode != USB_MODE_HOST) 678 return (ENXIO); 679 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) 680 return (ENXIO); 681 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) 682 return (ENXIO); 683 684 return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 685 } 686 687 /* 688 * Attach the interface. Allocate softc structures, do ifmedia 689 * setup and ethernet/BPF attach. 690 */ 691 static int 692 axe_attach(device_t dev) 693 { 694 struct usb_attach_arg *uaa = device_get_ivars(dev); 695 struct axe_softc *sc = device_get_softc(dev); 696 struct usb_ether *ue = &sc->sc_ue; 697 uint8_t iface_index; 698 int error; 699 700 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 701 702 device_set_usb_desc(dev); 703 704 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 705 706 iface_index = AXE_IFACE_IDX; 707 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 708 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx); 709 if (error) { 710 device_printf(dev, "allocating USB transfers failed\n"); 711 goto detach; 712 } 713 714 ue->ue_sc = sc; 715 ue->ue_dev = dev; 716 ue->ue_udev = uaa->device; 717 ue->ue_mtx = &sc->sc_mtx; 718 ue->ue_methods = &axe_ue_methods; 719 720 error = uether_ifattach(ue); 721 if (error) { 722 device_printf(dev, "could not attach interface\n"); 723 goto detach; 724 } 725 return (0); /* success */ 726 727 detach: 728 axe_detach(dev); 729 return (ENXIO); /* failure */ 730 } 731 732 static int 733 axe_detach(device_t dev) 734 { 735 struct axe_softc *sc = device_get_softc(dev); 736 struct usb_ether *ue = &sc->sc_ue; 737 738 usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER); 739 uether_ifdetach(ue); 740 mtx_destroy(&sc->sc_mtx); 741 742 return (0); 743 } 744 745 static void 746 axe_intr_callback(struct usb_xfer *xfer, usb_error_t error) 747 { 748 switch (USB_GET_STATE(xfer)) { 749 case USB_ST_TRANSFERRED: 750 case USB_ST_SETUP: 751 tr_setup: 752 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 753 usbd_transfer_submit(xfer); 754 return; 755 756 default: /* Error */ 757 if (error != USB_ERR_CANCELLED) { 758 /* try to clear stall first */ 759 usbd_xfer_set_stall(xfer); 760 goto tr_setup; 761 } 762 return; 763 } 764 } 765 766 #if (AXE_BULK_BUF_SIZE >= 0x10000) 767 #error "Please update axe_bulk_read_callback()!" 768 #endif 769 770 static void 771 axe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 772 { 773 struct axe_softc *sc = usbd_xfer_softc(xfer); 774 struct usb_ether *ue = &sc->sc_ue; 775 struct ifnet *ifp = uether_getifp(ue); 776 struct axe_sframe_hdr hdr; 777 struct usb_page_cache *pc; 778 int err, pos, len; 779 int actlen; 780 781 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 782 783 switch (USB_GET_STATE(xfer)) { 784 case USB_ST_TRANSFERRED: 785 pos = 0; 786 len = 0; 787 err = 0; 788 789 pc = usbd_xfer_get_frame(xfer, 0); 790 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 791 while (pos < actlen) { 792 if ((pos + sizeof(hdr)) > actlen) { 793 /* too little data */ 794 err = EINVAL; 795 break; 796 } 797 usbd_copy_out(pc, pos, &hdr, sizeof(hdr)); 798 799 if ((hdr.len ^ hdr.ilen) != 0xFFFF) { 800 /* we lost sync */ 801 err = EINVAL; 802 break; 803 } 804 pos += sizeof(hdr); 805 806 len = le16toh(hdr.len); 807 if ((pos + len) > actlen) { 808 /* invalid length */ 809 err = EINVAL; 810 break; 811 } 812 err = uether_rxbuf(ue, pc, pos, len); 813 814 pos += len + (len % 2); 815 } 816 } else { 817 err = uether_rxbuf(ue, pc, 0, actlen); 818 } 819 820 if (err != 0) 821 ifp->if_ierrors++; 822 823 /* FALLTHROUGH */ 824 case USB_ST_SETUP: 825 tr_setup: 826 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 827 usbd_transfer_submit(xfer); 828 uether_rxflush(ue); 829 return; 830 831 default: /* Error */ 832 DPRINTF("bulk read error, %s\n", usbd_errstr(error)); 833 834 if (error != USB_ERR_CANCELLED) { 835 /* try to clear stall first */ 836 usbd_xfer_set_stall(xfer); 837 goto tr_setup; 838 } 839 return; 840 841 } 842 } 843 844 #if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 845 #error "Please update axe_bulk_write_callback()!" 846 #endif 847 848 static void 849 axe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 850 { 851 struct axe_softc *sc = usbd_xfer_softc(xfer); 852 struct axe_sframe_hdr hdr; 853 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 854 struct usb_page_cache *pc; 855 struct mbuf *m; 856 int pos; 857 858 switch (USB_GET_STATE(xfer)) { 859 case USB_ST_TRANSFERRED: 860 DPRINTFN(11, "transfer complete\n"); 861 ifp->if_opackets++; 862 /* FALLTHROUGH */ 863 case USB_ST_SETUP: 864 tr_setup: 865 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 866 /* 867 * don't send anything if there is no link ! 868 */ 869 return; 870 } 871 pos = 0; 872 pc = usbd_xfer_get_frame(xfer, 0); 873 874 while (1) { 875 876 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 877 878 if (m == NULL) { 879 if (pos > 0) 880 break; /* send out data */ 881 return; 882 } 883 if (m->m_pkthdr.len > MCLBYTES) { 884 m->m_pkthdr.len = MCLBYTES; 885 } 886 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 887 888 hdr.len = htole16(m->m_pkthdr.len); 889 hdr.ilen = ~hdr.len; 890 891 usbd_copy_in(pc, pos, &hdr, sizeof(hdr)); 892 893 pos += sizeof(hdr); 894 895 /* 896 * NOTE: Some drivers force a short packet 897 * by appending a dummy header with zero 898 * length at then end of the USB transfer. 899 * This driver uses the 900 * USB_FORCE_SHORT_XFER flag instead. 901 */ 902 } 903 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 904 pos += m->m_pkthdr.len; 905 906 /* 907 * if there's a BPF listener, bounce a copy 908 * of this frame to him: 909 */ 910 BPF_MTAP(ifp, m); 911 912 m_freem(m); 913 914 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 915 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) { 916 /* send out frame(s) */ 917 break; 918 } 919 } else { 920 /* send out frame */ 921 break; 922 } 923 } 924 925 usbd_xfer_set_frame_len(xfer, 0, pos); 926 usbd_transfer_submit(xfer); 927 return; 928 929 default: /* Error */ 930 DPRINTFN(11, "transfer error, %s\n", 931 usbd_errstr(error)); 932 933 ifp->if_oerrors++; 934 935 if (error != USB_ERR_CANCELLED) { 936 /* try to clear stall first */ 937 usbd_xfer_set_stall(xfer); 938 goto tr_setup; 939 } 940 return; 941 942 } 943 } 944 945 static void 946 axe_tick(struct usb_ether *ue) 947 { 948 struct axe_softc *sc = uether_getsc(ue); 949 struct mii_data *mii = GET_MII(sc); 950 951 AXE_LOCK_ASSERT(sc, MA_OWNED); 952 953 mii_tick(mii); 954 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 955 axe_miibus_statchg(ue->ue_dev); 956 if ((sc->sc_flags & AXE_FLAG_LINK) != 0) 957 axe_start(ue); 958 } 959 } 960 961 static void 962 axe_start(struct usb_ether *ue) 963 { 964 struct axe_softc *sc = uether_getsc(ue); 965 966 /* 967 * start the USB transfers, if not already started: 968 */ 969 usbd_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]); 970 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]); 971 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]); 972 } 973 974 static void 975 axe_init(struct usb_ether *ue) 976 { 977 struct axe_softc *sc = uether_getsc(ue); 978 struct ifnet *ifp = uether_getifp(ue); 979 uint16_t rxmode; 980 981 AXE_LOCK_ASSERT(sc, MA_OWNED); 982 983 /* Cancel pending I/O */ 984 axe_stop(ue); 985 986 /* Set MAC address. */ 987 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) 988 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 989 else 990 axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 991 992 /* Set transmitter IPG values */ 993 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 994 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 995 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 996 } else { 997 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 998 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 999 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 1000 } 1001 1002 /* Enable receiver, set RX mode */ 1003 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 1004 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 1005 #if 0 1006 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */ 1007 #else 1008 /* 1009 * Default Rx buffer size is too small to get 1010 * maximum performance. 1011 */ 1012 rxmode |= AXE_178_RXCMD_MFB_16384; 1013 #endif 1014 } else { 1015 rxmode |= AXE_172_RXCMD_UNICAST; 1016 } 1017 1018 /* If we want promiscuous mode, set the allframes bit. */ 1019 if (ifp->if_flags & IFF_PROMISC) 1020 rxmode |= AXE_RXCMD_PROMISC; 1021 1022 if (ifp->if_flags & IFF_BROADCAST) 1023 rxmode |= AXE_RXCMD_BROADCAST; 1024 1025 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1026 1027 /* Load the multicast filter. */ 1028 axe_setmulti(ue); 1029 1030 usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]); 1031 1032 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1033 axe_start(ue); 1034 } 1035 1036 static void 1037 axe_setpromisc(struct usb_ether *ue) 1038 { 1039 struct axe_softc *sc = uether_getsc(ue); 1040 struct ifnet *ifp = uether_getifp(ue); 1041 uint16_t rxmode; 1042 1043 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1044 1045 rxmode = le16toh(rxmode); 1046 1047 if (ifp->if_flags & IFF_PROMISC) { 1048 rxmode |= AXE_RXCMD_PROMISC; 1049 } else { 1050 rxmode &= ~AXE_RXCMD_PROMISC; 1051 } 1052 1053 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1054 1055 axe_setmulti(ue); 1056 } 1057 1058 static void 1059 axe_stop(struct usb_ether *ue) 1060 { 1061 struct axe_softc *sc = uether_getsc(ue); 1062 struct ifnet *ifp = uether_getifp(ue); 1063 1064 AXE_LOCK_ASSERT(sc, MA_OWNED); 1065 1066 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1067 sc->sc_flags &= ~AXE_FLAG_LINK; 1068 1069 /* 1070 * stop all the transfers, if not already stopped: 1071 */ 1072 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]); 1073 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]); 1074 usbd_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]); 1075 1076 axe_reset(sc); 1077 } 1078