1 /*- 2 * Copyright (c) 1997, 1998, 1999, 2000-2003 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. 38 * Used in the LinkSys USB200M and various other adapters. 39 * 40 * Manuals available from: 41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43 * controller) to find the definitions for the RX control register. 44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45 * 46 * Written by Bill Paul <wpaul@windriver.com> 47 * Senior Engineer 48 * Wind River Systems 49 */ 50 51 /* 52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53 * It uses an external PHY (reference designs use a RealTek chip), 54 * and has a 64-bit multicast hash filter. There is some information 55 * missing from the manual which one needs to know in order to make 56 * the chip function: 57 * 58 * - You must set bit 7 in the RX control register, otherwise the 59 * chip won't receive any packets. 60 * - You must initialize all 3 IPG registers, or you won't be able 61 * to send any packets. 62 * 63 * Note that this device appears to only support loading the station 64 * address via autload from the EEPROM (i.e. there's no way to manaully 65 * set it). 66 * 67 * (Adam Weinberger wanted me to name this driver if_gir.c.) 68 */ 69 70 /* 71 * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73 * 74 * Manual here: 75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77 */ 78 79 #include "usbdevs.h" 80 #include <dev/usb/usb.h> 81 #include <dev/usb/usb_mfunc.h> 82 #include <dev/usb/usb_error.h> 83 84 #define USB_DEBUG_VAR axe_debug 85 86 #include <dev/usb/usb_core.h> 87 #include <dev/usb/usb_lookup.h> 88 #include <dev/usb/usb_process.h> 89 #include <dev/usb/usb_debug.h> 90 #include <dev/usb/usb_request.h> 91 #include <dev/usb/usb_busdma.h> 92 #include <dev/usb/usb_util.h> 93 94 #include <dev/usb/net/usb_ethernet.h> 95 #include <dev/usb/net/if_axereg.h> 96 97 /* 98 * AXE_178_MAX_FRAME_BURST 99 * max frame burst size for Ax88178 and Ax88772 100 * 0 2048 bytes 101 * 1 4096 bytes 102 * 2 8192 bytes 103 * 3 16384 bytes 104 * use the largest your system can handle without USB stalling. 105 * 106 * NB: 88772 parts appear to generate lots of input errors with 107 * a 2K rx buffer and 8K is only slightly faster than 4K on an 108 * EHCI port on a T42 so change at your own risk. 109 */ 110 #define AXE_178_MAX_FRAME_BURST 1 111 112 #if USB_DEBUG 113 static int axe_debug = 0; 114 115 SYSCTL_NODE(_hw_usb2, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 116 SYSCTL_INT(_hw_usb2_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 117 "Debug level"); 118 #endif 119 120 /* 121 * Various supported device vendors/products. 122 */ 123 static const struct usb2_device_id axe_devs[] = { 124 {USB_VPI(USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200, 0)}, 125 {USB_VPI(USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2, 0)}, 126 {USB_VPI(USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET, AXE_FLAG_772)}, 127 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172, 0)}, 128 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178, AXE_FLAG_178)}, 129 {USB_VPI(USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772, AXE_FLAG_772)}, 130 {USB_VPI(USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T, 0)}, 131 {USB_VPI(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055, AXE_FLAG_178)}, 132 {USB_VPI(USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR, 0)}, 133 {USB_VPI(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2, AXE_FLAG_772)}, 134 {USB_VPI(USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX, 0)}, 135 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100, 0)}, 136 {USB_VPI(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1, AXE_FLAG_772)}, 137 {USB_VPI(USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E, 0)}, 138 {USB_VPI(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2, AXE_FLAG_178)}, 139 {USB_VPI(USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1, 0)}, 140 {USB_VPI(USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M, 0)}, 141 {USB_VPI(USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000, AXE_FLAG_178)}, 142 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX, 0)}, 143 {USB_VPI(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120, 0)}, 144 {USB_VPI(USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS, AXE_FLAG_772)}, 145 {USB_VPI(USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T, AXE_FLAG_178)}, 146 {USB_VPI(USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029, 0)}, 147 {USB_VPI(USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028, AXE_FLAG_178)}, 148 {USB_VPI(USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL, 0)}, 149 }; 150 151 static device_probe_t axe_probe; 152 static device_attach_t axe_attach; 153 static device_detach_t axe_detach; 154 static device_shutdown_t axe_shutdown; 155 156 static usb2_callback_t axe_intr_callback; 157 static usb2_callback_t axe_bulk_read_callback; 158 static usb2_callback_t axe_bulk_write_callback; 159 160 static miibus_readreg_t axe_miibus_readreg; 161 static miibus_writereg_t axe_miibus_writereg; 162 static miibus_statchg_t axe_miibus_statchg; 163 164 static usb2_ether_fn_t axe_attach_post; 165 static usb2_ether_fn_t axe_init; 166 static usb2_ether_fn_t axe_stop; 167 static usb2_ether_fn_t axe_start; 168 static usb2_ether_fn_t axe_tick; 169 static usb2_ether_fn_t axe_setmulti; 170 static usb2_ether_fn_t axe_setpromisc; 171 172 static int axe_ifmedia_upd(struct ifnet *); 173 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 174 static int axe_cmd(struct axe_softc *, int, int, int, void *); 175 static void axe_ax88178_init(struct axe_softc *); 176 static void axe_ax88772_init(struct axe_softc *); 177 static int axe_get_phyno(struct axe_softc *, int); 178 179 static const struct usb2_config axe_config[AXE_N_TRANSFER] = { 180 181 [AXE_BULK_DT_WR] = { 182 .type = UE_BULK, 183 .endpoint = UE_ADDR_ANY, 184 .direction = UE_DIR_OUT, 185 .mh.bufsize = AXE_BULK_BUF_SIZE, 186 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 187 .mh.callback = axe_bulk_write_callback, 188 .mh.timeout = 10000, /* 10 seconds */ 189 }, 190 191 [AXE_BULK_DT_RD] = { 192 .type = UE_BULK, 193 .endpoint = UE_ADDR_ANY, 194 .direction = UE_DIR_IN, 195 #if (MCLBYTES < 2048) 196 #error "(MCLBYTES < 2048)" 197 #endif 198 .mh.bufsize = MCLBYTES, 199 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 200 .mh.callback = axe_bulk_read_callback, 201 .mh.timeout = 0, /* no timeout */ 202 }, 203 204 [AXE_INTR_DT_RD] = { 205 .type = UE_INTERRUPT, 206 .endpoint = UE_ADDR_ANY, 207 .direction = UE_DIR_IN, 208 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 209 .mh.bufsize = 0, /* use wMaxPacketSize */ 210 .mh.callback = axe_intr_callback, 211 }, 212 }; 213 214 static device_method_t axe_methods[] = { 215 /* Device interface */ 216 DEVMETHOD(device_probe, axe_probe), 217 DEVMETHOD(device_attach, axe_attach), 218 DEVMETHOD(device_detach, axe_detach), 219 DEVMETHOD(device_shutdown, axe_shutdown), 220 221 /* bus interface */ 222 DEVMETHOD(bus_print_child, bus_generic_print_child), 223 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 224 225 /* MII interface */ 226 DEVMETHOD(miibus_readreg, axe_miibus_readreg), 227 DEVMETHOD(miibus_writereg, axe_miibus_writereg), 228 DEVMETHOD(miibus_statchg, axe_miibus_statchg), 229 230 {0, 0} 231 }; 232 233 static driver_t axe_driver = { 234 .name = "axe", 235 .methods = axe_methods, 236 .size = sizeof(struct axe_softc), 237 }; 238 239 static devclass_t axe_devclass; 240 241 DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0); 242 DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 243 MODULE_DEPEND(axe, uether, 1, 1, 1); 244 MODULE_DEPEND(axe, usb, 1, 1, 1); 245 MODULE_DEPEND(axe, ether, 1, 1, 1); 246 MODULE_DEPEND(axe, miibus, 1, 1, 1); 247 248 static const struct usb2_ether_methods axe_ue_methods = { 249 .ue_attach_post = axe_attach_post, 250 .ue_start = axe_start, 251 .ue_init = axe_init, 252 .ue_stop = axe_stop, 253 .ue_tick = axe_tick, 254 .ue_setmulti = axe_setmulti, 255 .ue_setpromisc = axe_setpromisc, 256 .ue_mii_upd = axe_ifmedia_upd, 257 .ue_mii_sts = axe_ifmedia_sts, 258 }; 259 260 static int 261 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 262 { 263 struct usb2_device_request req; 264 usb2_error_t err; 265 266 AXE_LOCK_ASSERT(sc, MA_OWNED); 267 268 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 269 UT_WRITE_VENDOR_DEVICE : 270 UT_READ_VENDOR_DEVICE); 271 req.bRequest = AXE_CMD_CMD(cmd); 272 USETW(req.wValue, val); 273 USETW(req.wIndex, index); 274 USETW(req.wLength, AXE_CMD_LEN(cmd)); 275 276 err = usb2_ether_do_request(&sc->sc_ue, &req, buf, 1000); 277 278 return (err); 279 } 280 281 static int 282 axe_miibus_readreg(device_t dev, int phy, int reg) 283 { 284 struct axe_softc *sc = device_get_softc(dev); 285 uint16_t val; 286 int locked; 287 288 if (sc->sc_phyno != phy) 289 return (0); 290 291 locked = mtx_owned(&sc->sc_mtx); 292 if (!locked) 293 AXE_LOCK(sc); 294 295 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 296 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 297 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 298 299 val = le16toh(val); 300 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) { 301 /* 302 * BMSR of AX88772 indicates that it supports extended 303 * capability but the extended status register is 304 * revered for embedded ethernet PHY. So clear the 305 * extended capability bit of BMSR. 306 */ 307 val &= ~BMSR_EXTCAP; 308 } 309 310 if (!locked) 311 AXE_UNLOCK(sc); 312 return (val); 313 } 314 315 static int 316 axe_miibus_writereg(device_t dev, int phy, int reg, int val) 317 { 318 struct axe_softc *sc = device_get_softc(dev); 319 int locked; 320 321 val = htole32(val); 322 323 if (sc->sc_phyno != phy) 324 return (0); 325 326 locked = mtx_owned(&sc->sc_mtx); 327 if (!locked) 328 AXE_LOCK(sc); 329 330 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 331 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 332 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 333 334 if (!locked) 335 AXE_UNLOCK(sc); 336 return (0); 337 } 338 339 static void 340 axe_miibus_statchg(device_t dev) 341 { 342 struct axe_softc *sc = device_get_softc(dev); 343 struct mii_data *mii = GET_MII(sc); 344 struct ifnet *ifp; 345 uint16_t val; 346 int err, locked; 347 348 locked = mtx_owned(&sc->sc_mtx); 349 if (!locked) 350 AXE_LOCK(sc); 351 352 ifp = usb2_ether_getifp(&sc->sc_ue); 353 if (mii == NULL || ifp == NULL || 354 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 355 goto done; 356 357 sc->sc_flags &= ~AXE_FLAG_LINK; 358 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 359 (IFM_ACTIVE | IFM_AVALID)) { 360 switch (IFM_SUBTYPE(mii->mii_media_active)) { 361 case IFM_10_T: 362 case IFM_100_TX: 363 sc->sc_flags |= AXE_FLAG_LINK; 364 break; 365 case IFM_1000_T: 366 if ((sc->sc_flags & AXE_FLAG_178) == 0) 367 break; 368 sc->sc_flags |= AXE_FLAG_LINK; 369 break; 370 default: 371 break; 372 } 373 } 374 375 /* Lost link, do nothing. */ 376 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 377 goto done; 378 379 val = 0; 380 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 381 val |= AXE_MEDIA_FULL_DUPLEX; 382 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 383 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 384 if ((sc->sc_flags & AXE_FLAG_178) != 0) 385 val |= AXE_178_MEDIA_ENCK; 386 switch (IFM_SUBTYPE(mii->mii_media_active)) { 387 case IFM_1000_T: 388 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 389 break; 390 case IFM_100_TX: 391 val |= AXE_178_MEDIA_100TX; 392 break; 393 case IFM_10_T: 394 /* doesn't need to be handled */ 395 break; 396 } 397 } 398 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 399 if (err) 400 device_printf(dev, "media change failed, error %d\n", err); 401 done: 402 if (!locked) 403 AXE_UNLOCK(sc); 404 } 405 406 /* 407 * Set media options. 408 */ 409 static int 410 axe_ifmedia_upd(struct ifnet *ifp) 411 { 412 struct axe_softc *sc = ifp->if_softc; 413 struct mii_data *mii = GET_MII(sc); 414 int error; 415 416 AXE_LOCK_ASSERT(sc, MA_OWNED); 417 418 if (mii->mii_instance) { 419 struct mii_softc *miisc; 420 421 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 422 mii_phy_reset(miisc); 423 } 424 error = mii_mediachg(mii); 425 return (error); 426 } 427 428 /* 429 * Report current media status. 430 */ 431 static void 432 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 433 { 434 struct axe_softc *sc = ifp->if_softc; 435 struct mii_data *mii = GET_MII(sc); 436 437 AXE_LOCK(sc); 438 mii_pollstat(mii); 439 AXE_UNLOCK(sc); 440 ifmr->ifm_active = mii->mii_media_active; 441 ifmr->ifm_status = mii->mii_media_status; 442 } 443 444 static void 445 axe_setmulti(struct usb2_ether *ue) 446 { 447 struct axe_softc *sc = usb2_ether_getsc(ue); 448 struct ifnet *ifp = usb2_ether_getifp(ue); 449 struct ifmultiaddr *ifma; 450 uint32_t h = 0; 451 uint16_t rxmode; 452 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 453 454 AXE_LOCK_ASSERT(sc, MA_OWNED); 455 456 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 457 rxmode = le16toh(rxmode); 458 459 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 460 rxmode |= AXE_RXCMD_ALLMULTI; 461 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 462 return; 463 } 464 rxmode &= ~AXE_RXCMD_ALLMULTI; 465 466 IF_ADDR_LOCK(ifp); 467 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) 468 { 469 if (ifma->ifma_addr->sa_family != AF_LINK) 470 continue; 471 h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 472 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 473 hashtbl[h / 8] |= 1 << (h % 8); 474 } 475 IF_ADDR_UNLOCK(ifp); 476 477 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 478 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 479 } 480 481 static int 482 axe_get_phyno(struct axe_softc *sc, int sel) 483 { 484 int phyno; 485 486 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 487 case PHY_TYPE_100_HOME: 488 case PHY_TYPE_GIG: 489 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 490 break; 491 case PHY_TYPE_SPECIAL: 492 /* FALLTHROUGH */ 493 case PHY_TYPE_RSVD: 494 /* FALLTHROUGH */ 495 case PHY_TYPE_NON_SUP: 496 /* FALLTHROUGH */ 497 default: 498 phyno = -1; 499 break; 500 } 501 502 return (phyno); 503 } 504 505 static void 506 axe_ax88178_init(struct axe_softc *sc) 507 { 508 int gpio0 = 0, phymode = 0; 509 uint16_t eeprom; 510 511 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 512 /* XXX magic */ 513 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 514 eeprom = le16toh(eeprom); 515 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 516 517 /* if EEPROM is invalid we have to use to GPIO0 */ 518 if (eeprom == 0xffff) { 519 phymode = 0; 520 gpio0 = 1; 521 } else { 522 phymode = eeprom & 7; 523 gpio0 = (eeprom & 0x80) ? 0 : 1; 524 } 525 526 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL); 527 usb2_ether_pause(&sc->sc_ue, hz / 16); 528 529 if ((eeprom >> 8) != 0x01) { 530 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 531 usb2_ether_pause(&sc->sc_ue, hz / 32); 532 533 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL); 534 usb2_ether_pause(&sc->sc_ue, hz / 3); 535 536 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL); 537 usb2_ether_pause(&sc->sc_ue, hz / 32); 538 } else { 539 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL); 540 usb2_ether_pause(&sc->sc_ue, hz / 32); 541 542 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL); 543 usb2_ether_pause(&sc->sc_ue, hz / 32); 544 } 545 546 /* soft reset */ 547 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 548 usb2_ether_pause(&sc->sc_ue, hz / 4); 549 550 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 551 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 552 usb2_ether_pause(&sc->sc_ue, hz / 4); 553 /* Enable MII/GMII/RGMII interface to work with external PHY. */ 554 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 555 usb2_ether_pause(&sc->sc_ue, hz / 4); 556 557 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 558 } 559 560 static void 561 axe_ax88772_init(struct axe_softc *sc) 562 { 563 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 564 usb2_ether_pause(&sc->sc_ue, hz / 16); 565 566 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 567 /* ask for the embedded PHY */ 568 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 569 usb2_ether_pause(&sc->sc_ue, hz / 64); 570 571 /* power down and reset state, pin reset state */ 572 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 573 AXE_SW_RESET_CLEAR, NULL); 574 usb2_ether_pause(&sc->sc_ue, hz / 16); 575 576 /* power down/reset state, pin operating state */ 577 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 578 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 579 usb2_ether_pause(&sc->sc_ue, hz / 4); 580 581 /* power up, reset */ 582 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 583 584 /* power up, operating */ 585 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 586 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 587 } else { 588 /* ask for external PHY */ 589 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 590 usb2_ether_pause(&sc->sc_ue, hz / 64); 591 592 /* power down internal PHY */ 593 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 594 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 595 } 596 597 usb2_ether_pause(&sc->sc_ue, hz / 4); 598 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 599 } 600 601 static void 602 axe_reset(struct axe_softc *sc) 603 { 604 struct usb2_config_descriptor *cd; 605 usb2_error_t err; 606 607 cd = usb2_get_config_descriptor(sc->sc_ue.ue_udev); 608 609 err = usb2_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 610 cd->bConfigurationValue); 611 if (err) 612 DPRINTF("reset failed (ignored)\n"); 613 614 /* Wait a little while for the chip to get its brains in order. */ 615 usb2_ether_pause(&sc->sc_ue, hz / 100); 616 } 617 618 static void 619 axe_attach_post(struct usb2_ether *ue) 620 { 621 struct axe_softc *sc = usb2_ether_getsc(ue); 622 623 /* 624 * Load PHY indexes first. Needed by axe_xxx_init(). 625 */ 626 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 627 #if 1 628 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n", 629 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 630 #endif 631 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 632 if (sc->sc_phyno == -1) 633 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 634 if (sc->sc_phyno == -1) { 635 device_printf(sc->sc_ue.ue_dev, 636 "no valid PHY address found, assuming PHY address 0\n"); 637 sc->sc_phyno = 0; 638 } 639 640 if (sc->sc_flags & AXE_FLAG_178) 641 axe_ax88178_init(sc); 642 else if (sc->sc_flags & AXE_FLAG_772) 643 axe_ax88772_init(sc); 644 645 /* 646 * Get station address. 647 */ 648 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) 649 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 650 else 651 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 652 653 /* 654 * Fetch IPG values. 655 */ 656 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 657 } 658 659 /* 660 * Probe for a AX88172 chip. 661 */ 662 static int 663 axe_probe(device_t dev) 664 { 665 struct usb2_attach_arg *uaa = device_get_ivars(dev); 666 667 if (uaa->usb2_mode != USB_MODE_HOST) 668 return (ENXIO); 669 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) 670 return (ENXIO); 671 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) 672 return (ENXIO); 673 674 return (usb2_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 675 } 676 677 /* 678 * Attach the interface. Allocate softc structures, do ifmedia 679 * setup and ethernet/BPF attach. 680 */ 681 static int 682 axe_attach(device_t dev) 683 { 684 struct usb2_attach_arg *uaa = device_get_ivars(dev); 685 struct axe_softc *sc = device_get_softc(dev); 686 struct usb2_ether *ue = &sc->sc_ue; 687 uint8_t iface_index; 688 int error; 689 690 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 691 692 device_set_usb2_desc(dev); 693 694 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 695 696 iface_index = AXE_IFACE_IDX; 697 error = usb2_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 698 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx); 699 if (error) { 700 device_printf(dev, "allocating USB transfers failed!\n"); 701 goto detach; 702 } 703 704 ue->ue_sc = sc; 705 ue->ue_dev = dev; 706 ue->ue_udev = uaa->device; 707 ue->ue_mtx = &sc->sc_mtx; 708 ue->ue_methods = &axe_ue_methods; 709 710 error = usb2_ether_ifattach(ue); 711 if (error) { 712 device_printf(dev, "could not attach interface\n"); 713 goto detach; 714 } 715 return (0); /* success */ 716 717 detach: 718 axe_detach(dev); 719 return (ENXIO); /* failure */ 720 } 721 722 static int 723 axe_detach(device_t dev) 724 { 725 struct axe_softc *sc = device_get_softc(dev); 726 struct usb2_ether *ue = &sc->sc_ue; 727 728 usb2_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER); 729 usb2_ether_ifdetach(ue); 730 mtx_destroy(&sc->sc_mtx); 731 732 return (0); 733 } 734 735 static void 736 axe_intr_callback(struct usb2_xfer *xfer) 737 { 738 switch (USB_GET_STATE(xfer)) { 739 case USB_ST_TRANSFERRED: 740 case USB_ST_SETUP: 741 tr_setup: 742 xfer->frlengths[0] = xfer->max_data_length; 743 usb2_start_hardware(xfer); 744 return; 745 746 default: /* Error */ 747 if (xfer->error != USB_ERR_CANCELLED) { 748 /* try to clear stall first */ 749 xfer->flags.stall_pipe = 1; 750 goto tr_setup; 751 } 752 return; 753 } 754 } 755 756 #if (AXE_BULK_BUF_SIZE >= 0x10000) 757 #error "Please update axe_bulk_read_callback()!" 758 #endif 759 760 static void 761 axe_bulk_read_callback(struct usb2_xfer *xfer) 762 { 763 struct axe_softc *sc = xfer->priv_sc; 764 struct usb2_ether *ue = &sc->sc_ue; 765 struct ifnet *ifp = usb2_ether_getifp(ue); 766 struct axe_sframe_hdr hdr; 767 int error, pos, len, adjust; 768 769 switch (USB_GET_STATE(xfer)) { 770 case USB_ST_TRANSFERRED: 771 pos = 0; 772 while (1) { 773 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 774 if (xfer->actlen < sizeof(hdr)) { 775 /* too little data */ 776 break; 777 } 778 usb2_copy_out(xfer->frbuffers, pos, &hdr, sizeof(hdr)); 779 780 if ((hdr.len ^ hdr.ilen) != 0xFFFF) { 781 /* we lost sync */ 782 break; 783 } 784 xfer->actlen -= sizeof(hdr); 785 pos += sizeof(hdr); 786 787 len = le16toh(hdr.len); 788 if (len > xfer->actlen) { 789 /* invalid length */ 790 break; 791 } 792 adjust = (len & 1); 793 794 } else { 795 len = xfer->actlen; 796 adjust = 0; 797 } 798 error = usb2_ether_rxbuf(ue, xfer->frbuffers, pos, len); 799 if (error) 800 break; 801 802 pos += len; 803 xfer->actlen -= len; 804 805 if (xfer->actlen <= adjust) { 806 /* we are finished */ 807 goto tr_setup; 808 } 809 pos += adjust; 810 xfer->actlen -= adjust; 811 } 812 813 /* count an error */ 814 ifp->if_ierrors++; 815 816 /* FALLTHROUGH */ 817 case USB_ST_SETUP: 818 tr_setup: 819 xfer->frlengths[0] = xfer->max_data_length; 820 usb2_start_hardware(xfer); 821 usb2_ether_rxflush(ue); 822 return; 823 824 default: /* Error */ 825 DPRINTF("bulk read error, %s\n", 826 usb2_errstr(xfer->error)); 827 828 if (xfer->error != USB_ERR_CANCELLED) { 829 /* try to clear stall first */ 830 xfer->flags.stall_pipe = 1; 831 goto tr_setup; 832 } 833 return; 834 835 } 836 } 837 838 #if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 839 #error "Please update axe_bulk_write_callback()!" 840 #endif 841 842 static void 843 axe_bulk_write_callback(struct usb2_xfer *xfer) 844 { 845 struct axe_softc *sc = xfer->priv_sc; 846 struct axe_sframe_hdr hdr; 847 struct ifnet *ifp = usb2_ether_getifp(&sc->sc_ue); 848 struct mbuf *m; 849 int pos; 850 851 switch (USB_GET_STATE(xfer)) { 852 case USB_ST_TRANSFERRED: 853 DPRINTFN(11, "transfer complete\n"); 854 ifp->if_opackets++; 855 /* FALLTHROUGH */ 856 case USB_ST_SETUP: 857 tr_setup: 858 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 859 /* 860 * don't send anything if there is no link ! 861 */ 862 return; 863 } 864 pos = 0; 865 866 while (1) { 867 868 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 869 870 if (m == NULL) { 871 if (pos > 0) 872 break; /* send out data */ 873 return; 874 } 875 if (m->m_pkthdr.len > MCLBYTES) { 876 m->m_pkthdr.len = MCLBYTES; 877 } 878 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 879 880 hdr.len = htole16(m->m_pkthdr.len); 881 hdr.ilen = ~hdr.len; 882 883 usb2_copy_in(xfer->frbuffers, pos, &hdr, sizeof(hdr)); 884 885 pos += sizeof(hdr); 886 887 /* 888 * NOTE: Some drivers force a short packet 889 * by appending a dummy header with zero 890 * length at then end of the USB transfer. 891 * This driver uses the 892 * USB_FORCE_SHORT_XFER flag instead. 893 */ 894 } 895 usb2_m_copy_in(xfer->frbuffers, pos, 896 m, 0, m->m_pkthdr.len); 897 898 pos += m->m_pkthdr.len; 899 900 /* 901 * if there's a BPF listener, bounce a copy 902 * of this frame to him: 903 */ 904 BPF_MTAP(ifp, m); 905 906 m_freem(m); 907 908 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) { 909 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) { 910 /* send out frame(s) */ 911 break; 912 } 913 } else { 914 /* send out frame */ 915 break; 916 } 917 } 918 919 xfer->frlengths[0] = pos; 920 usb2_start_hardware(xfer); 921 return; 922 923 default: /* Error */ 924 DPRINTFN(11, "transfer error, %s\n", 925 usb2_errstr(xfer->error)); 926 927 ifp->if_oerrors++; 928 929 if (xfer->error != USB_ERR_CANCELLED) { 930 /* try to clear stall first */ 931 xfer->flags.stall_pipe = 1; 932 goto tr_setup; 933 } 934 return; 935 936 } 937 } 938 939 static void 940 axe_tick(struct usb2_ether *ue) 941 { 942 struct axe_softc *sc = usb2_ether_getsc(ue); 943 struct mii_data *mii = GET_MII(sc); 944 945 AXE_LOCK_ASSERT(sc, MA_OWNED); 946 947 mii_tick(mii); 948 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 949 axe_miibus_statchg(ue->ue_dev); 950 if ((sc->sc_flags & AXE_FLAG_LINK) != 0) 951 axe_start(ue); 952 } 953 } 954 955 static void 956 axe_start(struct usb2_ether *ue) 957 { 958 struct axe_softc *sc = usb2_ether_getsc(ue); 959 960 /* 961 * start the USB transfers, if not already started: 962 */ 963 usb2_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]); 964 usb2_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]); 965 usb2_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]); 966 } 967 968 static void 969 axe_init(struct usb2_ether *ue) 970 { 971 struct axe_softc *sc = usb2_ether_getsc(ue); 972 struct ifnet *ifp = usb2_ether_getifp(ue); 973 uint16_t rxmode; 974 975 AXE_LOCK_ASSERT(sc, MA_OWNED); 976 977 /* Cancel pending I/O */ 978 axe_stop(ue); 979 980 #ifdef notdef 981 /* Set MAC address */ 982 axe_mac(sc, IF_LLADDR(ifp), 1); 983 #endif 984 985 /* Set transmitter IPG values */ 986 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 987 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 988 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 989 } else { 990 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 991 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 992 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 993 } 994 995 /* Enable receiver, set RX mode */ 996 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 997 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) { 998 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */ 999 } else { 1000 rxmode |= AXE_172_RXCMD_UNICAST; 1001 } 1002 1003 /* If we want promiscuous mode, set the allframes bit. */ 1004 if (ifp->if_flags & IFF_PROMISC) 1005 rxmode |= AXE_RXCMD_PROMISC; 1006 1007 if (ifp->if_flags & IFF_BROADCAST) 1008 rxmode |= AXE_RXCMD_BROADCAST; 1009 1010 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1011 1012 /* Load the multicast filter. */ 1013 axe_setmulti(ue); 1014 1015 usb2_transfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]); 1016 1017 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1018 axe_start(ue); 1019 } 1020 1021 static void 1022 axe_setpromisc(struct usb2_ether *ue) 1023 { 1024 struct axe_softc *sc = usb2_ether_getsc(ue); 1025 struct ifnet *ifp = usb2_ether_getifp(ue); 1026 uint16_t rxmode; 1027 1028 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1029 1030 rxmode = le16toh(rxmode); 1031 1032 if (ifp->if_flags & IFF_PROMISC) { 1033 rxmode |= AXE_RXCMD_PROMISC; 1034 } else { 1035 rxmode &= ~AXE_RXCMD_PROMISC; 1036 } 1037 1038 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1039 1040 axe_setmulti(ue); 1041 } 1042 1043 static void 1044 axe_stop(struct usb2_ether *ue) 1045 { 1046 struct axe_softc *sc = usb2_ether_getsc(ue); 1047 struct ifnet *ifp = usb2_ether_getifp(ue); 1048 1049 AXE_LOCK_ASSERT(sc, MA_OWNED); 1050 1051 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1052 sc->sc_flags &= ~AXE_FLAG_LINK; 1053 1054 /* 1055 * stop all the transfers, if not already stopped: 1056 */ 1057 usb2_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]); 1058 usb2_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]); 1059 usb2_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]); 1060 1061 axe_reset(sc); 1062 } 1063 1064 /* 1065 * Stop all chip I/O so that the kernel's probe routines don't 1066 * get confused by errant DMAs when rebooting. 1067 */ 1068 static int 1069 axe_shutdown(device_t dev) 1070 { 1071 struct axe_softc *sc = device_get_softc(dev); 1072 1073 usb2_ether_ifshutdown(&sc->sc_ue); 1074 1075 return (0); 1076 } 1077