1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1997, 1998, 1999, 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Copyright (c) 2006 8 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Bill Paul. 21 * 4. Neither the name of the author nor the names of any co-contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 /* 42 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 43 * Datasheet is available from http://www.admtek.com.tw. 44 * 45 * Written by Bill Paul <wpaul@ee.columbia.edu> 46 * Electrical Engineering Department 47 * Columbia University, New York City 48 * 49 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 50 * RED Inc. 51 */ 52 53 /* 54 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 55 * support: the control endpoint for reading/writing registers, burst 56 * read endpoint for packet reception, burst write for packet transmission 57 * and one for "interrupts." The chip uses the same RX filter scheme 58 * as the other ADMtek ethernet parts: one perfect filter entry for the 59 * the station address and a 64-bit multicast hash table. The chip supports 60 * both MII and HomePNA attachments. 61 * 62 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 63 * you're never really going to get 100Mbps speeds from this device. I 64 * think the idea is to allow the device to connect to 10 or 100Mbps 65 * networks, not necessarily to provide 100Mbps performance. Also, since 66 * the controller uses an external PHY chip, it's possible that board 67 * designers might simply choose a 10Mbps PHY. 68 * 69 * Registers are accessed using uether_do_request(). Packet 70 * transfers are done using usbd_transfer() and friends. 71 */ 72 73 #include <sys/stdint.h> 74 #include <sys/stddef.h> 75 #include <sys/param.h> 76 #include <sys/queue.h> 77 #include <sys/types.h> 78 #include <sys/systm.h> 79 #include <sys/socket.h> 80 #include <sys/kernel.h> 81 #include <sys/bus.h> 82 #include <sys/module.h> 83 #include <sys/lock.h> 84 #include <sys/mutex.h> 85 #include <sys/condvar.h> 86 #include <sys/sysctl.h> 87 #include <sys/sx.h> 88 #include <sys/unistd.h> 89 #include <sys/callout.h> 90 #include <sys/malloc.h> 91 #include <sys/priv.h> 92 93 #include <net/if.h> 94 #include <net/if_var.h> 95 #include <net/if_media.h> 96 97 #include <dev/mii/mii.h> 98 #include <dev/mii/miivar.h> 99 100 #include <dev/usb/usb.h> 101 #include <dev/usb/usbdi.h> 102 #include <dev/usb/usbdi_util.h> 103 #include "usbdevs.h" 104 105 #define USB_DEBUG_VAR aue_debug 106 #include <dev/usb/usb_debug.h> 107 #include <dev/usb/usb_process.h> 108 109 #include <dev/usb/net/usb_ethernet.h> 110 #include <dev/usb/net/if_auereg.h> 111 112 #include "miibus_if.h" 113 114 #ifdef USB_DEBUG 115 static int aue_debug = 0; 116 117 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 118 "USB aue"); 119 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0, 120 "Debug level"); 121 #endif 122 123 /* 124 * Various supported device vendors/products. 125 */ 126 static const STRUCT_USB_HOST_ID aue_devs[] = { 127 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 128 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 129 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 130 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 131 AUE_DEV(ABOCOM, XX10, 0), 132 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 133 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 134 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 135 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 136 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 137 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 138 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 139 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 140 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 141 AUE_DEV(ACCTON, USB320_EC, 0), 142 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 143 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 144 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 145 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 146 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 147 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 148 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 149 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 150 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 151 AUE_DEV(BILLIONTON, USB100, 0), 152 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 153 AUE_DEV(BILLIONTON, USBEL100, 0), 154 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 155 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 156 AUE_DEV(COREGA, FETHER_USB_TX, 0), 157 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 158 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 159 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 160 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 161 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 162 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 163 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 164 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 165 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 166 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 167 AUE_DEV(ELECOM, LDUSBTX0, 0), 168 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 169 AUE_DEV(ELECOM, LDUSBTX2, 0), 170 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 171 AUE_DEV(ELSA, USB2ETHERNET, 0), 172 AUE_DEV(GIGABYTE, GNBR402W, 0), 173 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 174 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 175 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 176 AUE_DEV(IODATA, USBETTX, 0), 177 AUE_DEV(KINGSTON, KNU101TX, 0), 178 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 179 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 180 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 181 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 182 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 183 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 184 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 185 AUE_DEV(MELCO, LUATX1, 0), 186 AUE_DEV(MELCO, LUATX5, 0), 187 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 188 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 189 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 190 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 191 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 192 AUE_DEV(SMC, 2202USB, 0), 193 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 194 AUE_DEV(SOHOWARE, NUB100, 0), 195 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 196 #undef AUE_DEV 197 }; 198 199 /* prototypes */ 200 201 static device_probe_t aue_probe; 202 static device_attach_t aue_attach; 203 static device_detach_t aue_detach; 204 static miibus_readreg_t aue_miibus_readreg; 205 static miibus_writereg_t aue_miibus_writereg; 206 static miibus_statchg_t aue_miibus_statchg; 207 208 static usb_callback_t aue_intr_callback; 209 static usb_callback_t aue_bulk_read_callback; 210 static usb_callback_t aue_bulk_write_callback; 211 212 static uether_fn_t aue_attach_post; 213 static uether_fn_t aue_init; 214 static uether_fn_t aue_stop; 215 static uether_fn_t aue_start; 216 static uether_fn_t aue_tick; 217 static uether_fn_t aue_setmulti; 218 static uether_fn_t aue_setpromisc; 219 220 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 221 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 222 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 223 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 224 static uint16_t aue_eeprom_getword(struct aue_softc *, int); 225 static void aue_reset(struct aue_softc *); 226 static void aue_reset_pegasus_II(struct aue_softc *); 227 228 static int aue_ifmedia_upd(struct ifnet *); 229 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 230 231 static const struct usb_config aue_config[AUE_N_TRANSFER] = { 232 233 [AUE_BULK_DT_WR] = { 234 .type = UE_BULK, 235 .endpoint = UE_ADDR_ANY, 236 .direction = UE_DIR_OUT, 237 .bufsize = (MCLBYTES + 2), 238 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 239 .callback = aue_bulk_write_callback, 240 .timeout = 10000, /* 10 seconds */ 241 }, 242 243 [AUE_BULK_DT_RD] = { 244 .type = UE_BULK, 245 .endpoint = UE_ADDR_ANY, 246 .direction = UE_DIR_IN, 247 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 248 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 249 .callback = aue_bulk_read_callback, 250 }, 251 252 [AUE_INTR_DT_RD] = { 253 .type = UE_INTERRUPT, 254 .endpoint = UE_ADDR_ANY, 255 .direction = UE_DIR_IN, 256 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 257 .bufsize = 0, /* use wMaxPacketSize */ 258 .callback = aue_intr_callback, 259 }, 260 }; 261 262 static device_method_t aue_methods[] = { 263 /* Device interface */ 264 DEVMETHOD(device_probe, aue_probe), 265 DEVMETHOD(device_attach, aue_attach), 266 DEVMETHOD(device_detach, aue_detach), 267 268 /* MII interface */ 269 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 270 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 271 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 272 273 DEVMETHOD_END 274 }; 275 276 static driver_t aue_driver = { 277 .name = "aue", 278 .methods = aue_methods, 279 .size = sizeof(struct aue_softc) 280 }; 281 282 static devclass_t aue_devclass; 283 284 DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0); 285 DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0); 286 MODULE_DEPEND(aue, uether, 1, 1, 1); 287 MODULE_DEPEND(aue, usb, 1, 1, 1); 288 MODULE_DEPEND(aue, ether, 1, 1, 1); 289 MODULE_DEPEND(aue, miibus, 1, 1, 1); 290 MODULE_VERSION(aue, 1); 291 USB_PNP_HOST_INFO(aue_devs); 292 293 static const struct usb_ether_methods aue_ue_methods = { 294 .ue_attach_post = aue_attach_post, 295 .ue_start = aue_start, 296 .ue_init = aue_init, 297 .ue_stop = aue_stop, 298 .ue_tick = aue_tick, 299 .ue_setmulti = aue_setmulti, 300 .ue_setpromisc = aue_setpromisc, 301 .ue_mii_upd = aue_ifmedia_upd, 302 .ue_mii_sts = aue_ifmedia_sts, 303 }; 304 305 #define AUE_SETBIT(sc, reg, x) \ 306 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 307 308 #define AUE_CLRBIT(sc, reg, x) \ 309 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 310 311 static uint8_t 312 aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 313 { 314 struct usb_device_request req; 315 usb_error_t err; 316 uint8_t val; 317 318 req.bmRequestType = UT_READ_VENDOR_DEVICE; 319 req.bRequest = AUE_UR_READREG; 320 USETW(req.wValue, 0); 321 USETW(req.wIndex, reg); 322 USETW(req.wLength, 1); 323 324 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 325 if (err) 326 return (0); 327 return (val); 328 } 329 330 static uint16_t 331 aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 332 { 333 struct usb_device_request req; 334 usb_error_t err; 335 uint16_t val; 336 337 req.bmRequestType = UT_READ_VENDOR_DEVICE; 338 req.bRequest = AUE_UR_READREG; 339 USETW(req.wValue, 0); 340 USETW(req.wIndex, reg); 341 USETW(req.wLength, 2); 342 343 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 344 if (err) 345 return (0); 346 return (le16toh(val)); 347 } 348 349 static void 350 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 351 { 352 struct usb_device_request req; 353 354 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 355 req.bRequest = AUE_UR_WRITEREG; 356 req.wValue[0] = val; 357 req.wValue[1] = 0; 358 USETW(req.wIndex, reg); 359 USETW(req.wLength, 1); 360 361 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 362 /* error ignored */ 363 } 364 } 365 366 static void 367 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 368 { 369 struct usb_device_request req; 370 371 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 372 req.bRequest = AUE_UR_WRITEREG; 373 USETW(req.wValue, val); 374 USETW(req.wIndex, reg); 375 USETW(req.wLength, 2); 376 377 val = htole16(val); 378 379 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 380 /* error ignored */ 381 } 382 } 383 384 /* 385 * Read a word of data stored in the EEPROM at address 'addr.' 386 */ 387 static uint16_t 388 aue_eeprom_getword(struct aue_softc *sc, int addr) 389 { 390 int i; 391 392 aue_csr_write_1(sc, AUE_EE_REG, addr); 393 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 394 395 for (i = 0; i != AUE_TIMEOUT; i++) { 396 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 397 break; 398 if (uether_pause(&sc->sc_ue, hz / 100)) 399 break; 400 } 401 402 if (i == AUE_TIMEOUT) 403 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 404 405 return (aue_csr_read_2(sc, AUE_EE_DATA)); 406 } 407 408 /* 409 * Read station address(offset 0) from the EEPROM. 410 */ 411 static void 412 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr) 413 { 414 int i, offset; 415 uint16_t word; 416 417 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) { 418 word = aue_eeprom_getword(sc, offset + i); 419 eaddr[i * 2] = (uint8_t)word; 420 eaddr[i * 2 + 1] = (uint8_t)(word >> 8); 421 } 422 } 423 424 static int 425 aue_miibus_readreg(device_t dev, int phy, int reg) 426 { 427 struct aue_softc *sc = device_get_softc(dev); 428 int i, locked; 429 uint16_t val = 0; 430 431 locked = mtx_owned(&sc->sc_mtx); 432 if (!locked) 433 AUE_LOCK(sc); 434 435 /* 436 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 437 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 438 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 439 * actually connected to anything, so we ignore the 10Mbps one. It 440 * happens to be configured for MII address 3, so we filter that out. 441 */ 442 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 443 if (phy == 3) 444 goto done; 445 #if 0 446 if (phy != 1) 447 goto done; 448 #endif 449 } 450 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 451 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 452 453 for (i = 0; i != AUE_TIMEOUT; i++) { 454 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 455 break; 456 if (uether_pause(&sc->sc_ue, hz / 100)) 457 break; 458 } 459 460 if (i == AUE_TIMEOUT) 461 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 462 463 val = aue_csr_read_2(sc, AUE_PHY_DATA); 464 465 done: 466 if (!locked) 467 AUE_UNLOCK(sc); 468 return (val); 469 } 470 471 static int 472 aue_miibus_writereg(device_t dev, int phy, int reg, int data) 473 { 474 struct aue_softc *sc = device_get_softc(dev); 475 int i; 476 int locked; 477 478 if (phy == 3) 479 return (0); 480 481 locked = mtx_owned(&sc->sc_mtx); 482 if (!locked) 483 AUE_LOCK(sc); 484 485 aue_csr_write_2(sc, AUE_PHY_DATA, data); 486 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 487 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 488 489 for (i = 0; i != AUE_TIMEOUT; i++) { 490 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 491 break; 492 if (uether_pause(&sc->sc_ue, hz / 100)) 493 break; 494 } 495 496 if (i == AUE_TIMEOUT) 497 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 498 499 if (!locked) 500 AUE_UNLOCK(sc); 501 return (0); 502 } 503 504 static void 505 aue_miibus_statchg(device_t dev) 506 { 507 struct aue_softc *sc = device_get_softc(dev); 508 struct mii_data *mii = GET_MII(sc); 509 int locked; 510 511 locked = mtx_owned(&sc->sc_mtx); 512 if (!locked) 513 AUE_LOCK(sc); 514 515 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 516 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 517 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 518 else 519 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 520 521 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 522 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 523 else 524 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 525 526 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 527 528 /* 529 * Set the LED modes on the LinkSys adapter. 530 * This turns on the 'dual link LED' bin in the auxmode 531 * register of the Broadcom PHY. 532 */ 533 if (sc->sc_flags & AUE_FLAG_LSYS) { 534 uint16_t auxmode; 535 536 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 537 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 538 } 539 if (!locked) 540 AUE_UNLOCK(sc); 541 } 542 543 #define AUE_BITS 6 544 static u_int 545 aue_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 546 { 547 uint8_t *hashtbl = arg; 548 uint32_t h; 549 550 h = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 551 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 552 553 return (1); 554 } 555 556 static void 557 aue_setmulti(struct usb_ether *ue) 558 { 559 struct aue_softc *sc = uether_getsc(ue); 560 struct ifnet *ifp = uether_getifp(ue); 561 uint32_t i; 562 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 563 564 AUE_LOCK_ASSERT(sc, MA_OWNED); 565 566 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 567 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 568 return; 569 } 570 571 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 572 573 /* now program new ones */ 574 if_foreach_llmaddr(ifp, aue_hash_maddr, hashtbl); 575 576 /* write the hashtable */ 577 for (i = 0; i != 8; i++) 578 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 579 } 580 581 static void 582 aue_reset_pegasus_II(struct aue_softc *sc) 583 { 584 /* Magic constants taken from Linux driver. */ 585 aue_csr_write_1(sc, AUE_REG_1D, 0); 586 aue_csr_write_1(sc, AUE_REG_7B, 2); 587 #if 0 588 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 589 aue_csr_write_1(sc, AUE_REG_81, 6); 590 else 591 #endif 592 aue_csr_write_1(sc, AUE_REG_81, 2); 593 } 594 595 static void 596 aue_reset(struct aue_softc *sc) 597 { 598 int i; 599 600 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 601 602 for (i = 0; i != AUE_TIMEOUT; i++) { 603 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 604 break; 605 if (uether_pause(&sc->sc_ue, hz / 100)) 606 break; 607 } 608 609 if (i == AUE_TIMEOUT) 610 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 611 612 /* 613 * The PHY(s) attached to the Pegasus chip may be held 614 * in reset until we flip on the GPIO outputs. Make sure 615 * to set the GPIO pins high so that the PHY(s) will 616 * be enabled. 617 * 618 * NOTE: We used to force all of the GPIO pins low first and then 619 * enable the ones we want. This has been changed to better 620 * match the ADMtek's reference design to avoid setting the 621 * power-down configuration line of the PHY at the same time 622 * it is reset. 623 */ 624 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 625 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 626 627 if (sc->sc_flags & AUE_FLAG_LSYS) { 628 /* Grrr. LinkSys has to be different from everyone else. */ 629 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 630 aue_csr_write_1(sc, AUE_GPIO0, 631 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 632 } 633 if (sc->sc_flags & AUE_FLAG_PII) 634 aue_reset_pegasus_II(sc); 635 636 /* Wait a little while for the chip to get its brains in order: */ 637 uether_pause(&sc->sc_ue, hz / 100); 638 } 639 640 static void 641 aue_attach_post(struct usb_ether *ue) 642 { 643 struct aue_softc *sc = uether_getsc(ue); 644 645 /* reset the adapter */ 646 aue_reset(sc); 647 648 /* get station address from the EEPROM */ 649 aue_read_mac(sc, ue->ue_eaddr); 650 } 651 652 /* 653 * Probe for a Pegasus chip. 654 */ 655 static int 656 aue_probe(device_t dev) 657 { 658 struct usb_attach_arg *uaa = device_get_ivars(dev); 659 660 if (uaa->usb_mode != USB_MODE_HOST) 661 return (ENXIO); 662 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 663 return (ENXIO); 664 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 665 return (ENXIO); 666 /* 667 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 668 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 669 * the devices that look like Bluetooth adapters. 670 */ 671 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 672 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 673 uaa->info.bcdDevice == 0x0413) 674 return (ENXIO); 675 676 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 677 } 678 679 /* 680 * Attach the interface. Allocate softc structures, do ifmedia 681 * setup and ethernet/BPF attach. 682 */ 683 static int 684 aue_attach(device_t dev) 685 { 686 struct usb_attach_arg *uaa = device_get_ivars(dev); 687 struct aue_softc *sc = device_get_softc(dev); 688 struct usb_ether *ue = &sc->sc_ue; 689 uint8_t iface_index; 690 int error; 691 692 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 693 694 if (uaa->info.bcdDevice >= 0x0201) { 695 /* XXX currently undocumented */ 696 sc->sc_flags |= AUE_FLAG_VER_2; 697 } 698 699 device_set_usb_desc(dev); 700 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 701 702 iface_index = AUE_IFACE_IDX; 703 error = usbd_transfer_setup(uaa->device, &iface_index, 704 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 705 sc, &sc->sc_mtx); 706 if (error) { 707 device_printf(dev, "allocating USB transfers failed\n"); 708 goto detach; 709 } 710 711 ue->ue_sc = sc; 712 ue->ue_dev = dev; 713 ue->ue_udev = uaa->device; 714 ue->ue_mtx = &sc->sc_mtx; 715 ue->ue_methods = &aue_ue_methods; 716 717 error = uether_ifattach(ue); 718 if (error) { 719 device_printf(dev, "could not attach interface\n"); 720 goto detach; 721 } 722 return (0); /* success */ 723 724 detach: 725 aue_detach(dev); 726 return (ENXIO); /* failure */ 727 } 728 729 static int 730 aue_detach(device_t dev) 731 { 732 struct aue_softc *sc = device_get_softc(dev); 733 struct usb_ether *ue = &sc->sc_ue; 734 735 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 736 uether_ifdetach(ue); 737 mtx_destroy(&sc->sc_mtx); 738 739 return (0); 740 } 741 742 static void 743 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 744 { 745 struct aue_softc *sc = usbd_xfer_softc(xfer); 746 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 747 struct aue_intrpkt pkt; 748 struct usb_page_cache *pc; 749 int actlen; 750 751 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 752 753 switch (USB_GET_STATE(xfer)) { 754 case USB_ST_TRANSFERRED: 755 756 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 757 actlen >= (int)sizeof(pkt)) { 758 759 pc = usbd_xfer_get_frame(xfer, 0); 760 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 761 762 if (pkt.aue_txstat0) 763 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 764 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL | 765 AUE_TXSTAT0_EXCESSCOLL)) 766 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 767 } 768 /* FALLTHROUGH */ 769 case USB_ST_SETUP: 770 tr_setup: 771 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 772 usbd_transfer_submit(xfer); 773 return; 774 775 default: /* Error */ 776 if (error != USB_ERR_CANCELLED) { 777 /* try to clear stall first */ 778 usbd_xfer_set_stall(xfer); 779 goto tr_setup; 780 } 781 return; 782 } 783 } 784 785 static void 786 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 787 { 788 struct aue_softc *sc = usbd_xfer_softc(xfer); 789 struct usb_ether *ue = &sc->sc_ue; 790 struct ifnet *ifp = uether_getifp(ue); 791 struct aue_rxpkt stat; 792 struct usb_page_cache *pc; 793 int actlen; 794 795 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 796 pc = usbd_xfer_get_frame(xfer, 0); 797 798 switch (USB_GET_STATE(xfer)) { 799 case USB_ST_TRANSFERRED: 800 DPRINTFN(11, "received %d bytes\n", actlen); 801 802 if (sc->sc_flags & AUE_FLAG_VER_2) { 803 804 if (actlen == 0) { 805 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 806 goto tr_setup; 807 } 808 } else { 809 810 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 811 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 812 goto tr_setup; 813 } 814 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 815 sizeof(stat)); 816 817 /* 818 * turn off all the non-error bits in the rx status 819 * word: 820 */ 821 stat.aue_rxstat &= AUE_RXSTAT_MASK; 822 if (stat.aue_rxstat) { 823 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 824 goto tr_setup; 825 } 826 /* No errors; receive the packet. */ 827 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 828 } 829 uether_rxbuf(ue, pc, 0, actlen); 830 831 /* FALLTHROUGH */ 832 case USB_ST_SETUP: 833 tr_setup: 834 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 835 usbd_transfer_submit(xfer); 836 uether_rxflush(ue); 837 return; 838 839 default: /* Error */ 840 DPRINTF("bulk read error, %s\n", 841 usbd_errstr(error)); 842 843 if (error != USB_ERR_CANCELLED) { 844 /* try to clear stall first */ 845 usbd_xfer_set_stall(xfer); 846 goto tr_setup; 847 } 848 return; 849 } 850 } 851 852 static void 853 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 854 { 855 struct aue_softc *sc = usbd_xfer_softc(xfer); 856 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 857 struct usb_page_cache *pc; 858 struct mbuf *m; 859 uint8_t buf[2]; 860 int actlen; 861 862 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 863 pc = usbd_xfer_get_frame(xfer, 0); 864 865 switch (USB_GET_STATE(xfer)) { 866 case USB_ST_TRANSFERRED: 867 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 868 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 869 870 /* FALLTHROUGH */ 871 case USB_ST_SETUP: 872 tr_setup: 873 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 874 /* 875 * don't send anything if there is no link ! 876 */ 877 return; 878 } 879 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 880 881 if (m == NULL) 882 return; 883 if (m->m_pkthdr.len > MCLBYTES) 884 m->m_pkthdr.len = MCLBYTES; 885 if (sc->sc_flags & AUE_FLAG_VER_2) { 886 887 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 888 889 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 890 891 } else { 892 893 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 894 895 /* 896 * The ADMtek documentation says that the 897 * packet length is supposed to be specified 898 * in the first two bytes of the transfer, 899 * however it actually seems to ignore this 900 * info and base the frame size on the bulk 901 * transfer length. 902 */ 903 buf[0] = (uint8_t)(m->m_pkthdr.len); 904 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 905 906 usbd_copy_in(pc, 0, buf, 2); 907 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 908 } 909 910 /* 911 * if there's a BPF listener, bounce a copy 912 * of this frame to him: 913 */ 914 BPF_MTAP(ifp, m); 915 916 m_freem(m); 917 918 usbd_transfer_submit(xfer); 919 return; 920 921 default: /* Error */ 922 DPRINTFN(11, "transfer error, %s\n", 923 usbd_errstr(error)); 924 925 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 926 927 if (error != USB_ERR_CANCELLED) { 928 /* try to clear stall first */ 929 usbd_xfer_set_stall(xfer); 930 goto tr_setup; 931 } 932 return; 933 } 934 } 935 936 static void 937 aue_tick(struct usb_ether *ue) 938 { 939 struct aue_softc *sc = uether_getsc(ue); 940 struct mii_data *mii = GET_MII(sc); 941 942 AUE_LOCK_ASSERT(sc, MA_OWNED); 943 944 mii_tick(mii); 945 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 946 && mii->mii_media_status & IFM_ACTIVE && 947 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 948 sc->sc_flags |= AUE_FLAG_LINK; 949 aue_start(ue); 950 } 951 } 952 953 static void 954 aue_start(struct usb_ether *ue) 955 { 956 struct aue_softc *sc = uether_getsc(ue); 957 958 /* 959 * start the USB transfers, if not already started: 960 */ 961 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 962 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 963 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 964 } 965 966 static void 967 aue_init(struct usb_ether *ue) 968 { 969 struct aue_softc *sc = uether_getsc(ue); 970 struct ifnet *ifp = uether_getifp(ue); 971 int i; 972 973 AUE_LOCK_ASSERT(sc, MA_OWNED); 974 975 /* 976 * Cancel pending I/O 977 */ 978 aue_reset(sc); 979 980 /* Set MAC address */ 981 for (i = 0; i != ETHER_ADDR_LEN; i++) 982 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 983 984 /* update promiscuous setting */ 985 aue_setpromisc(ue); 986 987 /* Load the multicast filter. */ 988 aue_setmulti(ue); 989 990 /* Enable RX and TX */ 991 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 992 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 993 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 994 995 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 996 997 ifp->if_drv_flags |= IFF_DRV_RUNNING; 998 aue_start(ue); 999 } 1000 1001 static void 1002 aue_setpromisc(struct usb_ether *ue) 1003 { 1004 struct aue_softc *sc = uether_getsc(ue); 1005 struct ifnet *ifp = uether_getifp(ue); 1006 1007 AUE_LOCK_ASSERT(sc, MA_OWNED); 1008 1009 /* if we want promiscuous mode, set the allframes bit: */ 1010 if (ifp->if_flags & IFF_PROMISC) 1011 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1012 else 1013 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1014 } 1015 1016 /* 1017 * Set media options. 1018 */ 1019 static int 1020 aue_ifmedia_upd(struct ifnet *ifp) 1021 { 1022 struct aue_softc *sc = ifp->if_softc; 1023 struct mii_data *mii = GET_MII(sc); 1024 struct mii_softc *miisc; 1025 int error; 1026 1027 AUE_LOCK_ASSERT(sc, MA_OWNED); 1028 1029 sc->sc_flags &= ~AUE_FLAG_LINK; 1030 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1031 PHY_RESET(miisc); 1032 error = mii_mediachg(mii); 1033 return (error); 1034 } 1035 1036 /* 1037 * Report current media status. 1038 */ 1039 static void 1040 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1041 { 1042 struct aue_softc *sc = ifp->if_softc; 1043 struct mii_data *mii = GET_MII(sc); 1044 1045 AUE_LOCK(sc); 1046 mii_pollstat(mii); 1047 ifmr->ifm_active = mii->mii_media_active; 1048 ifmr->ifm_status = mii->mii_media_status; 1049 AUE_UNLOCK(sc); 1050 } 1051 1052 /* 1053 * Stop the adapter and free any mbufs allocated to the 1054 * RX and TX lists. 1055 */ 1056 static void 1057 aue_stop(struct usb_ether *ue) 1058 { 1059 struct aue_softc *sc = uether_getsc(ue); 1060 struct ifnet *ifp = uether_getifp(ue); 1061 1062 AUE_LOCK_ASSERT(sc, MA_OWNED); 1063 1064 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1065 sc->sc_flags &= ~AUE_FLAG_LINK; 1066 1067 /* 1068 * stop all the transfers, if not already stopped: 1069 */ 1070 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1071 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1072 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1073 1074 aue_csr_write_1(sc, AUE_CTL0, 0); 1075 aue_csr_write_1(sc, AUE_CTL1, 0); 1076 aue_reset(sc); 1077 } 1078