1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1997, 1998, 1999, 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Copyright (c) 2006 8 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Bill Paul. 21 * 4. Neither the name of the author nor the names of any co-contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 /* 42 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 43 * Datasheet is available from http://www.admtek.com.tw. 44 * 45 * Written by Bill Paul <wpaul@ee.columbia.edu> 46 * Electrical Engineering Department 47 * Columbia University, New York City 48 * 49 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 50 * RED Inc. 51 */ 52 53 /* 54 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 55 * support: the control endpoint for reading/writing registers, burst 56 * read endpoint for packet reception, burst write for packet transmission 57 * and one for "interrupts." The chip uses the same RX filter scheme 58 * as the other ADMtek ethernet parts: one perfect filter entry for the 59 * the station address and a 64-bit multicast hash table. The chip supports 60 * both MII and HomePNA attachments. 61 * 62 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 63 * you're never really going to get 100Mbps speeds from this device. I 64 * think the idea is to allow the device to connect to 10 or 100Mbps 65 * networks, not necessarily to provide 100Mbps performance. Also, since 66 * the controller uses an external PHY chip, it's possible that board 67 * designers might simply choose a 10Mbps PHY. 68 * 69 * Registers are accessed using uether_do_request(). Packet 70 * transfers are done using usbd_transfer() and friends. 71 */ 72 73 #include <sys/stdint.h> 74 #include <sys/stddef.h> 75 #include <sys/param.h> 76 #include <sys/queue.h> 77 #include <sys/types.h> 78 #include <sys/systm.h> 79 #include <sys/socket.h> 80 #include <sys/kernel.h> 81 #include <sys/bus.h> 82 #include <sys/module.h> 83 #include <sys/lock.h> 84 #include <sys/mutex.h> 85 #include <sys/condvar.h> 86 #include <sys/sysctl.h> 87 #include <sys/sx.h> 88 #include <sys/unistd.h> 89 #include <sys/callout.h> 90 #include <sys/malloc.h> 91 #include <sys/priv.h> 92 93 #include <net/if.h> 94 #include <net/if_var.h> 95 96 #include <dev/usb/usb.h> 97 #include <dev/usb/usbdi.h> 98 #include <dev/usb/usbdi_util.h> 99 #include "usbdevs.h" 100 101 #define USB_DEBUG_VAR aue_debug 102 #include <dev/usb/usb_debug.h> 103 #include <dev/usb/usb_process.h> 104 105 #include <dev/usb/net/usb_ethernet.h> 106 #include <dev/usb/net/if_auereg.h> 107 108 #ifdef USB_DEBUG 109 static int aue_debug = 0; 110 111 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW, 0, "USB aue"); 112 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0, 113 "Debug level"); 114 #endif 115 116 /* 117 * Various supported device vendors/products. 118 */ 119 static const STRUCT_USB_HOST_ID aue_devs[] = { 120 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 121 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 122 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 123 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 124 AUE_DEV(ABOCOM, XX10, 0), 125 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 126 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 127 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 128 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 129 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 130 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 131 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 132 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 133 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 134 AUE_DEV(ACCTON, USB320_EC, 0), 135 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 136 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 137 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 138 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 139 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 140 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 141 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 142 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 143 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 144 AUE_DEV(BILLIONTON, USB100, 0), 145 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 146 AUE_DEV(BILLIONTON, USBEL100, 0), 147 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 148 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 149 AUE_DEV(COREGA, FETHER_USB_TX, 0), 150 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 151 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 152 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 153 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 154 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 155 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 156 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 157 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 158 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 159 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 160 AUE_DEV(ELECOM, LDUSBTX0, 0), 161 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 162 AUE_DEV(ELECOM, LDUSBTX2, 0), 163 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 164 AUE_DEV(ELSA, USB2ETHERNET, 0), 165 AUE_DEV(GIGABYTE, GNBR402W, 0), 166 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 167 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 168 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 169 AUE_DEV(IODATA, USBETTX, 0), 170 AUE_DEV(KINGSTON, KNU101TX, 0), 171 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 172 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 173 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 174 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 175 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 176 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 177 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 178 AUE_DEV(MELCO, LUATX1, 0), 179 AUE_DEV(MELCO, LUATX5, 0), 180 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 181 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 182 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 183 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 184 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 185 AUE_DEV(SMC, 2202USB, 0), 186 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 187 AUE_DEV(SOHOWARE, NUB100, 0), 188 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 189 #undef AUE_DEV 190 }; 191 192 /* prototypes */ 193 194 static device_probe_t aue_probe; 195 static device_attach_t aue_attach; 196 static device_detach_t aue_detach; 197 static miibus_readreg_t aue_miibus_readreg; 198 static miibus_writereg_t aue_miibus_writereg; 199 static miibus_statchg_t aue_miibus_statchg; 200 201 static usb_callback_t aue_intr_callback; 202 static usb_callback_t aue_bulk_read_callback; 203 static usb_callback_t aue_bulk_write_callback; 204 205 static uether_fn_t aue_attach_post; 206 static uether_fn_t aue_init; 207 static uether_fn_t aue_stop; 208 static uether_fn_t aue_start; 209 static uether_fn_t aue_tick; 210 static uether_fn_t aue_setmulti; 211 static uether_fn_t aue_setpromisc; 212 213 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 214 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 215 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 216 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 217 static uint16_t aue_eeprom_getword(struct aue_softc *, int); 218 static void aue_reset(struct aue_softc *); 219 static void aue_reset_pegasus_II(struct aue_softc *); 220 221 static int aue_ifmedia_upd(struct ifnet *); 222 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 223 224 static const struct usb_config aue_config[AUE_N_TRANSFER] = { 225 226 [AUE_BULK_DT_WR] = { 227 .type = UE_BULK, 228 .endpoint = UE_ADDR_ANY, 229 .direction = UE_DIR_OUT, 230 .bufsize = (MCLBYTES + 2), 231 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 232 .callback = aue_bulk_write_callback, 233 .timeout = 10000, /* 10 seconds */ 234 }, 235 236 [AUE_BULK_DT_RD] = { 237 .type = UE_BULK, 238 .endpoint = UE_ADDR_ANY, 239 .direction = UE_DIR_IN, 240 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 241 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 242 .callback = aue_bulk_read_callback, 243 }, 244 245 [AUE_INTR_DT_RD] = { 246 .type = UE_INTERRUPT, 247 .endpoint = UE_ADDR_ANY, 248 .direction = UE_DIR_IN, 249 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 250 .bufsize = 0, /* use wMaxPacketSize */ 251 .callback = aue_intr_callback, 252 }, 253 }; 254 255 static device_method_t aue_methods[] = { 256 /* Device interface */ 257 DEVMETHOD(device_probe, aue_probe), 258 DEVMETHOD(device_attach, aue_attach), 259 DEVMETHOD(device_detach, aue_detach), 260 261 /* MII interface */ 262 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 263 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 264 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 265 266 DEVMETHOD_END 267 }; 268 269 static driver_t aue_driver = { 270 .name = "aue", 271 .methods = aue_methods, 272 .size = sizeof(struct aue_softc) 273 }; 274 275 static devclass_t aue_devclass; 276 277 DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0); 278 DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0); 279 MODULE_DEPEND(aue, uether, 1, 1, 1); 280 MODULE_DEPEND(aue, usb, 1, 1, 1); 281 MODULE_DEPEND(aue, ether, 1, 1, 1); 282 MODULE_DEPEND(aue, miibus, 1, 1, 1); 283 MODULE_VERSION(aue, 1); 284 USB_PNP_HOST_INFO(aue_devs); 285 286 static const struct usb_ether_methods aue_ue_methods = { 287 .ue_attach_post = aue_attach_post, 288 .ue_start = aue_start, 289 .ue_init = aue_init, 290 .ue_stop = aue_stop, 291 .ue_tick = aue_tick, 292 .ue_setmulti = aue_setmulti, 293 .ue_setpromisc = aue_setpromisc, 294 .ue_mii_upd = aue_ifmedia_upd, 295 .ue_mii_sts = aue_ifmedia_sts, 296 }; 297 298 #define AUE_SETBIT(sc, reg, x) \ 299 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 300 301 #define AUE_CLRBIT(sc, reg, x) \ 302 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 303 304 static uint8_t 305 aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 306 { 307 struct usb_device_request req; 308 usb_error_t err; 309 uint8_t val; 310 311 req.bmRequestType = UT_READ_VENDOR_DEVICE; 312 req.bRequest = AUE_UR_READREG; 313 USETW(req.wValue, 0); 314 USETW(req.wIndex, reg); 315 USETW(req.wLength, 1); 316 317 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 318 if (err) 319 return (0); 320 return (val); 321 } 322 323 static uint16_t 324 aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 325 { 326 struct usb_device_request req; 327 usb_error_t err; 328 uint16_t val; 329 330 req.bmRequestType = UT_READ_VENDOR_DEVICE; 331 req.bRequest = AUE_UR_READREG; 332 USETW(req.wValue, 0); 333 USETW(req.wIndex, reg); 334 USETW(req.wLength, 2); 335 336 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 337 if (err) 338 return (0); 339 return (le16toh(val)); 340 } 341 342 static void 343 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 344 { 345 struct usb_device_request req; 346 347 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 348 req.bRequest = AUE_UR_WRITEREG; 349 req.wValue[0] = val; 350 req.wValue[1] = 0; 351 USETW(req.wIndex, reg); 352 USETW(req.wLength, 1); 353 354 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 355 /* error ignored */ 356 } 357 } 358 359 static void 360 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 361 { 362 struct usb_device_request req; 363 364 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 365 req.bRequest = AUE_UR_WRITEREG; 366 USETW(req.wValue, val); 367 USETW(req.wIndex, reg); 368 USETW(req.wLength, 2); 369 370 val = htole16(val); 371 372 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 373 /* error ignored */ 374 } 375 } 376 377 /* 378 * Read a word of data stored in the EEPROM at address 'addr.' 379 */ 380 static uint16_t 381 aue_eeprom_getword(struct aue_softc *sc, int addr) 382 { 383 int i; 384 385 aue_csr_write_1(sc, AUE_EE_REG, addr); 386 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 387 388 for (i = 0; i != AUE_TIMEOUT; i++) { 389 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 390 break; 391 if (uether_pause(&sc->sc_ue, hz / 100)) 392 break; 393 } 394 395 if (i == AUE_TIMEOUT) 396 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 397 398 return (aue_csr_read_2(sc, AUE_EE_DATA)); 399 } 400 401 /* 402 * Read station address(offset 0) from the EEPROM. 403 */ 404 static void 405 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr) 406 { 407 int i, offset; 408 uint16_t word; 409 410 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) { 411 word = aue_eeprom_getword(sc, offset + i); 412 eaddr[i * 2] = (uint8_t)word; 413 eaddr[i * 2 + 1] = (uint8_t)(word >> 8); 414 } 415 } 416 417 static int 418 aue_miibus_readreg(device_t dev, int phy, int reg) 419 { 420 struct aue_softc *sc = device_get_softc(dev); 421 int i, locked; 422 uint16_t val = 0; 423 424 locked = mtx_owned(&sc->sc_mtx); 425 if (!locked) 426 AUE_LOCK(sc); 427 428 /* 429 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 430 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 431 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 432 * actually connected to anything, so we ignore the 10Mbps one. It 433 * happens to be configured for MII address 3, so we filter that out. 434 */ 435 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 436 if (phy == 3) 437 goto done; 438 #if 0 439 if (phy != 1) 440 goto done; 441 #endif 442 } 443 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 444 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 445 446 for (i = 0; i != AUE_TIMEOUT; i++) { 447 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 448 break; 449 if (uether_pause(&sc->sc_ue, hz / 100)) 450 break; 451 } 452 453 if (i == AUE_TIMEOUT) 454 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 455 456 val = aue_csr_read_2(sc, AUE_PHY_DATA); 457 458 done: 459 if (!locked) 460 AUE_UNLOCK(sc); 461 return (val); 462 } 463 464 static int 465 aue_miibus_writereg(device_t dev, int phy, int reg, int data) 466 { 467 struct aue_softc *sc = device_get_softc(dev); 468 int i; 469 int locked; 470 471 if (phy == 3) 472 return (0); 473 474 locked = mtx_owned(&sc->sc_mtx); 475 if (!locked) 476 AUE_LOCK(sc); 477 478 aue_csr_write_2(sc, AUE_PHY_DATA, data); 479 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 480 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 481 482 for (i = 0; i != AUE_TIMEOUT; i++) { 483 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 484 break; 485 if (uether_pause(&sc->sc_ue, hz / 100)) 486 break; 487 } 488 489 if (i == AUE_TIMEOUT) 490 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 491 492 if (!locked) 493 AUE_UNLOCK(sc); 494 return (0); 495 } 496 497 static void 498 aue_miibus_statchg(device_t dev) 499 { 500 struct aue_softc *sc = device_get_softc(dev); 501 struct mii_data *mii = GET_MII(sc); 502 int locked; 503 504 locked = mtx_owned(&sc->sc_mtx); 505 if (!locked) 506 AUE_LOCK(sc); 507 508 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 509 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 510 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 511 else 512 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 513 514 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 515 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 516 else 517 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 518 519 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 520 521 /* 522 * Set the LED modes on the LinkSys adapter. 523 * This turns on the 'dual link LED' bin in the auxmode 524 * register of the Broadcom PHY. 525 */ 526 if (sc->sc_flags & AUE_FLAG_LSYS) { 527 uint16_t auxmode; 528 529 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 530 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 531 } 532 if (!locked) 533 AUE_UNLOCK(sc); 534 } 535 536 #define AUE_BITS 6 537 static void 538 aue_setmulti(struct usb_ether *ue) 539 { 540 struct aue_softc *sc = uether_getsc(ue); 541 struct ifnet *ifp = uether_getifp(ue); 542 struct ifmultiaddr *ifma; 543 uint32_t h = 0; 544 uint32_t i; 545 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 546 547 AUE_LOCK_ASSERT(sc, MA_OWNED); 548 549 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 550 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 551 return; 552 } 553 554 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 555 556 /* now program new ones */ 557 if_maddr_rlock(ifp); 558 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 559 if (ifma->ifma_addr->sa_family != AF_LINK) 560 continue; 561 h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 562 ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 563 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 564 } 565 if_maddr_runlock(ifp); 566 567 /* write the hashtable */ 568 for (i = 0; i != 8; i++) 569 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 570 } 571 572 static void 573 aue_reset_pegasus_II(struct aue_softc *sc) 574 { 575 /* Magic constants taken from Linux driver. */ 576 aue_csr_write_1(sc, AUE_REG_1D, 0); 577 aue_csr_write_1(sc, AUE_REG_7B, 2); 578 #if 0 579 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 580 aue_csr_write_1(sc, AUE_REG_81, 6); 581 else 582 #endif 583 aue_csr_write_1(sc, AUE_REG_81, 2); 584 } 585 586 static void 587 aue_reset(struct aue_softc *sc) 588 { 589 int i; 590 591 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 592 593 for (i = 0; i != AUE_TIMEOUT; i++) { 594 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 595 break; 596 if (uether_pause(&sc->sc_ue, hz / 100)) 597 break; 598 } 599 600 if (i == AUE_TIMEOUT) 601 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 602 603 /* 604 * The PHY(s) attached to the Pegasus chip may be held 605 * in reset until we flip on the GPIO outputs. Make sure 606 * to set the GPIO pins high so that the PHY(s) will 607 * be enabled. 608 * 609 * NOTE: We used to force all of the GPIO pins low first and then 610 * enable the ones we want. This has been changed to better 611 * match the ADMtek's reference design to avoid setting the 612 * power-down configuration line of the PHY at the same time 613 * it is reset. 614 */ 615 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 616 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 617 618 if (sc->sc_flags & AUE_FLAG_LSYS) { 619 /* Grrr. LinkSys has to be different from everyone else. */ 620 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 621 aue_csr_write_1(sc, AUE_GPIO0, 622 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 623 } 624 if (sc->sc_flags & AUE_FLAG_PII) 625 aue_reset_pegasus_II(sc); 626 627 /* Wait a little while for the chip to get its brains in order: */ 628 uether_pause(&sc->sc_ue, hz / 100); 629 } 630 631 static void 632 aue_attach_post(struct usb_ether *ue) 633 { 634 struct aue_softc *sc = uether_getsc(ue); 635 636 /* reset the adapter */ 637 aue_reset(sc); 638 639 /* get station address from the EEPROM */ 640 aue_read_mac(sc, ue->ue_eaddr); 641 } 642 643 /* 644 * Probe for a Pegasus chip. 645 */ 646 static int 647 aue_probe(device_t dev) 648 { 649 struct usb_attach_arg *uaa = device_get_ivars(dev); 650 651 if (uaa->usb_mode != USB_MODE_HOST) 652 return (ENXIO); 653 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 654 return (ENXIO); 655 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 656 return (ENXIO); 657 /* 658 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 659 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 660 * the devices that look like Bluetooth adapters. 661 */ 662 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 663 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 664 uaa->info.bcdDevice == 0x0413) 665 return (ENXIO); 666 667 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 668 } 669 670 /* 671 * Attach the interface. Allocate softc structures, do ifmedia 672 * setup and ethernet/BPF attach. 673 */ 674 static int 675 aue_attach(device_t dev) 676 { 677 struct usb_attach_arg *uaa = device_get_ivars(dev); 678 struct aue_softc *sc = device_get_softc(dev); 679 struct usb_ether *ue = &sc->sc_ue; 680 uint8_t iface_index; 681 int error; 682 683 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 684 685 if (uaa->info.bcdDevice >= 0x0201) { 686 /* XXX currently undocumented */ 687 sc->sc_flags |= AUE_FLAG_VER_2; 688 } 689 690 device_set_usb_desc(dev); 691 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 692 693 iface_index = AUE_IFACE_IDX; 694 error = usbd_transfer_setup(uaa->device, &iface_index, 695 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 696 sc, &sc->sc_mtx); 697 if (error) { 698 device_printf(dev, "allocating USB transfers failed\n"); 699 goto detach; 700 } 701 702 ue->ue_sc = sc; 703 ue->ue_dev = dev; 704 ue->ue_udev = uaa->device; 705 ue->ue_mtx = &sc->sc_mtx; 706 ue->ue_methods = &aue_ue_methods; 707 708 error = uether_ifattach(ue); 709 if (error) { 710 device_printf(dev, "could not attach interface\n"); 711 goto detach; 712 } 713 return (0); /* success */ 714 715 detach: 716 aue_detach(dev); 717 return (ENXIO); /* failure */ 718 } 719 720 static int 721 aue_detach(device_t dev) 722 { 723 struct aue_softc *sc = device_get_softc(dev); 724 struct usb_ether *ue = &sc->sc_ue; 725 726 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 727 uether_ifdetach(ue); 728 mtx_destroy(&sc->sc_mtx); 729 730 return (0); 731 } 732 733 static void 734 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 735 { 736 struct aue_softc *sc = usbd_xfer_softc(xfer); 737 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 738 struct aue_intrpkt pkt; 739 struct usb_page_cache *pc; 740 int actlen; 741 742 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 743 744 switch (USB_GET_STATE(xfer)) { 745 case USB_ST_TRANSFERRED: 746 747 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 748 actlen >= (int)sizeof(pkt)) { 749 750 pc = usbd_xfer_get_frame(xfer, 0); 751 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 752 753 if (pkt.aue_txstat0) 754 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 755 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL | 756 AUE_TXSTAT0_EXCESSCOLL)) 757 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 758 } 759 /* FALLTHROUGH */ 760 case USB_ST_SETUP: 761 tr_setup: 762 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 763 usbd_transfer_submit(xfer); 764 return; 765 766 default: /* Error */ 767 if (error != USB_ERR_CANCELLED) { 768 /* try to clear stall first */ 769 usbd_xfer_set_stall(xfer); 770 goto tr_setup; 771 } 772 return; 773 } 774 } 775 776 static void 777 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 778 { 779 struct aue_softc *sc = usbd_xfer_softc(xfer); 780 struct usb_ether *ue = &sc->sc_ue; 781 struct ifnet *ifp = uether_getifp(ue); 782 struct aue_rxpkt stat; 783 struct usb_page_cache *pc; 784 int actlen; 785 786 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 787 pc = usbd_xfer_get_frame(xfer, 0); 788 789 switch (USB_GET_STATE(xfer)) { 790 case USB_ST_TRANSFERRED: 791 DPRINTFN(11, "received %d bytes\n", actlen); 792 793 if (sc->sc_flags & AUE_FLAG_VER_2) { 794 795 if (actlen == 0) { 796 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 797 goto tr_setup; 798 } 799 } else { 800 801 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 802 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 803 goto tr_setup; 804 } 805 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 806 sizeof(stat)); 807 808 /* 809 * turn off all the non-error bits in the rx status 810 * word: 811 */ 812 stat.aue_rxstat &= AUE_RXSTAT_MASK; 813 if (stat.aue_rxstat) { 814 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 815 goto tr_setup; 816 } 817 /* No errors; receive the packet. */ 818 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 819 } 820 uether_rxbuf(ue, pc, 0, actlen); 821 822 /* FALLTHROUGH */ 823 case USB_ST_SETUP: 824 tr_setup: 825 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 826 usbd_transfer_submit(xfer); 827 uether_rxflush(ue); 828 return; 829 830 default: /* Error */ 831 DPRINTF("bulk read error, %s\n", 832 usbd_errstr(error)); 833 834 if (error != USB_ERR_CANCELLED) { 835 /* try to clear stall first */ 836 usbd_xfer_set_stall(xfer); 837 goto tr_setup; 838 } 839 return; 840 } 841 } 842 843 static void 844 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 845 { 846 struct aue_softc *sc = usbd_xfer_softc(xfer); 847 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 848 struct usb_page_cache *pc; 849 struct mbuf *m; 850 uint8_t buf[2]; 851 int actlen; 852 853 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 854 pc = usbd_xfer_get_frame(xfer, 0); 855 856 switch (USB_GET_STATE(xfer)) { 857 case USB_ST_TRANSFERRED: 858 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 859 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 860 861 /* FALLTHROUGH */ 862 case USB_ST_SETUP: 863 tr_setup: 864 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 865 /* 866 * don't send anything if there is no link ! 867 */ 868 return; 869 } 870 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 871 872 if (m == NULL) 873 return; 874 if (m->m_pkthdr.len > MCLBYTES) 875 m->m_pkthdr.len = MCLBYTES; 876 if (sc->sc_flags & AUE_FLAG_VER_2) { 877 878 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 879 880 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 881 882 } else { 883 884 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 885 886 /* 887 * The ADMtek documentation says that the 888 * packet length is supposed to be specified 889 * in the first two bytes of the transfer, 890 * however it actually seems to ignore this 891 * info and base the frame size on the bulk 892 * transfer length. 893 */ 894 buf[0] = (uint8_t)(m->m_pkthdr.len); 895 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 896 897 usbd_copy_in(pc, 0, buf, 2); 898 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 899 } 900 901 /* 902 * if there's a BPF listener, bounce a copy 903 * of this frame to him: 904 */ 905 BPF_MTAP(ifp, m); 906 907 m_freem(m); 908 909 usbd_transfer_submit(xfer); 910 return; 911 912 default: /* Error */ 913 DPRINTFN(11, "transfer error, %s\n", 914 usbd_errstr(error)); 915 916 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 917 918 if (error != USB_ERR_CANCELLED) { 919 /* try to clear stall first */ 920 usbd_xfer_set_stall(xfer); 921 goto tr_setup; 922 } 923 return; 924 } 925 } 926 927 static void 928 aue_tick(struct usb_ether *ue) 929 { 930 struct aue_softc *sc = uether_getsc(ue); 931 struct mii_data *mii = GET_MII(sc); 932 933 AUE_LOCK_ASSERT(sc, MA_OWNED); 934 935 mii_tick(mii); 936 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 937 && mii->mii_media_status & IFM_ACTIVE && 938 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 939 sc->sc_flags |= AUE_FLAG_LINK; 940 aue_start(ue); 941 } 942 } 943 944 static void 945 aue_start(struct usb_ether *ue) 946 { 947 struct aue_softc *sc = uether_getsc(ue); 948 949 /* 950 * start the USB transfers, if not already started: 951 */ 952 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 953 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 954 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 955 } 956 957 static void 958 aue_init(struct usb_ether *ue) 959 { 960 struct aue_softc *sc = uether_getsc(ue); 961 struct ifnet *ifp = uether_getifp(ue); 962 int i; 963 964 AUE_LOCK_ASSERT(sc, MA_OWNED); 965 966 /* 967 * Cancel pending I/O 968 */ 969 aue_reset(sc); 970 971 /* Set MAC address */ 972 for (i = 0; i != ETHER_ADDR_LEN; i++) 973 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 974 975 /* update promiscuous setting */ 976 aue_setpromisc(ue); 977 978 /* Load the multicast filter. */ 979 aue_setmulti(ue); 980 981 /* Enable RX and TX */ 982 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 983 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 984 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 985 986 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 987 988 ifp->if_drv_flags |= IFF_DRV_RUNNING; 989 aue_start(ue); 990 } 991 992 static void 993 aue_setpromisc(struct usb_ether *ue) 994 { 995 struct aue_softc *sc = uether_getsc(ue); 996 struct ifnet *ifp = uether_getifp(ue); 997 998 AUE_LOCK_ASSERT(sc, MA_OWNED); 999 1000 /* if we want promiscuous mode, set the allframes bit: */ 1001 if (ifp->if_flags & IFF_PROMISC) 1002 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1003 else 1004 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1005 } 1006 1007 /* 1008 * Set media options. 1009 */ 1010 static int 1011 aue_ifmedia_upd(struct ifnet *ifp) 1012 { 1013 struct aue_softc *sc = ifp->if_softc; 1014 struct mii_data *mii = GET_MII(sc); 1015 struct mii_softc *miisc; 1016 int error; 1017 1018 AUE_LOCK_ASSERT(sc, MA_OWNED); 1019 1020 sc->sc_flags &= ~AUE_FLAG_LINK; 1021 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1022 PHY_RESET(miisc); 1023 error = mii_mediachg(mii); 1024 return (error); 1025 } 1026 1027 /* 1028 * Report current media status. 1029 */ 1030 static void 1031 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1032 { 1033 struct aue_softc *sc = ifp->if_softc; 1034 struct mii_data *mii = GET_MII(sc); 1035 1036 AUE_LOCK(sc); 1037 mii_pollstat(mii); 1038 ifmr->ifm_active = mii->mii_media_active; 1039 ifmr->ifm_status = mii->mii_media_status; 1040 AUE_UNLOCK(sc); 1041 } 1042 1043 /* 1044 * Stop the adapter and free any mbufs allocated to the 1045 * RX and TX lists. 1046 */ 1047 static void 1048 aue_stop(struct usb_ether *ue) 1049 { 1050 struct aue_softc *sc = uether_getsc(ue); 1051 struct ifnet *ifp = uether_getifp(ue); 1052 1053 AUE_LOCK_ASSERT(sc, MA_OWNED); 1054 1055 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1056 sc->sc_flags &= ~AUE_FLAG_LINK; 1057 1058 /* 1059 * stop all the transfers, if not already stopped: 1060 */ 1061 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1062 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1063 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1064 1065 aue_csr_write_1(sc, AUE_CTL0, 0); 1066 aue_csr_write_1(sc, AUE_CTL1, 0); 1067 aue_reset(sc); 1068 } 1069