1 /*- 2 * Copyright (c) 1997, 1998, 1999, 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Copyright (c) 2006 6 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Bill Paul. 19 * 4. Neither the name of the author nor the names of any co-contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 33 * THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 /* 40 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 41 * Datasheet is available from http://www.admtek.com.tw. 42 * 43 * Written by Bill Paul <wpaul@ee.columbia.edu> 44 * Electrical Engineering Department 45 * Columbia University, New York City 46 * 47 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 48 * RED Inc. 49 */ 50 51 /* 52 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 53 * support: the control endpoint for reading/writing registers, burst 54 * read endpoint for packet reception, burst write for packet transmission 55 * and one for "interrupts." The chip uses the same RX filter scheme 56 * as the other ADMtek ethernet parts: one perfect filter entry for the 57 * the station address and a 64-bit multicast hash table. The chip supports 58 * both MII and HomePNA attachments. 59 * 60 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 61 * you're never really going to get 100Mbps speeds from this device. I 62 * think the idea is to allow the device to connect to 10 or 100Mbps 63 * networks, not necessarily to provide 100Mbps performance. Also, since 64 * the controller uses an external PHY chip, it's possible that board 65 * designers might simply choose a 10Mbps PHY. 66 * 67 * Registers are accessed using uether_do_request(). Packet 68 * transfers are done using usbd_transfer() and friends. 69 */ 70 71 #include <sys/stdint.h> 72 #include <sys/stddef.h> 73 #include <sys/param.h> 74 #include <sys/queue.h> 75 #include <sys/types.h> 76 #include <sys/systm.h> 77 #include <sys/socket.h> 78 #include <sys/kernel.h> 79 #include <sys/bus.h> 80 #include <sys/module.h> 81 #include <sys/lock.h> 82 #include <sys/mutex.h> 83 #include <sys/condvar.h> 84 #include <sys/sysctl.h> 85 #include <sys/sx.h> 86 #include <sys/unistd.h> 87 #include <sys/callout.h> 88 #include <sys/malloc.h> 89 #include <sys/priv.h> 90 91 #include <net/if.h> 92 #include <net/if_var.h> 93 94 #include <dev/usb/usb.h> 95 #include <dev/usb/usbdi.h> 96 #include <dev/usb/usbdi_util.h> 97 #include "usbdevs.h" 98 99 #define USB_DEBUG_VAR aue_debug 100 #include <dev/usb/usb_debug.h> 101 #include <dev/usb/usb_process.h> 102 103 #include <dev/usb/net/usb_ethernet.h> 104 #include <dev/usb/net/if_auereg.h> 105 106 #ifdef USB_DEBUG 107 static int aue_debug = 0; 108 109 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW, 0, "USB aue"); 110 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RW, &aue_debug, 0, 111 "Debug level"); 112 #endif 113 114 /* 115 * Various supported device vendors/products. 116 */ 117 static const STRUCT_USB_HOST_ID aue_devs[] = { 118 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 119 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 120 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 121 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 122 AUE_DEV(ABOCOM, XX10, 0), 123 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 124 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 125 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 126 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 127 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 128 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 129 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 130 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 131 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 132 AUE_DEV(ACCTON, USB320_EC, 0), 133 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 134 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 135 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 136 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 137 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 138 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 139 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 140 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 141 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 142 AUE_DEV(BILLIONTON, USB100, 0), 143 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 144 AUE_DEV(BILLIONTON, USBEL100, 0), 145 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 146 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 147 AUE_DEV(COREGA, FETHER_USB_TX, 0), 148 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 149 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 150 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 151 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 152 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 153 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 154 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 155 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 156 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 157 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 158 AUE_DEV(ELECOM, LDUSBTX0, 0), 159 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 160 AUE_DEV(ELECOM, LDUSBTX2, 0), 161 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 162 AUE_DEV(ELSA, USB2ETHERNET, 0), 163 AUE_DEV(GIGABYTE, GNBR402W, 0), 164 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 165 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 166 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 167 AUE_DEV(IODATA, USBETTX, 0), 168 AUE_DEV(KINGSTON, KNU101TX, 0), 169 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 170 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 171 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 172 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 173 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 174 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 175 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 176 AUE_DEV(MELCO, LUATX1, 0), 177 AUE_DEV(MELCO, LUATX5, 0), 178 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 179 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 180 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 181 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 182 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 183 AUE_DEV(SMC, 2202USB, 0), 184 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 185 AUE_DEV(SOHOWARE, NUB100, 0), 186 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 187 #undef AUE_DEV 188 }; 189 190 /* prototypes */ 191 192 static device_probe_t aue_probe; 193 static device_attach_t aue_attach; 194 static device_detach_t aue_detach; 195 static miibus_readreg_t aue_miibus_readreg; 196 static miibus_writereg_t aue_miibus_writereg; 197 static miibus_statchg_t aue_miibus_statchg; 198 199 static usb_callback_t aue_intr_callback; 200 static usb_callback_t aue_bulk_read_callback; 201 static usb_callback_t aue_bulk_write_callback; 202 203 static uether_fn_t aue_attach_post; 204 static uether_fn_t aue_init; 205 static uether_fn_t aue_stop; 206 static uether_fn_t aue_start; 207 static uether_fn_t aue_tick; 208 static uether_fn_t aue_setmulti; 209 static uether_fn_t aue_setpromisc; 210 211 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 212 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 213 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 214 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 215 static uint16_t aue_eeprom_getword(struct aue_softc *, int); 216 static void aue_reset(struct aue_softc *); 217 static void aue_reset_pegasus_II(struct aue_softc *); 218 219 static int aue_ifmedia_upd(struct ifnet *); 220 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 221 222 static const struct usb_config aue_config[AUE_N_TRANSFER] = { 223 224 [AUE_BULK_DT_WR] = { 225 .type = UE_BULK, 226 .endpoint = UE_ADDR_ANY, 227 .direction = UE_DIR_OUT, 228 .bufsize = (MCLBYTES + 2), 229 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 230 .callback = aue_bulk_write_callback, 231 .timeout = 10000, /* 10 seconds */ 232 }, 233 234 [AUE_BULK_DT_RD] = { 235 .type = UE_BULK, 236 .endpoint = UE_ADDR_ANY, 237 .direction = UE_DIR_IN, 238 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 239 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 240 .callback = aue_bulk_read_callback, 241 }, 242 243 [AUE_INTR_DT_RD] = { 244 .type = UE_INTERRUPT, 245 .endpoint = UE_ADDR_ANY, 246 .direction = UE_DIR_IN, 247 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 248 .bufsize = 0, /* use wMaxPacketSize */ 249 .callback = aue_intr_callback, 250 }, 251 }; 252 253 static device_method_t aue_methods[] = { 254 /* Device interface */ 255 DEVMETHOD(device_probe, aue_probe), 256 DEVMETHOD(device_attach, aue_attach), 257 DEVMETHOD(device_detach, aue_detach), 258 259 /* MII interface */ 260 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 261 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 262 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 263 264 DEVMETHOD_END 265 }; 266 267 static driver_t aue_driver = { 268 .name = "aue", 269 .methods = aue_methods, 270 .size = sizeof(struct aue_softc) 271 }; 272 273 static devclass_t aue_devclass; 274 275 DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0); 276 DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0); 277 MODULE_DEPEND(aue, uether, 1, 1, 1); 278 MODULE_DEPEND(aue, usb, 1, 1, 1); 279 MODULE_DEPEND(aue, ether, 1, 1, 1); 280 MODULE_DEPEND(aue, miibus, 1, 1, 1); 281 MODULE_VERSION(aue, 1); 282 283 static const struct usb_ether_methods aue_ue_methods = { 284 .ue_attach_post = aue_attach_post, 285 .ue_start = aue_start, 286 .ue_init = aue_init, 287 .ue_stop = aue_stop, 288 .ue_tick = aue_tick, 289 .ue_setmulti = aue_setmulti, 290 .ue_setpromisc = aue_setpromisc, 291 .ue_mii_upd = aue_ifmedia_upd, 292 .ue_mii_sts = aue_ifmedia_sts, 293 }; 294 295 #define AUE_SETBIT(sc, reg, x) \ 296 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 297 298 #define AUE_CLRBIT(sc, reg, x) \ 299 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 300 301 static uint8_t 302 aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 303 { 304 struct usb_device_request req; 305 usb_error_t err; 306 uint8_t val; 307 308 req.bmRequestType = UT_READ_VENDOR_DEVICE; 309 req.bRequest = AUE_UR_READREG; 310 USETW(req.wValue, 0); 311 USETW(req.wIndex, reg); 312 USETW(req.wLength, 1); 313 314 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 315 if (err) 316 return (0); 317 return (val); 318 } 319 320 static uint16_t 321 aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 322 { 323 struct usb_device_request req; 324 usb_error_t err; 325 uint16_t val; 326 327 req.bmRequestType = UT_READ_VENDOR_DEVICE; 328 req.bRequest = AUE_UR_READREG; 329 USETW(req.wValue, 0); 330 USETW(req.wIndex, reg); 331 USETW(req.wLength, 2); 332 333 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 334 if (err) 335 return (0); 336 return (le16toh(val)); 337 } 338 339 static void 340 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 341 { 342 struct usb_device_request req; 343 344 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 345 req.bRequest = AUE_UR_WRITEREG; 346 req.wValue[0] = val; 347 req.wValue[1] = 0; 348 USETW(req.wIndex, reg); 349 USETW(req.wLength, 1); 350 351 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 352 /* error ignored */ 353 } 354 } 355 356 static void 357 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 358 { 359 struct usb_device_request req; 360 361 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 362 req.bRequest = AUE_UR_WRITEREG; 363 USETW(req.wValue, val); 364 USETW(req.wIndex, reg); 365 USETW(req.wLength, 2); 366 367 val = htole16(val); 368 369 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 370 /* error ignored */ 371 } 372 } 373 374 /* 375 * Read a word of data stored in the EEPROM at address 'addr.' 376 */ 377 static uint16_t 378 aue_eeprom_getword(struct aue_softc *sc, int addr) 379 { 380 int i; 381 382 aue_csr_write_1(sc, AUE_EE_REG, addr); 383 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 384 385 for (i = 0; i != AUE_TIMEOUT; i++) { 386 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 387 break; 388 if (uether_pause(&sc->sc_ue, hz / 100)) 389 break; 390 } 391 392 if (i == AUE_TIMEOUT) 393 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 394 395 return (aue_csr_read_2(sc, AUE_EE_DATA)); 396 } 397 398 /* 399 * Read station address(offset 0) from the EEPROM. 400 */ 401 static void 402 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr) 403 { 404 int i, offset; 405 uint16_t word; 406 407 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) { 408 word = aue_eeprom_getword(sc, offset + i); 409 eaddr[i * 2] = (uint8_t)word; 410 eaddr[i * 2 + 1] = (uint8_t)(word >> 8); 411 } 412 } 413 414 static int 415 aue_miibus_readreg(device_t dev, int phy, int reg) 416 { 417 struct aue_softc *sc = device_get_softc(dev); 418 int i, locked; 419 uint16_t val = 0; 420 421 locked = mtx_owned(&sc->sc_mtx); 422 if (!locked) 423 AUE_LOCK(sc); 424 425 /* 426 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 427 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 428 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 429 * actually connected to anything, so we ignore the 10Mbps one. It 430 * happens to be configured for MII address 3, so we filter that out. 431 */ 432 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 433 if (phy == 3) 434 goto done; 435 #if 0 436 if (phy != 1) 437 goto done; 438 #endif 439 } 440 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 441 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 442 443 for (i = 0; i != AUE_TIMEOUT; i++) { 444 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 445 break; 446 if (uether_pause(&sc->sc_ue, hz / 100)) 447 break; 448 } 449 450 if (i == AUE_TIMEOUT) 451 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 452 453 val = aue_csr_read_2(sc, AUE_PHY_DATA); 454 455 done: 456 if (!locked) 457 AUE_UNLOCK(sc); 458 return (val); 459 } 460 461 static int 462 aue_miibus_writereg(device_t dev, int phy, int reg, int data) 463 { 464 struct aue_softc *sc = device_get_softc(dev); 465 int i; 466 int locked; 467 468 if (phy == 3) 469 return (0); 470 471 locked = mtx_owned(&sc->sc_mtx); 472 if (!locked) 473 AUE_LOCK(sc); 474 475 aue_csr_write_2(sc, AUE_PHY_DATA, data); 476 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 477 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 478 479 for (i = 0; i != AUE_TIMEOUT; i++) { 480 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 481 break; 482 if (uether_pause(&sc->sc_ue, hz / 100)) 483 break; 484 } 485 486 if (i == AUE_TIMEOUT) 487 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 488 489 if (!locked) 490 AUE_UNLOCK(sc); 491 return (0); 492 } 493 494 static void 495 aue_miibus_statchg(device_t dev) 496 { 497 struct aue_softc *sc = device_get_softc(dev); 498 struct mii_data *mii = GET_MII(sc); 499 int locked; 500 501 locked = mtx_owned(&sc->sc_mtx); 502 if (!locked) 503 AUE_LOCK(sc); 504 505 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 506 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 507 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 508 else 509 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 510 511 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 512 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 513 else 514 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 515 516 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 517 518 /* 519 * Set the LED modes on the LinkSys adapter. 520 * This turns on the 'dual link LED' bin in the auxmode 521 * register of the Broadcom PHY. 522 */ 523 if (sc->sc_flags & AUE_FLAG_LSYS) { 524 uint16_t auxmode; 525 526 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 527 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 528 } 529 if (!locked) 530 AUE_UNLOCK(sc); 531 } 532 533 #define AUE_BITS 6 534 static void 535 aue_setmulti(struct usb_ether *ue) 536 { 537 struct aue_softc *sc = uether_getsc(ue); 538 struct ifnet *ifp = uether_getifp(ue); 539 struct ifmultiaddr *ifma; 540 uint32_t h = 0; 541 uint32_t i; 542 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 543 544 AUE_LOCK_ASSERT(sc, MA_OWNED); 545 546 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 547 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 548 return; 549 } 550 551 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 552 553 /* now program new ones */ 554 if_maddr_rlock(ifp); 555 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 556 if (ifma->ifma_addr->sa_family != AF_LINK) 557 continue; 558 h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 559 ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 560 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 561 } 562 if_maddr_runlock(ifp); 563 564 /* write the hashtable */ 565 for (i = 0; i != 8; i++) 566 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 567 } 568 569 static void 570 aue_reset_pegasus_II(struct aue_softc *sc) 571 { 572 /* Magic constants taken from Linux driver. */ 573 aue_csr_write_1(sc, AUE_REG_1D, 0); 574 aue_csr_write_1(sc, AUE_REG_7B, 2); 575 #if 0 576 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 577 aue_csr_write_1(sc, AUE_REG_81, 6); 578 else 579 #endif 580 aue_csr_write_1(sc, AUE_REG_81, 2); 581 } 582 583 static void 584 aue_reset(struct aue_softc *sc) 585 { 586 int i; 587 588 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 589 590 for (i = 0; i != AUE_TIMEOUT; i++) { 591 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 592 break; 593 if (uether_pause(&sc->sc_ue, hz / 100)) 594 break; 595 } 596 597 if (i == AUE_TIMEOUT) 598 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 599 600 /* 601 * The PHY(s) attached to the Pegasus chip may be held 602 * in reset until we flip on the GPIO outputs. Make sure 603 * to set the GPIO pins high so that the PHY(s) will 604 * be enabled. 605 * 606 * NOTE: We used to force all of the GPIO pins low first and then 607 * enable the ones we want. This has been changed to better 608 * match the ADMtek's reference design to avoid setting the 609 * power-down configuration line of the PHY at the same time 610 * it is reset. 611 */ 612 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 613 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 614 615 if (sc->sc_flags & AUE_FLAG_LSYS) { 616 /* Grrr. LinkSys has to be different from everyone else. */ 617 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 618 aue_csr_write_1(sc, AUE_GPIO0, 619 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 620 } 621 if (sc->sc_flags & AUE_FLAG_PII) 622 aue_reset_pegasus_II(sc); 623 624 /* Wait a little while for the chip to get its brains in order: */ 625 uether_pause(&sc->sc_ue, hz / 100); 626 } 627 628 static void 629 aue_attach_post(struct usb_ether *ue) 630 { 631 struct aue_softc *sc = uether_getsc(ue); 632 633 /* reset the adapter */ 634 aue_reset(sc); 635 636 /* get station address from the EEPROM */ 637 aue_read_mac(sc, ue->ue_eaddr); 638 } 639 640 /* 641 * Probe for a Pegasus chip. 642 */ 643 static int 644 aue_probe(device_t dev) 645 { 646 struct usb_attach_arg *uaa = device_get_ivars(dev); 647 648 if (uaa->usb_mode != USB_MODE_HOST) 649 return (ENXIO); 650 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 651 return (ENXIO); 652 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 653 return (ENXIO); 654 /* 655 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 656 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 657 * the devices that look like Bluetooth adapters. 658 */ 659 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 660 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 661 uaa->info.bcdDevice == 0x0413) 662 return (ENXIO); 663 664 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 665 } 666 667 /* 668 * Attach the interface. Allocate softc structures, do ifmedia 669 * setup and ethernet/BPF attach. 670 */ 671 static int 672 aue_attach(device_t dev) 673 { 674 struct usb_attach_arg *uaa = device_get_ivars(dev); 675 struct aue_softc *sc = device_get_softc(dev); 676 struct usb_ether *ue = &sc->sc_ue; 677 uint8_t iface_index; 678 int error; 679 680 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 681 682 if (uaa->info.bcdDevice >= 0x0201) { 683 /* XXX currently undocumented */ 684 sc->sc_flags |= AUE_FLAG_VER_2; 685 } 686 687 device_set_usb_desc(dev); 688 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 689 690 iface_index = AUE_IFACE_IDX; 691 error = usbd_transfer_setup(uaa->device, &iface_index, 692 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 693 sc, &sc->sc_mtx); 694 if (error) { 695 device_printf(dev, "allocating USB transfers failed\n"); 696 goto detach; 697 } 698 699 ue->ue_sc = sc; 700 ue->ue_dev = dev; 701 ue->ue_udev = uaa->device; 702 ue->ue_mtx = &sc->sc_mtx; 703 ue->ue_methods = &aue_ue_methods; 704 705 error = uether_ifattach(ue); 706 if (error) { 707 device_printf(dev, "could not attach interface\n"); 708 goto detach; 709 } 710 return (0); /* success */ 711 712 detach: 713 aue_detach(dev); 714 return (ENXIO); /* failure */ 715 } 716 717 static int 718 aue_detach(device_t dev) 719 { 720 struct aue_softc *sc = device_get_softc(dev); 721 struct usb_ether *ue = &sc->sc_ue; 722 723 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 724 uether_ifdetach(ue); 725 mtx_destroy(&sc->sc_mtx); 726 727 return (0); 728 } 729 730 static void 731 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 732 { 733 struct aue_softc *sc = usbd_xfer_softc(xfer); 734 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 735 struct aue_intrpkt pkt; 736 struct usb_page_cache *pc; 737 int actlen; 738 739 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 740 741 switch (USB_GET_STATE(xfer)) { 742 case USB_ST_TRANSFERRED: 743 744 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 745 actlen >= (int)sizeof(pkt)) { 746 747 pc = usbd_xfer_get_frame(xfer, 0); 748 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 749 750 if (pkt.aue_txstat0) 751 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 752 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL | 753 AUE_TXSTAT0_EXCESSCOLL)) 754 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 755 } 756 /* FALLTHROUGH */ 757 case USB_ST_SETUP: 758 tr_setup: 759 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 760 usbd_transfer_submit(xfer); 761 return; 762 763 default: /* Error */ 764 if (error != USB_ERR_CANCELLED) { 765 /* try to clear stall first */ 766 usbd_xfer_set_stall(xfer); 767 goto tr_setup; 768 } 769 return; 770 } 771 } 772 773 static void 774 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 775 { 776 struct aue_softc *sc = usbd_xfer_softc(xfer); 777 struct usb_ether *ue = &sc->sc_ue; 778 struct ifnet *ifp = uether_getifp(ue); 779 struct aue_rxpkt stat; 780 struct usb_page_cache *pc; 781 int actlen; 782 783 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 784 pc = usbd_xfer_get_frame(xfer, 0); 785 786 switch (USB_GET_STATE(xfer)) { 787 case USB_ST_TRANSFERRED: 788 DPRINTFN(11, "received %d bytes\n", actlen); 789 790 if (sc->sc_flags & AUE_FLAG_VER_2) { 791 792 if (actlen == 0) { 793 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 794 goto tr_setup; 795 } 796 } else { 797 798 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 799 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 800 goto tr_setup; 801 } 802 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 803 sizeof(stat)); 804 805 /* 806 * turn off all the non-error bits in the rx status 807 * word: 808 */ 809 stat.aue_rxstat &= AUE_RXSTAT_MASK; 810 if (stat.aue_rxstat) { 811 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 812 goto tr_setup; 813 } 814 /* No errors; receive the packet. */ 815 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 816 } 817 uether_rxbuf(ue, pc, 0, actlen); 818 819 /* FALLTHROUGH */ 820 case USB_ST_SETUP: 821 tr_setup: 822 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 823 usbd_transfer_submit(xfer); 824 uether_rxflush(ue); 825 return; 826 827 default: /* Error */ 828 DPRINTF("bulk read error, %s\n", 829 usbd_errstr(error)); 830 831 if (error != USB_ERR_CANCELLED) { 832 /* try to clear stall first */ 833 usbd_xfer_set_stall(xfer); 834 goto tr_setup; 835 } 836 return; 837 } 838 } 839 840 static void 841 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 842 { 843 struct aue_softc *sc = usbd_xfer_softc(xfer); 844 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 845 struct usb_page_cache *pc; 846 struct mbuf *m; 847 uint8_t buf[2]; 848 int actlen; 849 850 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 851 pc = usbd_xfer_get_frame(xfer, 0); 852 853 switch (USB_GET_STATE(xfer)) { 854 case USB_ST_TRANSFERRED: 855 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 856 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 857 858 /* FALLTHROUGH */ 859 case USB_ST_SETUP: 860 tr_setup: 861 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 862 /* 863 * don't send anything if there is no link ! 864 */ 865 return; 866 } 867 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 868 869 if (m == NULL) 870 return; 871 if (m->m_pkthdr.len > MCLBYTES) 872 m->m_pkthdr.len = MCLBYTES; 873 if (sc->sc_flags & AUE_FLAG_VER_2) { 874 875 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 876 877 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 878 879 } else { 880 881 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 882 883 /* 884 * The ADMtek documentation says that the 885 * packet length is supposed to be specified 886 * in the first two bytes of the transfer, 887 * however it actually seems to ignore this 888 * info and base the frame size on the bulk 889 * transfer length. 890 */ 891 buf[0] = (uint8_t)(m->m_pkthdr.len); 892 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 893 894 usbd_copy_in(pc, 0, buf, 2); 895 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 896 } 897 898 /* 899 * if there's a BPF listener, bounce a copy 900 * of this frame to him: 901 */ 902 BPF_MTAP(ifp, m); 903 904 m_freem(m); 905 906 usbd_transfer_submit(xfer); 907 return; 908 909 default: /* Error */ 910 DPRINTFN(11, "transfer error, %s\n", 911 usbd_errstr(error)); 912 913 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 914 915 if (error != USB_ERR_CANCELLED) { 916 /* try to clear stall first */ 917 usbd_xfer_set_stall(xfer); 918 goto tr_setup; 919 } 920 return; 921 } 922 } 923 924 static void 925 aue_tick(struct usb_ether *ue) 926 { 927 struct aue_softc *sc = uether_getsc(ue); 928 struct mii_data *mii = GET_MII(sc); 929 930 AUE_LOCK_ASSERT(sc, MA_OWNED); 931 932 mii_tick(mii); 933 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 934 && mii->mii_media_status & IFM_ACTIVE && 935 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 936 sc->sc_flags |= AUE_FLAG_LINK; 937 aue_start(ue); 938 } 939 } 940 941 static void 942 aue_start(struct usb_ether *ue) 943 { 944 struct aue_softc *sc = uether_getsc(ue); 945 946 /* 947 * start the USB transfers, if not already started: 948 */ 949 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 950 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 951 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 952 } 953 954 static void 955 aue_init(struct usb_ether *ue) 956 { 957 struct aue_softc *sc = uether_getsc(ue); 958 struct ifnet *ifp = uether_getifp(ue); 959 int i; 960 961 AUE_LOCK_ASSERT(sc, MA_OWNED); 962 963 /* 964 * Cancel pending I/O 965 */ 966 aue_reset(sc); 967 968 /* Set MAC address */ 969 for (i = 0; i != ETHER_ADDR_LEN; i++) 970 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 971 972 /* update promiscuous setting */ 973 aue_setpromisc(ue); 974 975 /* Load the multicast filter. */ 976 aue_setmulti(ue); 977 978 /* Enable RX and TX */ 979 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 980 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 981 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 982 983 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 984 985 ifp->if_drv_flags |= IFF_DRV_RUNNING; 986 aue_start(ue); 987 } 988 989 static void 990 aue_setpromisc(struct usb_ether *ue) 991 { 992 struct aue_softc *sc = uether_getsc(ue); 993 struct ifnet *ifp = uether_getifp(ue); 994 995 AUE_LOCK_ASSERT(sc, MA_OWNED); 996 997 /* if we want promiscuous mode, set the allframes bit: */ 998 if (ifp->if_flags & IFF_PROMISC) 999 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1000 else 1001 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 1002 } 1003 1004 /* 1005 * Set media options. 1006 */ 1007 static int 1008 aue_ifmedia_upd(struct ifnet *ifp) 1009 { 1010 struct aue_softc *sc = ifp->if_softc; 1011 struct mii_data *mii = GET_MII(sc); 1012 struct mii_softc *miisc; 1013 int error; 1014 1015 AUE_LOCK_ASSERT(sc, MA_OWNED); 1016 1017 sc->sc_flags &= ~AUE_FLAG_LINK; 1018 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1019 PHY_RESET(miisc); 1020 error = mii_mediachg(mii); 1021 return (error); 1022 } 1023 1024 /* 1025 * Report current media status. 1026 */ 1027 static void 1028 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1029 { 1030 struct aue_softc *sc = ifp->if_softc; 1031 struct mii_data *mii = GET_MII(sc); 1032 1033 AUE_LOCK(sc); 1034 mii_pollstat(mii); 1035 ifmr->ifm_active = mii->mii_media_active; 1036 ifmr->ifm_status = mii->mii_media_status; 1037 AUE_UNLOCK(sc); 1038 } 1039 1040 /* 1041 * Stop the adapter and free any mbufs allocated to the 1042 * RX and TX lists. 1043 */ 1044 static void 1045 aue_stop(struct usb_ether *ue) 1046 { 1047 struct aue_softc *sc = uether_getsc(ue); 1048 struct ifnet *ifp = uether_getifp(ue); 1049 1050 AUE_LOCK_ASSERT(sc, MA_OWNED); 1051 1052 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1053 sc->sc_flags &= ~AUE_FLAG_LINK; 1054 1055 /* 1056 * stop all the transfers, if not already stopped: 1057 */ 1058 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1059 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1060 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1061 1062 aue_csr_write_1(sc, AUE_CTL0, 0); 1063 aue_csr_write_1(sc, AUE_CTL1, 0); 1064 aue_reset(sc); 1065 } 1066