1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_attach_t xhci_pci_attach; 67 static device_detach_t xhci_pci_detach; 68 static usb_take_controller_t xhci_pci_take_controller; 69 70 static device_method_t xhci_device_methods[] = { 71 /* device interface */ 72 DEVMETHOD(device_probe, xhci_pci_probe), 73 DEVMETHOD(device_attach, xhci_pci_attach), 74 DEVMETHOD(device_detach, xhci_pci_detach), 75 DEVMETHOD(device_suspend, bus_generic_suspend), 76 DEVMETHOD(device_resume, bus_generic_resume), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t xhci_driver = { 84 .name = "xhci", 85 .methods = xhci_device_methods, 86 .size = sizeof(struct xhci_softc), 87 }; 88 89 static devclass_t xhci_devclass; 90 91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 92 MODULE_DEPEND(xhci, usb, 1, 1, 1); 93 94 static const char * 95 xhci_pci_match(device_t self) 96 { 97 uint32_t device_id = pci_get_devid(self); 98 99 switch (device_id) { 100 case 0x145c1022: 101 return ("AMD KERNCZ USB 3.0 controller"); 102 case 0x43bb1022: 103 return ("AMD 300 Series USB 3.0 controller"); 104 case 0x78141022: 105 return ("AMD FCH USB 3.0 controller"); 106 107 case 0x01941033: 108 return ("NEC uPD720200 USB 3.0 controller"); 109 case 0x00151912: 110 return ("NEC uPD720202 USB 3.0 controller"); 111 112 case 0x10001b73: 113 return ("Fresco Logic FL1000G USB 3.0 controller"); 114 115 case 0x10421b21: 116 return ("ASMedia ASM1042 USB 3.0 controller"); 117 case 0x11421b21: 118 return ("ASMedia ASM1042A USB 3.0 controller"); 119 120 case 0x0f358086: 121 return ("Intel BayTrail USB 3.0 controller"); 122 case 0x19d08086: 123 return ("Intel Denverton USB 3.0 controller"); 124 case 0x9c318086: 125 case 0x1e318086: 126 return ("Intel Panther Point USB 3.0 controller"); 127 case 0x22b58086: 128 return ("Intel Braswell USB 3.0 controller"); 129 case 0x5aa88086: 130 return ("Intel Apollo Lake USB 3.0 controller"); 131 case 0x8c318086: 132 return ("Intel Lynx Point USB 3.0 controller"); 133 case 0x8cb18086: 134 return ("Intel Wildcat Point USB 3.0 controller"); 135 case 0x8d318086: 136 return ("Intel Wellsburg USB 3.0 controller"); 137 case 0x9cb18086: 138 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 139 case 0x9d2f8086: 140 return ("Intel Sunrise Point-LP USB 3.0 controller"); 141 case 0xa12f8086: 142 return ("Intel Sunrise Point USB 3.0 controller"); 143 case 0xa1af8086: 144 return ("Intel Lewisburg USB 3.0 controller"); 145 case 0xa2af8086: 146 return ("Intel Union Point USB 3.0 controller"); 147 148 case 0xa01b177d: 149 return ("Cavium ThunderX USB 3.0 controller"); 150 151 default: 152 break; 153 } 154 155 if ((pci_get_class(self) == PCIC_SERIALBUS) 156 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 157 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 158 return ("XHCI (generic) USB 3.0 controller"); 159 } 160 return (NULL); /* dunno */ 161 } 162 163 static int 164 xhci_pci_probe(device_t self) 165 { 166 const char *desc = xhci_pci_match(self); 167 168 if (desc) { 169 device_set_desc(self, desc); 170 return (BUS_PROBE_DEFAULT); 171 } else { 172 return (ENXIO); 173 } 174 } 175 176 static int xhci_use_msi = 1; 177 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 178 static int xhci_use_msix = 1; 179 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 180 181 static void 182 xhci_interrupt_poll(void *_sc) 183 { 184 struct xhci_softc *sc = _sc; 185 USB_BUS_UNLOCK(&sc->sc_bus); 186 xhci_interrupt(sc); 187 USB_BUS_LOCK(&sc->sc_bus); 188 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 189 } 190 191 static int 192 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 193 { 194 uint32_t temp; 195 uint32_t usb3_mask; 196 uint32_t usb2_mask; 197 198 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 199 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 200 201 temp |= set; 202 temp &= ~clear; 203 204 /* Don't set bits which the hardware doesn't support */ 205 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 206 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 207 208 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 209 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 210 211 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 212 213 return (0); 214 } 215 216 static int 217 xhci_pci_attach(device_t self) 218 { 219 struct xhci_softc *sc = device_get_softc(self); 220 int count, err, msix_table, rid; 221 uint8_t usemsi = 1; 222 uint8_t usedma32 = 0; 223 224 rid = PCI_XHCI_CBMEM; 225 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 226 RF_ACTIVE); 227 if (!sc->sc_io_res) { 228 device_printf(self, "Could not map memory\n"); 229 return (ENOMEM); 230 } 231 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 232 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 233 sc->sc_io_size = rman_get_size(sc->sc_io_res); 234 235 switch (pci_get_devid(self)) { 236 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 237 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 238 /* Don't use 64-bit DMA on these controllers. */ 239 usedma32 = 1; 240 break; 241 case 0x10001b73: /* FL1000G */ 242 /* Fresco Logic host doesn't support MSI. */ 243 usemsi = 0; 244 break; 245 case 0x0f358086: /* BayTrail */ 246 case 0x9c318086: /* Panther Point */ 247 case 0x1e318086: /* Panther Point */ 248 case 0x8c318086: /* Lynx Point */ 249 case 0x8cb18086: /* Wildcat Point */ 250 case 0x9cb18086: /* Broadwell Mobile Integrated */ 251 /* 252 * On Intel chipsets, reroute ports from EHCI to XHCI 253 * controller and use a different IMOD value. 254 */ 255 sc->sc_port_route = &xhci_pci_port_route; 256 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 257 break; 258 } 259 260 if (xhci_init(sc, self, usedma32)) { 261 device_printf(self, "Could not initialize softc\n"); 262 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 263 sc->sc_io_res); 264 return (ENXIO); 265 } 266 267 pci_enable_busmaster(self); 268 269 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 270 271 rid = 0; 272 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 273 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 274 &msix_table, RF_ACTIVE); 275 if (sc->sc_msix_res == NULL) { 276 /* May not be enabled */ 277 device_printf(self, 278 "Unable to map MSI-X table \n"); 279 } else { 280 count = 1; 281 if (pci_alloc_msix(self, &count) == 0) { 282 if (bootverbose) 283 device_printf(self, "MSI-X enabled\n"); 284 rid = 1; 285 } else { 286 bus_release_resource(self, SYS_RES_MEMORY, 287 msix_table, sc->sc_msix_res); 288 sc->sc_msix_res = NULL; 289 } 290 } 291 } 292 if (rid == 0 && xhci_use_msi && usemsi) { 293 count = 1; 294 if (pci_alloc_msi(self, &count) == 0) { 295 if (bootverbose) 296 device_printf(self, "MSI enabled\n"); 297 rid = 1; 298 } 299 } 300 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 301 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 302 if (sc->sc_irq_res == NULL) { 303 pci_release_msi(self); 304 device_printf(self, "Could not allocate IRQ\n"); 305 /* goto error; FALLTHROUGH - use polling */ 306 } 307 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 308 if (sc->sc_bus.bdev == NULL) { 309 device_printf(self, "Could not add USB device\n"); 310 goto error; 311 } 312 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 313 314 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 315 316 if (sc->sc_irq_res != NULL) { 317 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 318 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 319 if (err != 0) { 320 bus_release_resource(self, SYS_RES_IRQ, 321 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 322 sc->sc_irq_res = NULL; 323 pci_release_msi(self); 324 device_printf(self, "Could not setup IRQ, err=%d\n", err); 325 sc->sc_intr_hdl = NULL; 326 } 327 } 328 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 329 if (xhci_use_polling() != 0) { 330 device_printf(self, "Interrupt polling at %dHz\n", hz); 331 USB_BUS_LOCK(&sc->sc_bus); 332 xhci_interrupt_poll(sc); 333 USB_BUS_UNLOCK(&sc->sc_bus); 334 } else 335 goto error; 336 } 337 338 xhci_pci_take_controller(self); 339 340 err = xhci_halt_controller(sc); 341 342 if (err == 0) 343 err = xhci_start_controller(sc); 344 345 if (err == 0) 346 err = device_probe_and_attach(sc->sc_bus.bdev); 347 348 if (err) { 349 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 350 goto error; 351 } 352 return (0); 353 354 error: 355 xhci_pci_detach(self); 356 return (ENXIO); 357 } 358 359 static int 360 xhci_pci_detach(device_t self) 361 { 362 struct xhci_softc *sc = device_get_softc(self); 363 364 /* during module unload there are lots of children leftover */ 365 device_delete_children(self); 366 367 usb_callout_drain(&sc->sc_callout); 368 xhci_halt_controller(sc); 369 xhci_reset_controller(sc); 370 371 pci_disable_busmaster(self); 372 373 if (sc->sc_irq_res && sc->sc_intr_hdl) { 374 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 375 sc->sc_intr_hdl = NULL; 376 } 377 if (sc->sc_irq_res) { 378 bus_release_resource(self, SYS_RES_IRQ, 379 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 380 sc->sc_irq_res = NULL; 381 pci_release_msi(self); 382 } 383 if (sc->sc_io_res) { 384 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 385 sc->sc_io_res); 386 sc->sc_io_res = NULL; 387 } 388 if (sc->sc_msix_res) { 389 bus_release_resource(self, SYS_RES_MEMORY, 390 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 391 sc->sc_msix_res = NULL; 392 } 393 394 xhci_uninit(sc); 395 396 return (0); 397 } 398 399 static int 400 xhci_pci_take_controller(device_t self) 401 { 402 struct xhci_softc *sc = device_get_softc(self); 403 uint32_t cparams; 404 uint32_t eecp; 405 uint32_t eec; 406 uint16_t to; 407 uint8_t bios_sem; 408 409 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 410 411 eec = -1; 412 413 /* Synchronise with the BIOS if it owns the controller. */ 414 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 415 eecp += XHCI_XECP_NEXT(eec) << 2) { 416 eec = XREAD4(sc, capa, eecp); 417 418 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 419 continue; 420 bios_sem = XREAD1(sc, capa, eecp + 421 XHCI_XECP_BIOS_SEM); 422 if (bios_sem == 0) 423 continue; 424 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 425 "to give up control\n"); 426 XWRITE1(sc, capa, eecp + 427 XHCI_XECP_OS_SEM, 1); 428 to = 500; 429 while (1) { 430 bios_sem = XREAD1(sc, capa, eecp + 431 XHCI_XECP_BIOS_SEM); 432 if (bios_sem == 0) 433 break; 434 435 if (--to == 0) { 436 device_printf(sc->sc_bus.bdev, 437 "timed out waiting for BIOS\n"); 438 break; 439 } 440 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 441 } 442 } 443 return (0); 444 } 445