1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_attach_t xhci_pci_attach; 67 static device_detach_t xhci_pci_detach; 68 static usb_take_controller_t xhci_pci_take_controller; 69 70 static device_method_t xhci_device_methods[] = { 71 /* device interface */ 72 DEVMETHOD(device_probe, xhci_pci_probe), 73 DEVMETHOD(device_attach, xhci_pci_attach), 74 DEVMETHOD(device_detach, xhci_pci_detach), 75 DEVMETHOD(device_suspend, bus_generic_suspend), 76 DEVMETHOD(device_resume, bus_generic_resume), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t xhci_driver = { 84 .name = "xhci", 85 .methods = xhci_device_methods, 86 .size = sizeof(struct xhci_softc), 87 }; 88 89 static devclass_t xhci_devclass; 90 91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 92 MODULE_DEPEND(xhci, usb, 1, 1, 1); 93 94 static const char * 95 xhci_pci_match(device_t self) 96 { 97 uint32_t device_id = pci_get_devid(self); 98 99 switch (device_id) { 100 case 0x145c1022: 101 return ("AMD KERNCZ USB 3.0 controller"); 102 case 0x43ba1022: 103 return ("AMD X399 USB 3.0 controller"); 104 case 0x43bb1022: 105 return ("AMD 300 Series USB 3.0 controller"); 106 case 0x78141022: 107 return ("AMD FCH USB 3.0 controller"); 108 109 case 0x01941033: 110 return ("NEC uPD720200 USB 3.0 controller"); 111 case 0x00151912: 112 return ("NEC uPD720202 USB 3.0 controller"); 113 114 case 0x10001b73: 115 return ("Fresco Logic FL1000G USB 3.0 controller"); 116 case 0x11001b73: 117 return ("Fresco Logic FL1100 USB 3.0 controller"); 118 119 case 0x10421b21: 120 return ("ASMedia ASM1042 USB 3.0 controller"); 121 case 0x11421b21: 122 return ("ASMedia ASM1042A USB 3.0 controller"); 123 124 case 0x0f358086: 125 return ("Intel BayTrail USB 3.0 controller"); 126 case 0x19d08086: 127 return ("Intel Denverton USB 3.0 controller"); 128 case 0x9c318086: 129 case 0x1e318086: 130 return ("Intel Panther Point USB 3.0 controller"); 131 case 0x22b58086: 132 return ("Intel Braswell USB 3.0 controller"); 133 case 0x5aa88086: 134 return ("Intel Apollo Lake USB 3.0 controller"); 135 case 0x8c318086: 136 return ("Intel Lynx Point USB 3.0 controller"); 137 case 0x8cb18086: 138 return ("Intel Wildcat Point USB 3.0 controller"); 139 case 0x8d318086: 140 return ("Intel Wellsburg USB 3.0 controller"); 141 case 0x9cb18086: 142 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 143 case 0x9d2f8086: 144 return ("Intel Sunrise Point-LP USB 3.0 controller"); 145 case 0xa12f8086: 146 return ("Intel Sunrise Point USB 3.0 controller"); 147 case 0xa1af8086: 148 return ("Intel Lewisburg USB 3.0 controller"); 149 case 0xa2af8086: 150 return ("Intel Union Point USB 3.0 controller"); 151 152 case 0xa01b177d: 153 return ("Cavium ThunderX USB 3.0 controller"); 154 155 default: 156 break; 157 } 158 159 if ((pci_get_class(self) == PCIC_SERIALBUS) 160 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 161 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 162 return ("XHCI (generic) USB 3.0 controller"); 163 } 164 return (NULL); /* dunno */ 165 } 166 167 static int 168 xhci_pci_probe(device_t self) 169 { 170 const char *desc = xhci_pci_match(self); 171 172 if (desc) { 173 device_set_desc(self, desc); 174 return (BUS_PROBE_DEFAULT); 175 } else { 176 return (ENXIO); 177 } 178 } 179 180 static int xhci_use_msi = 1; 181 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 182 static int xhci_use_msix = 1; 183 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 184 185 static void 186 xhci_interrupt_poll(void *_sc) 187 { 188 struct xhci_softc *sc = _sc; 189 USB_BUS_UNLOCK(&sc->sc_bus); 190 xhci_interrupt(sc); 191 USB_BUS_LOCK(&sc->sc_bus); 192 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 193 } 194 195 static int 196 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 197 { 198 uint32_t temp; 199 uint32_t usb3_mask; 200 uint32_t usb2_mask; 201 202 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 203 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 204 205 temp |= set; 206 temp &= ~clear; 207 208 /* Don't set bits which the hardware doesn't support */ 209 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 210 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 211 212 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 213 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 214 215 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 216 217 return (0); 218 } 219 220 static int 221 xhci_pci_attach(device_t self) 222 { 223 struct xhci_softc *sc = device_get_softc(self); 224 int count, err, msix_table, rid; 225 uint8_t usemsi = 1; 226 uint8_t usedma32 = 0; 227 228 rid = PCI_XHCI_CBMEM; 229 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 230 RF_ACTIVE); 231 if (!sc->sc_io_res) { 232 device_printf(self, "Could not map memory\n"); 233 return (ENOMEM); 234 } 235 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 236 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 237 sc->sc_io_size = rman_get_size(sc->sc_io_res); 238 239 switch (pci_get_devid(self)) { 240 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 241 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 242 /* Don't use 64-bit DMA on these controllers. */ 243 usedma32 = 1; 244 break; 245 case 0x10001b73: /* FL1000G */ 246 /* Fresco Logic host doesn't support MSI. */ 247 usemsi = 0; 248 break; 249 case 0x0f358086: /* BayTrail */ 250 case 0x9c318086: /* Panther Point */ 251 case 0x1e318086: /* Panther Point */ 252 case 0x8c318086: /* Lynx Point */ 253 case 0x8cb18086: /* Wildcat Point */ 254 case 0x9cb18086: /* Broadwell Mobile Integrated */ 255 /* 256 * On Intel chipsets, reroute ports from EHCI to XHCI 257 * controller and use a different IMOD value. 258 */ 259 sc->sc_port_route = &xhci_pci_port_route; 260 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 261 sc->sc_ctlstep = 1; 262 break; 263 } 264 265 if (xhci_init(sc, self, usedma32)) { 266 device_printf(self, "Could not initialize softc\n"); 267 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 268 sc->sc_io_res); 269 return (ENXIO); 270 } 271 272 pci_enable_busmaster(self); 273 274 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 275 276 rid = 0; 277 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 278 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 279 &msix_table, RF_ACTIVE); 280 if (sc->sc_msix_res == NULL) { 281 /* May not be enabled */ 282 device_printf(self, 283 "Unable to map MSI-X table \n"); 284 } else { 285 count = 1; 286 if (pci_alloc_msix(self, &count) == 0) { 287 if (bootverbose) 288 device_printf(self, "MSI-X enabled\n"); 289 rid = 1; 290 } else { 291 bus_release_resource(self, SYS_RES_MEMORY, 292 msix_table, sc->sc_msix_res); 293 sc->sc_msix_res = NULL; 294 } 295 } 296 } 297 if (rid == 0 && xhci_use_msi && usemsi) { 298 count = 1; 299 if (pci_alloc_msi(self, &count) == 0) { 300 if (bootverbose) 301 device_printf(self, "MSI enabled\n"); 302 rid = 1; 303 } 304 } 305 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 306 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 307 if (sc->sc_irq_res == NULL) { 308 pci_release_msi(self); 309 device_printf(self, "Could not allocate IRQ\n"); 310 /* goto error; FALLTHROUGH - use polling */ 311 } 312 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 313 if (sc->sc_bus.bdev == NULL) { 314 device_printf(self, "Could not add USB device\n"); 315 goto error; 316 } 317 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 318 319 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 320 321 if (sc->sc_irq_res != NULL) { 322 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 323 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 324 if (err != 0) { 325 bus_release_resource(self, SYS_RES_IRQ, 326 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 327 sc->sc_irq_res = NULL; 328 pci_release_msi(self); 329 device_printf(self, "Could not setup IRQ, err=%d\n", err); 330 sc->sc_intr_hdl = NULL; 331 } 332 } 333 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 334 if (xhci_use_polling() != 0) { 335 device_printf(self, "Interrupt polling at %dHz\n", hz); 336 USB_BUS_LOCK(&sc->sc_bus); 337 xhci_interrupt_poll(sc); 338 USB_BUS_UNLOCK(&sc->sc_bus); 339 } else 340 goto error; 341 } 342 343 xhci_pci_take_controller(self); 344 345 err = xhci_halt_controller(sc); 346 347 if (err == 0) 348 err = xhci_start_controller(sc); 349 350 if (err == 0) 351 err = device_probe_and_attach(sc->sc_bus.bdev); 352 353 if (err) { 354 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 355 goto error; 356 } 357 return (0); 358 359 error: 360 xhci_pci_detach(self); 361 return (ENXIO); 362 } 363 364 static int 365 xhci_pci_detach(device_t self) 366 { 367 struct xhci_softc *sc = device_get_softc(self); 368 369 /* during module unload there are lots of children leftover */ 370 device_delete_children(self); 371 372 usb_callout_drain(&sc->sc_callout); 373 xhci_halt_controller(sc); 374 xhci_reset_controller(sc); 375 376 pci_disable_busmaster(self); 377 378 if (sc->sc_irq_res && sc->sc_intr_hdl) { 379 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 380 sc->sc_intr_hdl = NULL; 381 } 382 if (sc->sc_irq_res) { 383 bus_release_resource(self, SYS_RES_IRQ, 384 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 385 sc->sc_irq_res = NULL; 386 pci_release_msi(self); 387 } 388 if (sc->sc_io_res) { 389 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 390 sc->sc_io_res); 391 sc->sc_io_res = NULL; 392 } 393 if (sc->sc_msix_res) { 394 bus_release_resource(self, SYS_RES_MEMORY, 395 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 396 sc->sc_msix_res = NULL; 397 } 398 399 xhci_uninit(sc); 400 401 return (0); 402 } 403 404 static int 405 xhci_pci_take_controller(device_t self) 406 { 407 struct xhci_softc *sc = device_get_softc(self); 408 uint32_t cparams; 409 uint32_t eecp; 410 uint32_t eec; 411 uint16_t to; 412 uint8_t bios_sem; 413 414 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 415 416 eec = -1; 417 418 /* Synchronise with the BIOS if it owns the controller. */ 419 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 420 eecp += XHCI_XECP_NEXT(eec) << 2) { 421 eec = XREAD4(sc, capa, eecp); 422 423 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 424 continue; 425 bios_sem = XREAD1(sc, capa, eecp + 426 XHCI_XECP_BIOS_SEM); 427 if (bios_sem == 0) 428 continue; 429 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 430 "to give up control\n"); 431 XWRITE1(sc, capa, eecp + 432 XHCI_XECP_OS_SEM, 1); 433 to = 500; 434 while (1) { 435 bios_sem = XREAD1(sc, capa, eecp + 436 XHCI_XECP_BIOS_SEM); 437 if (bios_sem == 0) 438 break; 439 440 if (--to == 0) { 441 device_printf(sc->sc_bus.bdev, 442 "timed out waiting for BIOS\n"); 443 break; 444 } 445 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 446 } 447 } 448 return (0); 449 } 450