1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 static const char * 93 xhci_pci_match(device_t self) 94 { 95 uint32_t device_id = pci_get_devid(self); 96 97 switch (device_id) { 98 case 0x78141022: 99 return ("AMD FCH USB 3.0 controller"); 100 101 case 0x01941033: 102 return ("NEC uPD720200 USB 3.0 controller"); 103 case 0x00151912: 104 return ("NEC uPD720202 USB 3.0 controller"); 105 106 case 0x10001b73: 107 return ("Fresco Logic FL1000G USB 3.0 controller"); 108 109 case 0x10421b21: 110 return ("ASMedia ASM1042 USB 3.0 controller"); 111 case 0x11421b21: 112 return ("ASMedia ASM1042A USB 3.0 controller"); 113 114 case 0x0f358086: 115 return ("Intel BayTrail USB 3.0 controller"); 116 case 0x19d08086: 117 return ("Intel Denverton USB 3.0 controller"); 118 case 0x9c318086: 119 case 0x1e318086: 120 return ("Intel Panther Point USB 3.0 controller"); 121 case 0x22b58086: 122 return ("Intel Braswell USB 3.0 controller"); 123 case 0x5aa88086: 124 return ("Intel Apollo Lake USB 3.0 controller"); 125 case 0x8c318086: 126 return ("Intel Lynx Point USB 3.0 controller"); 127 case 0x8cb18086: 128 return ("Intel Wildcat Point USB 3.0 controller"); 129 case 0x8d318086: 130 return ("Intel Wellsburg USB 3.0 controller"); 131 case 0x9cb18086: 132 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 133 case 0x9d2f8086: 134 return ("Intel Sunrise Point-LP USB 3.0 controller"); 135 case 0xa12f8086: 136 return ("Intel Sunrise Point USB 3.0 controller"); 137 138 case 0xa01b177d: 139 return ("Cavium ThunderX USB 3.0 controller"); 140 141 default: 142 break; 143 } 144 145 if ((pci_get_class(self) == PCIC_SERIALBUS) 146 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 147 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 148 return ("XHCI (generic) USB 3.0 controller"); 149 } 150 return (NULL); /* dunno */ 151 } 152 153 static int 154 xhci_pci_probe(device_t self) 155 { 156 const char *desc = xhci_pci_match(self); 157 158 if (desc) { 159 device_set_desc(self, desc); 160 return (BUS_PROBE_DEFAULT); 161 } else { 162 return (ENXIO); 163 } 164 } 165 166 static int xhci_use_msi = 1; 167 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 168 static int xhci_use_msix = 1; 169 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 170 171 static void 172 xhci_interrupt_poll(void *_sc) 173 { 174 struct xhci_softc *sc = _sc; 175 USB_BUS_UNLOCK(&sc->sc_bus); 176 xhci_interrupt(sc); 177 USB_BUS_LOCK(&sc->sc_bus); 178 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 179 } 180 181 static int 182 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 183 { 184 uint32_t temp; 185 uint32_t usb3_mask; 186 uint32_t usb2_mask; 187 188 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 189 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 190 191 temp |= set; 192 temp &= ~clear; 193 194 /* Don't set bits which the hardware doesn't support */ 195 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 196 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 197 198 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 199 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 200 201 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 202 203 return (0); 204 } 205 206 static int 207 xhci_pci_attach(device_t self) 208 { 209 struct xhci_softc *sc = device_get_softc(self); 210 int count, err, msix_table, rid; 211 uint8_t usemsi = 1; 212 uint8_t usedma32 = 0; 213 214 rid = PCI_XHCI_CBMEM; 215 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 216 RF_ACTIVE); 217 if (!sc->sc_io_res) { 218 device_printf(self, "Could not map memory\n"); 219 return (ENOMEM); 220 } 221 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 222 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 223 sc->sc_io_size = rman_get_size(sc->sc_io_res); 224 225 switch (pci_get_devid(self)) { 226 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 227 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 228 /* Don't use 64-bit DMA on these controllers. */ 229 usedma32 = 1; 230 break; 231 case 0x10001b73: /* FL1000G */ 232 /* Fresco Logic host doesn't support MSI. */ 233 usemsi = 0; 234 break; 235 case 0x0f358086: /* BayTrail */ 236 case 0x9c318086: /* Panther Point */ 237 case 0x1e318086: /* Panther Point */ 238 case 0x8c318086: /* Lynx Point */ 239 case 0x8cb18086: /* Wildcat Point */ 240 case 0x9cb18086: /* Broadwell Mobile Integrated */ 241 /* 242 * On Intel chipsets, reroute ports from EHCI to XHCI 243 * controller and use a different IMOD value. 244 */ 245 sc->sc_port_route = &xhci_pci_port_route; 246 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 247 break; 248 } 249 250 if (xhci_init(sc, self, usedma32)) { 251 device_printf(self, "Could not initialize softc\n"); 252 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 253 sc->sc_io_res); 254 return (ENXIO); 255 } 256 257 pci_enable_busmaster(self); 258 259 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 260 261 rid = 0; 262 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 263 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 264 &msix_table, RF_ACTIVE); 265 if (sc->sc_msix_res == NULL) { 266 /* May not be enabled */ 267 device_printf(self, 268 "Unable to map MSI-X table \n"); 269 } else { 270 count = 1; 271 if (pci_alloc_msix(self, &count) == 0) { 272 if (bootverbose) 273 device_printf(self, "MSI-X enabled\n"); 274 rid = 1; 275 } else { 276 bus_release_resource(self, SYS_RES_MEMORY, 277 msix_table, sc->sc_msix_res); 278 sc->sc_msix_res = NULL; 279 } 280 } 281 } 282 if (rid == 0 && xhci_use_msi && usemsi) { 283 count = 1; 284 if (pci_alloc_msi(self, &count) == 0) { 285 if (bootverbose) 286 device_printf(self, "MSI enabled\n"); 287 rid = 1; 288 } 289 } 290 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 291 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 292 if (sc->sc_irq_res == NULL) { 293 pci_release_msi(self); 294 device_printf(self, "Could not allocate IRQ\n"); 295 /* goto error; FALLTHROUGH - use polling */ 296 } 297 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 298 if (sc->sc_bus.bdev == NULL) { 299 device_printf(self, "Could not add USB device\n"); 300 goto error; 301 } 302 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 303 304 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 305 306 if (sc->sc_irq_res != NULL) { 307 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 308 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 309 if (err != 0) { 310 bus_release_resource(self, SYS_RES_IRQ, 311 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 312 sc->sc_irq_res = NULL; 313 pci_release_msi(self); 314 device_printf(self, "Could not setup IRQ, err=%d\n", err); 315 sc->sc_intr_hdl = NULL; 316 } 317 } 318 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 319 if (xhci_use_polling() != 0) { 320 device_printf(self, "Interrupt polling at %dHz\n", hz); 321 USB_BUS_LOCK(&sc->sc_bus); 322 xhci_interrupt_poll(sc); 323 USB_BUS_UNLOCK(&sc->sc_bus); 324 } else 325 goto error; 326 } 327 328 xhci_pci_take_controller(self); 329 330 err = xhci_halt_controller(sc); 331 332 if (err == 0) 333 err = xhci_start_controller(sc); 334 335 if (err == 0) 336 err = device_probe_and_attach(sc->sc_bus.bdev); 337 338 if (err) { 339 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 340 goto error; 341 } 342 return (0); 343 344 error: 345 xhci_pci_detach(self); 346 return (ENXIO); 347 } 348 349 static int 350 xhci_pci_detach(device_t self) 351 { 352 struct xhci_softc *sc = device_get_softc(self); 353 354 /* during module unload there are lots of children leftover */ 355 device_delete_children(self); 356 357 usb_callout_drain(&sc->sc_callout); 358 xhci_halt_controller(sc); 359 xhci_reset_controller(sc); 360 361 pci_disable_busmaster(self); 362 363 if (sc->sc_irq_res && sc->sc_intr_hdl) { 364 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 365 sc->sc_intr_hdl = NULL; 366 } 367 if (sc->sc_irq_res) { 368 bus_release_resource(self, SYS_RES_IRQ, 369 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 370 sc->sc_irq_res = NULL; 371 pci_release_msi(self); 372 } 373 if (sc->sc_io_res) { 374 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 375 sc->sc_io_res); 376 sc->sc_io_res = NULL; 377 } 378 if (sc->sc_msix_res) { 379 bus_release_resource(self, SYS_RES_MEMORY, 380 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 381 sc->sc_msix_res = NULL; 382 } 383 384 xhci_uninit(sc); 385 386 return (0); 387 } 388 389 static int 390 xhci_pci_take_controller(device_t self) 391 { 392 struct xhci_softc *sc = device_get_softc(self); 393 uint32_t cparams; 394 uint32_t eecp; 395 uint32_t eec; 396 uint16_t to; 397 uint8_t bios_sem; 398 399 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 400 401 eec = -1; 402 403 /* Synchronise with the BIOS if it owns the controller. */ 404 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 405 eecp += XHCI_XECP_NEXT(eec) << 2) { 406 eec = XREAD4(sc, capa, eecp); 407 408 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 409 continue; 410 bios_sem = XREAD1(sc, capa, eecp + 411 XHCI_XECP_BIOS_SEM); 412 if (bios_sem == 0) 413 continue; 414 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 415 "to give up control\n"); 416 XWRITE1(sc, capa, eecp + 417 XHCI_XECP_OS_SEM, 1); 418 to = 500; 419 while (1) { 420 bios_sem = XREAD1(sc, capa, eecp + 421 XHCI_XECP_BIOS_SEM); 422 if (bios_sem == 0) 423 break; 424 425 if (--to == 0) { 426 device_printf(sc->sc_bus.bdev, 427 "timed out waiting for BIOS\n"); 428 break; 429 } 430 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 431 } 432 } 433 return (0); 434 } 435