1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 static const char * 93 xhci_pci_match(device_t self) 94 { 95 uint32_t device_id = pci_get_devid(self); 96 97 switch (device_id) { 98 case 0x78141022: 99 return ("AMD FCH USB 3.0 controller"); 100 101 case 0x01941033: 102 return ("NEC uPD720200 USB 3.0 controller"); 103 case 0x00151912: 104 return ("NEC uPD720202 USB 3.0 controller"); 105 106 case 0x10001b73: 107 return ("Fresco Logic FL1000G USB 3.0 controller"); 108 109 case 0x10421b21: 110 return ("ASMedia ASM1042 USB 3.0 controller"); 111 case 0x11421b21: 112 return ("ASMedia ASM1042A USB 3.0 controller"); 113 114 case 0x0f358086: 115 return ("Intel BayTrail USB 3.0 controller"); 116 case 0x19d08086: 117 return ("Intel Denverton USB 3.0 controller"); 118 case 0x9c318086: 119 case 0x1e318086: 120 return ("Intel Panther Point USB 3.0 controller"); 121 case 0x22b58086: 122 return ("Intel Braswell USB 3.0 controller"); 123 case 0x5aa88086: 124 return ("Intel Apollo Lake USB 3.0 controller"); 125 case 0x8c318086: 126 return ("Intel Lynx Point USB 3.0 controller"); 127 case 0x8cb18086: 128 return ("Intel Wildcat Point USB 3.0 controller"); 129 case 0x8d318086: 130 return ("Intel Wellsburg USB 3.0 controller"); 131 case 0x9cb18086: 132 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 133 case 0x9d2f8086: 134 return ("Intel Sunrise Point-LP USB 3.0 controller"); 135 case 0xa12f8086: 136 return ("Intel Sunrise Point USB 3.0 controller"); 137 case 0xa1af8086: 138 return ("Intel Lewisburg USB 3.0 controller"); 139 case 0xa2af8086: 140 return ("Intel Union Point USB 3.0 controller"); 141 142 case 0xa01b177d: 143 return ("Cavium ThunderX USB 3.0 controller"); 144 145 default: 146 break; 147 } 148 149 if ((pci_get_class(self) == PCIC_SERIALBUS) 150 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 151 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 152 return ("XHCI (generic) USB 3.0 controller"); 153 } 154 return (NULL); /* dunno */ 155 } 156 157 static int 158 xhci_pci_probe(device_t self) 159 { 160 const char *desc = xhci_pci_match(self); 161 162 if (desc) { 163 device_set_desc(self, desc); 164 return (BUS_PROBE_DEFAULT); 165 } else { 166 return (ENXIO); 167 } 168 } 169 170 static int xhci_use_msi = 1; 171 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 172 static int xhci_use_msix = 1; 173 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 174 175 static void 176 xhci_interrupt_poll(void *_sc) 177 { 178 struct xhci_softc *sc = _sc; 179 USB_BUS_UNLOCK(&sc->sc_bus); 180 xhci_interrupt(sc); 181 USB_BUS_LOCK(&sc->sc_bus); 182 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 183 } 184 185 static int 186 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 187 { 188 uint32_t temp; 189 uint32_t usb3_mask; 190 uint32_t usb2_mask; 191 192 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 193 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 194 195 temp |= set; 196 temp &= ~clear; 197 198 /* Don't set bits which the hardware doesn't support */ 199 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 200 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 201 202 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 203 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 204 205 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 206 207 return (0); 208 } 209 210 static int 211 xhci_pci_attach(device_t self) 212 { 213 struct xhci_softc *sc = device_get_softc(self); 214 int count, err, msix_table, rid; 215 uint8_t usemsi = 1; 216 uint8_t usedma32 = 0; 217 218 rid = PCI_XHCI_CBMEM; 219 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 220 RF_ACTIVE); 221 if (!sc->sc_io_res) { 222 device_printf(self, "Could not map memory\n"); 223 return (ENOMEM); 224 } 225 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 226 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 227 sc->sc_io_size = rman_get_size(sc->sc_io_res); 228 229 switch (pci_get_devid(self)) { 230 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 231 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 232 /* Don't use 64-bit DMA on these controllers. */ 233 usedma32 = 1; 234 break; 235 case 0x10001b73: /* FL1000G */ 236 /* Fresco Logic host doesn't support MSI. */ 237 usemsi = 0; 238 break; 239 case 0x0f358086: /* BayTrail */ 240 case 0x9c318086: /* Panther Point */ 241 case 0x1e318086: /* Panther Point */ 242 case 0x8c318086: /* Lynx Point */ 243 case 0x8cb18086: /* Wildcat Point */ 244 case 0x9cb18086: /* Broadwell Mobile Integrated */ 245 /* 246 * On Intel chipsets, reroute ports from EHCI to XHCI 247 * controller and use a different IMOD value. 248 */ 249 sc->sc_port_route = &xhci_pci_port_route; 250 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 251 break; 252 } 253 254 if (xhci_init(sc, self, usedma32)) { 255 device_printf(self, "Could not initialize softc\n"); 256 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 257 sc->sc_io_res); 258 return (ENXIO); 259 } 260 261 pci_enable_busmaster(self); 262 263 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 264 265 rid = 0; 266 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 267 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 268 &msix_table, RF_ACTIVE); 269 if (sc->sc_msix_res == NULL) { 270 /* May not be enabled */ 271 device_printf(self, 272 "Unable to map MSI-X table \n"); 273 } else { 274 count = 1; 275 if (pci_alloc_msix(self, &count) == 0) { 276 if (bootverbose) 277 device_printf(self, "MSI-X enabled\n"); 278 rid = 1; 279 } else { 280 bus_release_resource(self, SYS_RES_MEMORY, 281 msix_table, sc->sc_msix_res); 282 sc->sc_msix_res = NULL; 283 } 284 } 285 } 286 if (rid == 0 && xhci_use_msi && usemsi) { 287 count = 1; 288 if (pci_alloc_msi(self, &count) == 0) { 289 if (bootverbose) 290 device_printf(self, "MSI enabled\n"); 291 rid = 1; 292 } 293 } 294 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 295 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 296 if (sc->sc_irq_res == NULL) { 297 pci_release_msi(self); 298 device_printf(self, "Could not allocate IRQ\n"); 299 /* goto error; FALLTHROUGH - use polling */ 300 } 301 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 302 if (sc->sc_bus.bdev == NULL) { 303 device_printf(self, "Could not add USB device\n"); 304 goto error; 305 } 306 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 307 308 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 309 310 if (sc->sc_irq_res != NULL) { 311 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 312 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 313 if (err != 0) { 314 bus_release_resource(self, SYS_RES_IRQ, 315 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 316 sc->sc_irq_res = NULL; 317 pci_release_msi(self); 318 device_printf(self, "Could not setup IRQ, err=%d\n", err); 319 sc->sc_intr_hdl = NULL; 320 } 321 } 322 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 323 if (xhci_use_polling() != 0) { 324 device_printf(self, "Interrupt polling at %dHz\n", hz); 325 USB_BUS_LOCK(&sc->sc_bus); 326 xhci_interrupt_poll(sc); 327 USB_BUS_UNLOCK(&sc->sc_bus); 328 } else 329 goto error; 330 } 331 332 xhci_pci_take_controller(self); 333 334 err = xhci_halt_controller(sc); 335 336 if (err == 0) 337 err = xhci_start_controller(sc); 338 339 if (err == 0) 340 err = device_probe_and_attach(sc->sc_bus.bdev); 341 342 if (err) { 343 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 344 goto error; 345 } 346 return (0); 347 348 error: 349 xhci_pci_detach(self); 350 return (ENXIO); 351 } 352 353 static int 354 xhci_pci_detach(device_t self) 355 { 356 struct xhci_softc *sc = device_get_softc(self); 357 358 /* during module unload there are lots of children leftover */ 359 device_delete_children(self); 360 361 usb_callout_drain(&sc->sc_callout); 362 xhci_halt_controller(sc); 363 xhci_reset_controller(sc); 364 365 pci_disable_busmaster(self); 366 367 if (sc->sc_irq_res && sc->sc_intr_hdl) { 368 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 369 sc->sc_intr_hdl = NULL; 370 } 371 if (sc->sc_irq_res) { 372 bus_release_resource(self, SYS_RES_IRQ, 373 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 374 sc->sc_irq_res = NULL; 375 pci_release_msi(self); 376 } 377 if (sc->sc_io_res) { 378 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 379 sc->sc_io_res); 380 sc->sc_io_res = NULL; 381 } 382 if (sc->sc_msix_res) { 383 bus_release_resource(self, SYS_RES_MEMORY, 384 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 385 sc->sc_msix_res = NULL; 386 } 387 388 xhci_uninit(sc); 389 390 return (0); 391 } 392 393 static int 394 xhci_pci_take_controller(device_t self) 395 { 396 struct xhci_softc *sc = device_get_softc(self); 397 uint32_t cparams; 398 uint32_t eecp; 399 uint32_t eec; 400 uint16_t to; 401 uint8_t bios_sem; 402 403 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 404 405 eec = -1; 406 407 /* Synchronise with the BIOS if it owns the controller. */ 408 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 409 eecp += XHCI_XECP_NEXT(eec) << 2) { 410 eec = XREAD4(sc, capa, eecp); 411 412 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 413 continue; 414 bios_sem = XREAD1(sc, capa, eecp + 415 XHCI_XECP_BIOS_SEM); 416 if (bios_sem == 0) 417 continue; 418 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 419 "to give up control\n"); 420 XWRITE1(sc, capa, eecp + 421 XHCI_XECP_OS_SEM, 1); 422 to = 500; 423 while (1) { 424 bios_sem = XREAD1(sc, capa, eecp + 425 XHCI_XECP_BIOS_SEM); 426 if (bios_sem == 0) 427 break; 428 429 if (--to == 0) { 430 device_printf(sc->sc_bus.bdev, 431 "timed out waiting for BIOS\n"); 432 break; 433 } 434 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 435 } 436 } 437 return (0); 438 } 439