1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_detach_t xhci_pci_detach; 67 static usb_take_controller_t xhci_pci_take_controller; 68 69 static device_method_t xhci_device_methods[] = { 70 /* device interface */ 71 DEVMETHOD(device_probe, xhci_pci_probe), 72 DEVMETHOD(device_attach, xhci_pci_attach), 73 DEVMETHOD(device_detach, xhci_pci_detach), 74 DEVMETHOD(device_suspend, bus_generic_suspend), 75 DEVMETHOD(device_resume, bus_generic_resume), 76 DEVMETHOD(device_shutdown, bus_generic_shutdown), 77 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 78 79 DEVMETHOD_END 80 }; 81 82 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods, 83 sizeof(struct xhci_softc)); 84 85 static devclass_t xhci_devclass; 86 87 DRIVER_MODULE(xhci, pci, xhci_pci_driver, xhci_devclass, NULL, NULL); 88 MODULE_DEPEND(xhci, usb, 1, 1, 1); 89 90 static const char * 91 xhci_pci_match(device_t self) 92 { 93 uint32_t device_id = pci_get_devid(self); 94 95 switch (device_id) { 96 case 0x145c1022: 97 return ("AMD KERNCZ USB 3.0 controller"); 98 case 0x43ba1022: 99 return ("AMD X399 USB 3.0 controller"); 100 case 0x43b91022: /* X370 */ 101 case 0x43bb1022: /* B350 */ 102 return ("AMD 300 Series USB 3.0 controller"); 103 case 0x78141022: 104 return ("AMD FCH USB 3.0 controller"); 105 106 case 0x145f1d94: 107 return ("Hygon USB 3.0 controller"); 108 109 case 0x01941033: 110 return ("NEC uPD720200 USB 3.0 controller"); 111 case 0x00151912: 112 return ("NEC uPD720202 USB 3.0 controller"); 113 114 case 0x10001b73: 115 return ("Fresco Logic FL1000G USB 3.0 controller"); 116 case 0x11001b73: 117 return ("Fresco Logic FL1100 USB 3.0 controller"); 118 119 case 0x10421b21: 120 return ("ASMedia ASM1042 USB 3.0 controller"); 121 case 0x11421b21: 122 return ("ASMedia ASM1042A USB 3.0 controller"); 123 124 case 0x0f358086: 125 return ("Intel BayTrail USB 3.0 controller"); 126 case 0x19d08086: 127 return ("Intel Denverton USB 3.0 controller"); 128 case 0x9c318086: 129 case 0x1e318086: 130 return ("Intel Panther Point USB 3.0 controller"); 131 case 0x22b58086: 132 return ("Intel Braswell USB 3.0 controller"); 133 case 0x5aa88086: 134 return ("Intel Apollo Lake USB 3.0 controller"); 135 case 0x8c318086: 136 return ("Intel Lynx Point USB 3.0 controller"); 137 case 0x8cb18086: 138 return ("Intel Wildcat Point USB 3.0 controller"); 139 case 0x8d318086: 140 return ("Intel Wellsburg USB 3.0 controller"); 141 case 0x9cb18086: 142 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 143 case 0x9d2f8086: 144 return ("Intel Sunrise Point-LP USB 3.0 controller"); 145 case 0xa12f8086: 146 return ("Intel Sunrise Point USB 3.0 controller"); 147 case 0xa1af8086: 148 return ("Intel Lewisburg USB 3.0 controller"); 149 case 0xa2af8086: 150 return ("Intel Union Point USB 3.0 controller"); 151 case 0xa36d8086: 152 return ("Intel Cannon Lake USB 3.1 controller"); 153 154 case 0xa01b177d: 155 return ("Cavium ThunderX USB 3.0 controller"); 156 157 default: 158 break; 159 } 160 161 if ((pci_get_class(self) == PCIC_SERIALBUS) 162 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 163 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 164 return ("XHCI (generic) USB 3.0 controller"); 165 } 166 return (NULL); /* dunno */ 167 } 168 169 static int 170 xhci_pci_probe(device_t self) 171 { 172 const char *desc = xhci_pci_match(self); 173 174 if (desc) { 175 device_set_desc(self, desc); 176 return (BUS_PROBE_DEFAULT); 177 } else { 178 return (ENXIO); 179 } 180 } 181 182 static int xhci_use_msi = 1; 183 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 184 static int xhci_use_msix = 1; 185 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 186 187 static void 188 xhci_interrupt_poll(void *_sc) 189 { 190 struct xhci_softc *sc = _sc; 191 USB_BUS_UNLOCK(&sc->sc_bus); 192 xhci_interrupt(sc); 193 USB_BUS_LOCK(&sc->sc_bus); 194 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 195 } 196 197 static int 198 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 199 { 200 uint32_t temp; 201 uint32_t usb3_mask; 202 uint32_t usb2_mask; 203 204 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 205 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 206 207 temp |= set; 208 temp &= ~clear; 209 210 /* Don't set bits which the hardware doesn't support */ 211 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 212 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 213 214 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 215 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 216 217 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 218 219 return (0); 220 } 221 222 int 223 xhci_pci_attach(device_t self) 224 { 225 struct xhci_softc *sc = device_get_softc(self); 226 int count, err, msix_table, rid; 227 uint8_t usemsi = 1; 228 uint8_t usedma32 = 0; 229 230 rid = PCI_XHCI_CBMEM; 231 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 232 RF_ACTIVE); 233 if (!sc->sc_io_res) { 234 device_printf(self, "Could not map memory\n"); 235 return (ENOMEM); 236 } 237 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 238 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 239 sc->sc_io_size = rman_get_size(sc->sc_io_res); 240 241 switch (pci_get_devid(self)) { 242 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 243 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 244 /* Don't use 64-bit DMA on these controllers. */ 245 usedma32 = 1; 246 break; 247 case 0x10001b73: /* FL1000G */ 248 /* Fresco Logic host doesn't support MSI. */ 249 usemsi = 0; 250 break; 251 case 0x0f358086: /* BayTrail */ 252 case 0x9c318086: /* Panther Point */ 253 case 0x1e318086: /* Panther Point */ 254 case 0x8c318086: /* Lynx Point */ 255 case 0x8cb18086: /* Wildcat Point */ 256 case 0x9cb18086: /* Broadwell Mobile Integrated */ 257 /* 258 * On Intel chipsets, reroute ports from EHCI to XHCI 259 * controller and use a different IMOD value. 260 */ 261 sc->sc_port_route = &xhci_pci_port_route; 262 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 263 sc->sc_ctlstep = 1; 264 break; 265 } 266 267 if (xhci_init(sc, self, usedma32)) { 268 device_printf(self, "Could not initialize softc\n"); 269 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 270 sc->sc_io_res); 271 return (ENXIO); 272 } 273 274 pci_enable_busmaster(self); 275 276 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 277 278 rid = 0; 279 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 280 if (msix_table == PCI_XHCI_CBMEM) { 281 sc->sc_msix_res = sc->sc_io_res; 282 } else { 283 sc->sc_msix_res = bus_alloc_resource_any(self, 284 SYS_RES_MEMORY, &msix_table, RF_ACTIVE); 285 if (sc->sc_msix_res == NULL) { 286 /* May not be enabled */ 287 device_printf(self, 288 "Unable to map MSI-X table\n"); 289 } 290 } 291 if (sc->sc_msix_res != NULL) { 292 count = 1; 293 if (pci_alloc_msix(self, &count) == 0) { 294 if (bootverbose) 295 device_printf(self, "MSI-X enabled\n"); 296 rid = 1; 297 } else { 298 if (sc->sc_msix_res != sc->sc_io_res) { 299 bus_release_resource(self, 300 SYS_RES_MEMORY, 301 msix_table, sc->sc_msix_res); 302 } 303 sc->sc_msix_res = NULL; 304 } 305 } 306 } 307 if (rid == 0 && xhci_use_msi && usemsi) { 308 count = 1; 309 if (pci_alloc_msi(self, &count) == 0) { 310 if (bootverbose) 311 device_printf(self, "MSI enabled\n"); 312 rid = 1; 313 } 314 } 315 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 316 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 317 if (sc->sc_irq_res == NULL) { 318 pci_release_msi(self); 319 device_printf(self, "Could not allocate IRQ\n"); 320 /* goto error; FALLTHROUGH - use polling */ 321 } 322 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 323 if (sc->sc_bus.bdev == NULL) { 324 device_printf(self, "Could not add USB device\n"); 325 goto error; 326 } 327 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 328 329 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 330 331 if (sc->sc_irq_res != NULL) { 332 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 333 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 334 if (err != 0) { 335 bus_release_resource(self, SYS_RES_IRQ, 336 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 337 sc->sc_irq_res = NULL; 338 pci_release_msi(self); 339 device_printf(self, "Could not setup IRQ, err=%d\n", err); 340 sc->sc_intr_hdl = NULL; 341 } 342 } 343 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 344 if (xhci_use_polling() != 0) { 345 device_printf(self, "Interrupt polling at %dHz\n", hz); 346 USB_BUS_LOCK(&sc->sc_bus); 347 xhci_interrupt_poll(sc); 348 USB_BUS_UNLOCK(&sc->sc_bus); 349 } else 350 goto error; 351 } 352 353 xhci_pci_take_controller(self); 354 355 err = xhci_halt_controller(sc); 356 357 if (err == 0) 358 err = xhci_start_controller(sc); 359 360 if (err == 0) 361 err = device_probe_and_attach(sc->sc_bus.bdev); 362 363 if (err) { 364 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 365 goto error; 366 } 367 return (0); 368 369 error: 370 xhci_pci_detach(self); 371 return (ENXIO); 372 } 373 374 static int 375 xhci_pci_detach(device_t self) 376 { 377 struct xhci_softc *sc = device_get_softc(self); 378 379 /* during module unload there are lots of children leftover */ 380 device_delete_children(self); 381 382 usb_callout_drain(&sc->sc_callout); 383 xhci_halt_controller(sc); 384 xhci_reset_controller(sc); 385 386 pci_disable_busmaster(self); 387 388 if (sc->sc_irq_res && sc->sc_intr_hdl) { 389 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 390 sc->sc_intr_hdl = NULL; 391 } 392 if (sc->sc_irq_res) { 393 bus_release_resource(self, SYS_RES_IRQ, 394 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 395 sc->sc_irq_res = NULL; 396 pci_release_msi(self); 397 } 398 if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) { 399 bus_release_resource(self, SYS_RES_MEMORY, 400 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 401 sc->sc_msix_res = NULL; 402 } 403 if (sc->sc_io_res) { 404 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 405 sc->sc_io_res); 406 sc->sc_io_res = NULL; 407 } 408 409 xhci_uninit(sc); 410 411 return (0); 412 } 413 414 static int 415 xhci_pci_take_controller(device_t self) 416 { 417 struct xhci_softc *sc = device_get_softc(self); 418 uint32_t cparams; 419 uint32_t eecp; 420 uint32_t eec; 421 uint16_t to; 422 uint8_t bios_sem; 423 424 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 425 426 eec = -1; 427 428 /* Synchronise with the BIOS if it owns the controller. */ 429 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 430 eecp += XHCI_XECP_NEXT(eec) << 2) { 431 eec = XREAD4(sc, capa, eecp); 432 433 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 434 continue; 435 bios_sem = XREAD1(sc, capa, eecp + 436 XHCI_XECP_BIOS_SEM); 437 if (bios_sem == 0) 438 continue; 439 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 440 "to give up control\n"); 441 XWRITE1(sc, capa, eecp + 442 XHCI_XECP_OS_SEM, 1); 443 to = 500; 444 while (1) { 445 bios_sem = XREAD1(sc, capa, eecp + 446 XHCI_XECP_BIOS_SEM); 447 if (bios_sem == 0) 448 break; 449 450 if (--to == 0) { 451 device_printf(sc->sc_bus.bdev, 452 "timed out waiting for BIOS\n"); 453 break; 454 } 455 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 456 } 457 } 458 return (0); 459 } 460