1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010-2022 Hans Petter Selasky 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 #define PCI_XHCI_VENDORID_AMD 0x1022 66 #define PCI_XHCI_VENDORID_INTEL 0x8086 67 #define PCI_XHCI_VENDORID_VMWARE 0x15ad 68 #define PCI_XHCI_VENDORID_ZHAOXIN 0x1d17 69 70 static device_probe_t xhci_pci_probe; 71 static device_detach_t xhci_pci_detach; 72 static usb_take_controller_t xhci_pci_take_controller; 73 74 static device_method_t xhci_device_methods[] = { 75 /* device interface */ 76 DEVMETHOD(device_probe, xhci_pci_probe), 77 DEVMETHOD(device_attach, xhci_pci_attach), 78 DEVMETHOD(device_detach, xhci_pci_detach), 79 DEVMETHOD(device_suspend, bus_generic_suspend), 80 DEVMETHOD(device_resume, bus_generic_resume), 81 DEVMETHOD(device_shutdown, bus_generic_shutdown), 82 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 83 84 DEVMETHOD_END 85 }; 86 87 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods, 88 sizeof(struct xhci_softc)); 89 90 DRIVER_MODULE(xhci, pci, xhci_pci_driver, NULL, NULL); 91 MODULE_DEPEND(xhci, usb, 1, 1, 1); 92 93 static const char * 94 xhci_pci_match(device_t self) 95 { 96 uint32_t device_id = pci_get_devid(self); 97 98 switch (device_id) { 99 case 0x145c1022: 100 return ("AMD KERNCZ USB 3.0 controller"); 101 case 0x148c1022: 102 return ("AMD Starship USB 3.0 controller"); 103 case 0x149c1022: 104 return ("AMD Matisse USB 3.0 controller"); 105 case 0x43ba1022: 106 return ("AMD X399 USB 3.0 controller"); 107 case 0x43b91022: /* X370 */ 108 case 0x43bb1022: /* B350 */ 109 return ("AMD 300 Series USB 3.1 controller"); 110 case 0x43d51022: 111 return ("AMD 400 Series USB 3.1 controller"); 112 case 0x78121022: 113 case 0x78141022: 114 case 0x79141022: 115 return ("AMD FCH USB 3.0 controller"); 116 117 case 0x077815ad: 118 case 0x077915ad: 119 return ("VMware USB 3.0 controller"); 120 121 case 0x145f1d94: 122 return ("Hygon USB 3.0 controller"); 123 124 case 0x01941033: 125 return ("NEC uPD720200 USB 3.0 controller"); 126 case 0x00151912: 127 return ("NEC uPD720202 USB 3.0 controller"); 128 129 case 0x10001b73: 130 return ("Fresco Logic FL1000G USB 3.0 controller"); 131 case 0x10091b73: 132 return ("Fresco Logic FL1009 USB 3.0 controller"); 133 case 0x11001b73: 134 return ("Fresco Logic FL1100 USB 3.0 controller"); 135 136 case 0x10421b21: 137 return ("ASMedia ASM1042 USB 3.0 controller"); 138 case 0x11421b21: 139 return ("ASMedia ASM1042A USB 3.0 controller"); 140 case 0x13431b21: 141 return ("ASMedia ASM1143 USB 3.1 controller"); 142 case 0x32421b21: 143 return ("ASMedia ASM3242 USB 3.2 controller"); 144 145 case 0x0b278086: 146 return ("Intel Goshen Ridge Thunderbolt 4 USB controller"); 147 case 0x0f358086: 148 return ("Intel BayTrail USB 3.0 controller"); 149 case 0x11388086: 150 return ("Intel Maple Ridge Thunderbolt 4 USB controller"); 151 case 0x15c18086: 152 case 0x15d48086: 153 case 0x15db8086: 154 return ("Intel Alpine Ridge Thunderbolt 3 USB controller"); 155 case 0x15e98086: 156 case 0x15ec8086: 157 case 0x15f08086: 158 return ("Intel Titan Ridge Thunderbolt 3 USB controller"); 159 case 0x19d08086: 160 return ("Intel Denverton USB 3.0 controller"); 161 case 0x9c318086: 162 case 0x1e318086: 163 return ("Intel Panther Point USB 3.0 controller"); 164 case 0x22b58086: 165 return ("Intel Braswell USB 3.0 controller"); 166 case 0x31a88086: 167 return ("Intel Gemini Lake USB 3.0 controller"); 168 case 0x34ed8086: 169 return ("Intel Ice Lake-LP USB 3.1 controller"); 170 case 0x43ed8086: 171 return ("Intel Tiger Lake-H USB 3.2 controller"); 172 case 0x461e8086: 173 return ("Intel Alder Lake-P Thunderbolt 4 USB controller"); 174 case 0x51ed8086: 175 return ("Intel Alder Lake USB 3.2 controller"); 176 case 0x5aa88086: 177 return ("Intel Apollo Lake USB 3.0 controller"); 178 case 0x7ae08086: 179 return ("Intel Alder Lake USB 3.2 controller"); 180 case 0x8a138086: 181 return ("Intel Ice Lake Thunderbolt 3 USB controller"); 182 case 0x8c318086: 183 return ("Intel Lynx Point USB 3.0 controller"); 184 case 0x8cb18086: 185 return ("Intel Wildcat Point USB 3.0 controller"); 186 case 0x8d318086: 187 return ("Intel Wellsburg USB 3.0 controller"); 188 case 0x9a138086: 189 return ("Intel Tiger Lake-LP Thunderbolt 4 USB controller"); 190 case 0x9a178086: 191 return ("Intel Tiger Lake-H Thunderbolt 4 USB controller"); 192 case 0x9cb18086: 193 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 194 case 0x9d2f8086: 195 return ("Intel Sunrise Point-LP USB 3.0 controller"); 196 case 0xa0ed8086: 197 return ("Intel Tiger Lake-LP USB 3.2 controller"); 198 case 0xa12f8086: 199 return ("Intel Sunrise Point USB 3.0 controller"); 200 case 0xa1af8086: 201 return ("Intel Lewisburg USB 3.0 controller"); 202 case 0xa2af8086: 203 return ("Intel Union Point USB 3.0 controller"); 204 case 0xa36d8086: 205 return ("Intel Cannon Lake USB 3.1 controller"); 206 207 case 0xa01b177d: 208 return ("Cavium ThunderX USB 3.0 controller"); 209 210 case 0x1ada10de: 211 return ("NVIDIA TU106 USB 3.1 controller"); 212 213 case 0x92021d17: 214 return ("Zhaoxin ZX-100 USB 3.0 controller"); 215 case 0x92031d17: 216 return ("Zhaoxin ZX-200 USB 3.0 controller"); 217 case 0x92041d17: 218 return ("Zhaoxin ZX-E USB 3.0 controller"); 219 220 default: 221 break; 222 } 223 224 if ((pci_get_class(self) == PCIC_SERIALBUS) 225 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 226 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 227 return ("XHCI (generic) USB 3.0 controller"); 228 } 229 return (NULL); /* dunno */ 230 } 231 232 static int 233 xhci_pci_probe(device_t self) 234 { 235 const char *desc = xhci_pci_match(self); 236 237 if (desc) { 238 device_set_desc(self, desc); 239 return (BUS_PROBE_DEFAULT); 240 } else { 241 return (ENXIO); 242 } 243 } 244 245 static int xhci_use_msi = 1; 246 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 247 static int xhci_use_msix = 1; 248 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 249 250 static void 251 xhci_interrupt_poll(void *_sc) 252 { 253 struct xhci_softc *sc = _sc; 254 USB_BUS_UNLOCK(&sc->sc_bus); 255 xhci_interrupt(sc); 256 USB_BUS_LOCK(&sc->sc_bus); 257 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 258 } 259 260 static int 261 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 262 { 263 uint32_t temp; 264 uint32_t usb3_mask; 265 uint32_t usb2_mask; 266 267 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 268 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 269 270 temp |= set; 271 temp &= ~clear; 272 273 /* Don't set bits which the hardware doesn't support */ 274 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 275 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 276 277 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 278 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 279 280 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 281 282 return (0); 283 } 284 285 int 286 xhci_pci_attach(device_t self) 287 { 288 struct xhci_softc *sc = device_get_softc(self); 289 int count, err, msix_table, rid; 290 uint8_t usemsi = 1; 291 uint8_t usedma32 = 0; 292 293 rid = PCI_XHCI_CBMEM; 294 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 295 RF_ACTIVE); 296 if (!sc->sc_io_res) { 297 device_printf(self, "Could not map memory\n"); 298 return (ENOMEM); 299 } 300 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 301 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 302 sc->sc_io_size = rman_get_size(sc->sc_io_res); 303 304 switch (pci_get_devid(self)) { 305 case 0x10091b73: /* Fresco Logic FL1009 USB3.0 xHCI Controller */ 306 case 0x8241104c: /* TUSB73x0 USB3.0 xHCI Controller */ 307 sc->sc_no_deconfigure = 1; 308 break; 309 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 310 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 311 /* Don't use 64-bit DMA on these controllers. */ 312 usedma32 = 1; 313 break; 314 case 0x10001b73: /* FL1000G */ 315 /* Fresco Logic host doesn't support MSI. */ 316 usemsi = 0; 317 break; 318 case 0x0f358086: /* BayTrail */ 319 case 0x9c318086: /* Panther Point */ 320 case 0x1e318086: /* Panther Point */ 321 case 0x8c318086: /* Lynx Point */ 322 case 0x8cb18086: /* Wildcat Point */ 323 case 0x9cb18086: /* Broadwell Mobile Integrated */ 324 /* 325 * On Intel chipsets, reroute ports from EHCI to XHCI 326 * controller and use a different IMOD value. 327 */ 328 sc->sc_port_route = &xhci_pci_port_route; 329 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 330 sc->sc_ctlstep = 1; 331 break; 332 default: 333 break; 334 } 335 336 if (xhci_init(sc, self, usedma32)) { 337 device_printf(self, "Could not initialize softc\n"); 338 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 339 sc->sc_io_res); 340 return (ENXIO); 341 } 342 343 pci_enable_busmaster(self); 344 345 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 346 347 rid = 0; 348 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 349 if (msix_table == PCI_XHCI_CBMEM) { 350 sc->sc_msix_res = sc->sc_io_res; 351 } else { 352 sc->sc_msix_res = bus_alloc_resource_any(self, 353 SYS_RES_MEMORY, &msix_table, RF_ACTIVE); 354 if (sc->sc_msix_res == NULL) { 355 /* May not be enabled */ 356 device_printf(self, 357 "Unable to map MSI-X table\n"); 358 } 359 } 360 if (sc->sc_msix_res != NULL) { 361 count = 1; 362 if (pci_alloc_msix(self, &count) == 0) { 363 if (bootverbose) 364 device_printf(self, "MSI-X enabled\n"); 365 rid = 1; 366 } else { 367 if (sc->sc_msix_res != sc->sc_io_res) { 368 bus_release_resource(self, 369 SYS_RES_MEMORY, 370 msix_table, sc->sc_msix_res); 371 } 372 sc->sc_msix_res = NULL; 373 } 374 } 375 } 376 if (rid == 0 && xhci_use_msi && usemsi) { 377 count = 1; 378 if (pci_alloc_msi(self, &count) == 0) { 379 if (bootverbose) 380 device_printf(self, "MSI enabled\n"); 381 rid = 1; 382 } 383 } 384 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 385 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 386 if (sc->sc_irq_res == NULL) { 387 pci_release_msi(self); 388 device_printf(self, "Could not allocate IRQ\n"); 389 /* goto error; FALLTHROUGH - use polling */ 390 } 391 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 392 if (sc->sc_bus.bdev == NULL) { 393 device_printf(self, "Could not add USB device\n"); 394 goto error; 395 } 396 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 397 398 switch (pci_get_vendor(self)) { 399 case PCI_XHCI_VENDORID_AMD: 400 strlcpy(sc->sc_vendor, "AMD", sizeof(sc->sc_vendor)); 401 break; 402 case PCI_XHCI_VENDORID_INTEL: 403 strlcpy(sc->sc_vendor, "Intel", sizeof(sc->sc_vendor)); 404 break; 405 case PCI_XHCI_VENDORID_VMWARE: 406 strlcpy(sc->sc_vendor, "VMware", sizeof(sc->sc_vendor)); 407 break; 408 case PCI_XHCI_VENDORID_ZHAOXIN: 409 strlcpy(sc->sc_vendor, "Zhaoxin", sizeof(sc->sc_vendor)); 410 break; 411 default: 412 if (bootverbose) 413 device_printf(self, "(New XHCI DeviceId=0x%08x)\n", 414 pci_get_devid(self)); 415 snprintf(sc->sc_vendor, sizeof(sc->sc_vendor), 416 "(0x%04x)", pci_get_vendor(self)); 417 break; 418 } 419 420 if (sc->sc_irq_res != NULL && xhci_use_polling() == 0) { 421 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 422 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 423 if (err != 0) { 424 bus_release_resource(self, SYS_RES_IRQ, 425 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 426 sc->sc_irq_res = NULL; 427 pci_release_msi(self); 428 device_printf(self, "Could not setup IRQ, err=%d\n", err); 429 sc->sc_intr_hdl = NULL; 430 } 431 } 432 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 433 if (xhci_use_polling() != 0) { 434 device_printf(self, "Interrupt polling at %dHz\n", hz); 435 USB_BUS_LOCK(&sc->sc_bus); 436 xhci_interrupt_poll(sc); 437 USB_BUS_UNLOCK(&sc->sc_bus); 438 } else 439 goto error; 440 } 441 442 xhci_pci_take_controller(self); 443 444 err = xhci_halt_controller(sc); 445 446 if (err == 0) 447 err = xhci_start_controller(sc); 448 449 if (err == 0) 450 err = device_probe_and_attach(sc->sc_bus.bdev); 451 452 if (err) { 453 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 454 goto error; 455 } 456 return (0); 457 458 error: 459 xhci_pci_detach(self); 460 return (ENXIO); 461 } 462 463 static int 464 xhci_pci_detach(device_t self) 465 { 466 struct xhci_softc *sc = device_get_softc(self); 467 468 /* during module unload there are lots of children leftover */ 469 device_delete_children(self); 470 471 usb_callout_drain(&sc->sc_callout); 472 xhci_halt_controller(sc); 473 xhci_reset_controller(sc); 474 475 pci_disable_busmaster(self); 476 477 if (sc->sc_irq_res && sc->sc_intr_hdl) { 478 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 479 sc->sc_intr_hdl = NULL; 480 } 481 if (sc->sc_irq_res) { 482 bus_release_resource(self, SYS_RES_IRQ, 483 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 484 sc->sc_irq_res = NULL; 485 pci_release_msi(self); 486 } 487 if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) { 488 bus_release_resource(self, SYS_RES_MEMORY, 489 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 490 sc->sc_msix_res = NULL; 491 } 492 if (sc->sc_io_res) { 493 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 494 sc->sc_io_res); 495 sc->sc_io_res = NULL; 496 } 497 498 xhci_uninit(sc); 499 500 return (0); 501 } 502 503 static int 504 xhci_pci_take_controller(device_t self) 505 { 506 struct xhci_softc *sc = device_get_softc(self); 507 uint32_t cparams; 508 uint32_t eecp; 509 uint32_t eec; 510 uint16_t to; 511 uint8_t bios_sem; 512 513 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 514 515 eec = -1; 516 517 /* Synchronise with the BIOS if it owns the controller. */ 518 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 519 eecp += XHCI_XECP_NEXT(eec) << 2) { 520 eec = XREAD4(sc, capa, eecp); 521 522 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 523 continue; 524 bios_sem = XREAD1(sc, capa, eecp + 525 XHCI_XECP_BIOS_SEM); 526 if (bios_sem == 0) 527 continue; 528 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 529 "to give up control\n"); 530 XWRITE1(sc, capa, eecp + 531 XHCI_XECP_OS_SEM, 1); 532 to = 500; 533 while (1) { 534 bios_sem = XREAD1(sc, capa, eecp + 535 XHCI_XECP_BIOS_SEM); 536 if (bios_sem == 0) 537 break; 538 539 if (--to == 0) { 540 device_printf(sc->sc_bus.bdev, 541 "timed out waiting for BIOS\n"); 542 break; 543 } 544 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 545 } 546 } 547 return (0); 548 } 549