1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 93 static const char * 94 xhci_pci_match(device_t self) 95 { 96 uint32_t device_id = pci_get_devid(self); 97 98 switch (device_id) { 99 case 0x01941033: 100 return ("NEC uPD720200 USB 3.0 controller"); 101 102 case 0x10421b21: 103 return ("ASMedia ASM1042 USB 3.0 controller"); 104 105 case 0x1e318086: 106 return ("Intel Panther Point USB 3.0 controller"); 107 case 0x8c318086: 108 return ("Intel Lynx Point USB 3.0 controller"); 109 110 default: 111 break; 112 } 113 114 if ((pci_get_class(self) == PCIC_SERIALBUS) 115 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 116 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 117 return ("XHCI (generic) USB 3.0 controller"); 118 } 119 return (NULL); /* dunno */ 120 } 121 122 static int 123 xhci_pci_probe(device_t self) 124 { 125 const char *desc = xhci_pci_match(self); 126 127 if (desc) { 128 device_set_desc(self, desc); 129 return (0); 130 } else { 131 return (ENXIO); 132 } 133 } 134 135 static int xhci_use_msi = 1; 136 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 137 138 static void 139 xhci_interrupt_poll(void *_sc) 140 { 141 struct xhci_softc *sc = _sc; 142 USB_BUS_UNLOCK(&sc->sc_bus); 143 xhci_interrupt(sc); 144 USB_BUS_LOCK(&sc->sc_bus); 145 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 146 } 147 148 static int 149 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 150 { 151 uint32_t temp; 152 153 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 154 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 155 156 temp |= set; 157 temp &= ~clear; 158 159 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); 160 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); 161 162 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 163 164 return (0); 165 } 166 167 static int 168 xhci_pci_attach(device_t self) 169 { 170 struct xhci_softc *sc = device_get_softc(self); 171 int count, err, rid; 172 173 /* XXX check for 64-bit capability */ 174 175 if (xhci_init(sc, self)) { 176 device_printf(self, "Could not initialize softc\n"); 177 goto error; 178 } 179 180 pci_enable_busmaster(self); 181 182 rid = PCI_XHCI_CBMEM; 183 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 184 RF_ACTIVE); 185 if (!sc->sc_io_res) { 186 device_printf(self, "Could not map memory\n"); 187 goto error; 188 } 189 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 190 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 191 sc->sc_io_size = rman_get_size(sc->sc_io_res); 192 193 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 194 195 sc->sc_irq_rid = 0; 196 if (xhci_use_msi) { 197 count = pci_msi_count(self); 198 if (count >= 1) { 199 count = 1; 200 if (pci_alloc_msi(self, &count) == 0) { 201 if (bootverbose) 202 device_printf(self, "MSI enabled\n"); 203 sc->sc_irq_rid = 1; 204 } 205 } 206 } 207 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, 208 &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE); 209 if (sc->sc_irq_res == NULL) { 210 device_printf(self, "Could not allocate IRQ\n"); 211 /* goto error; FALLTHROUGH - use polling */ 212 } 213 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 214 if (sc->sc_bus.bdev == NULL) { 215 device_printf(self, "Could not add USB device\n"); 216 goto error; 217 } 218 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 219 220 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 221 222 if (sc->sc_irq_res != NULL) { 223 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 224 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 225 if (err != 0) { 226 device_printf(self, "Could not setup IRQ, err=%d\n", err); 227 sc->sc_intr_hdl = NULL; 228 } 229 } 230 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL || 231 xhci_use_polling() != 0) { 232 device_printf(self, "Interrupt polling at %dHz\n", hz); 233 USB_BUS_LOCK(&sc->sc_bus); 234 xhci_interrupt_poll(sc); 235 USB_BUS_UNLOCK(&sc->sc_bus); 236 } 237 238 /* On Intel chipsets reroute ports from EHCI to XHCI controller. */ 239 switch (pci_get_devid(self)) { 240 case 0x1e318086: /* Panther Point */ 241 case 0x8c318086: /* Lynx Point */ 242 sc->sc_port_route = &xhci_pci_port_route; 243 break; 244 default: 245 break; 246 } 247 248 xhci_pci_take_controller(self); 249 250 err = xhci_halt_controller(sc); 251 252 if (err == 0) 253 err = xhci_start_controller(sc); 254 255 if (err == 0) 256 err = device_probe_and_attach(sc->sc_bus.bdev); 257 258 if (err) { 259 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 260 goto error; 261 } 262 return (0); 263 264 error: 265 xhci_pci_detach(self); 266 return (ENXIO); 267 } 268 269 static int 270 xhci_pci_detach(device_t self) 271 { 272 struct xhci_softc *sc = device_get_softc(self); 273 device_t bdev; 274 275 if (sc->sc_bus.bdev != NULL) { 276 bdev = sc->sc_bus.bdev; 277 device_detach(bdev); 278 device_delete_child(self, bdev); 279 } 280 /* during module unload there are lots of children leftover */ 281 device_delete_children(self); 282 283 if (sc->sc_io_res) { 284 usb_callout_drain(&sc->sc_callout); 285 xhci_halt_controller(sc); 286 } 287 288 pci_disable_busmaster(self); 289 290 if (sc->sc_irq_res && sc->sc_intr_hdl) { 291 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 292 sc->sc_intr_hdl = NULL; 293 } 294 if (sc->sc_irq_res) { 295 if (sc->sc_irq_rid == 1) 296 pci_release_msi(self); 297 bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid, 298 sc->sc_irq_res); 299 sc->sc_irq_res = NULL; 300 } 301 if (sc->sc_io_res) { 302 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 303 sc->sc_io_res); 304 sc->sc_io_res = NULL; 305 } 306 307 xhci_uninit(sc); 308 309 return (0); 310 } 311 312 static int 313 xhci_pci_take_controller(device_t self) 314 { 315 struct xhci_softc *sc = device_get_softc(self); 316 uint32_t cparams; 317 uint32_t eecp; 318 uint32_t eec; 319 uint16_t to; 320 uint8_t bios_sem; 321 322 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 323 324 eec = -1; 325 326 /* Synchronise with the BIOS if it owns the controller. */ 327 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 328 eecp += XHCI_XECP_NEXT(eec) << 2) { 329 eec = XREAD4(sc, capa, eecp); 330 331 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 332 continue; 333 bios_sem = XREAD1(sc, capa, eecp + 334 XHCI_XECP_BIOS_SEM); 335 if (bios_sem == 0) 336 continue; 337 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 338 "to give up control\n"); 339 XWRITE1(sc, capa, eecp + 340 XHCI_XECP_OS_SEM, 1); 341 to = 500; 342 while (1) { 343 bios_sem = XREAD1(sc, capa, eecp + 344 XHCI_XECP_BIOS_SEM); 345 if (bios_sem == 0) 346 break; 347 348 if (--to == 0) { 349 device_printf(sc->sc_bus.bdev, 350 "timed out waiting for BIOS\n"); 351 break; 352 } 353 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 354 } 355 } 356 return (0); 357 } 358