1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_attach_t xhci_pci_attach; 67 static device_detach_t xhci_pci_detach; 68 static usb_take_controller_t xhci_pci_take_controller; 69 70 static device_method_t xhci_device_methods[] = { 71 /* device interface */ 72 DEVMETHOD(device_probe, xhci_pci_probe), 73 DEVMETHOD(device_attach, xhci_pci_attach), 74 DEVMETHOD(device_detach, xhci_pci_detach), 75 DEVMETHOD(device_suspend, bus_generic_suspend), 76 DEVMETHOD(device_resume, bus_generic_resume), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t xhci_driver = { 84 .name = "xhci", 85 .methods = xhci_device_methods, 86 .size = sizeof(struct xhci_softc), 87 }; 88 89 static devclass_t xhci_devclass; 90 91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 92 MODULE_DEPEND(xhci, usb, 1, 1, 1); 93 94 static const char * 95 xhci_pci_match(device_t self) 96 { 97 uint32_t device_id = pci_get_devid(self); 98 99 switch (device_id) { 100 case 0x78141022: 101 return ("AMD FCH USB 3.0 controller"); 102 103 case 0x01941033: 104 return ("NEC uPD720200 USB 3.0 controller"); 105 case 0x00151912: 106 return ("NEC uPD720202 USB 3.0 controller"); 107 108 case 0x10001b73: 109 return ("Fresco Logic FL1000G USB 3.0 controller"); 110 111 case 0x10421b21: 112 return ("ASMedia ASM1042 USB 3.0 controller"); 113 case 0x11421b21: 114 return ("ASMedia ASM1042A USB 3.0 controller"); 115 116 case 0x0f358086: 117 return ("Intel BayTrail USB 3.0 controller"); 118 case 0x19d08086: 119 return ("Intel Denverton USB 3.0 controller"); 120 case 0x9c318086: 121 case 0x1e318086: 122 return ("Intel Panther Point USB 3.0 controller"); 123 case 0x22b58086: 124 return ("Intel Braswell USB 3.0 controller"); 125 case 0x5aa88086: 126 return ("Intel Apollo Lake USB 3.0 controller"); 127 case 0x8c318086: 128 return ("Intel Lynx Point USB 3.0 controller"); 129 case 0x8cb18086: 130 return ("Intel Wildcat Point USB 3.0 controller"); 131 case 0x8d318086: 132 return ("Intel Wellsburg USB 3.0 controller"); 133 case 0x9cb18086: 134 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 135 case 0x9d2f8086: 136 return ("Intel Sunrise Point-LP USB 3.0 controller"); 137 case 0xa12f8086: 138 return ("Intel Sunrise Point USB 3.0 controller"); 139 case 0xa1af8086: 140 return ("Intel Lewisburg USB 3.0 controller"); 141 case 0xa2af8086: 142 return ("Intel Union Point USB 3.0 controller"); 143 144 case 0xa01b177d: 145 return ("Cavium ThunderX USB 3.0 controller"); 146 147 default: 148 break; 149 } 150 151 if ((pci_get_class(self) == PCIC_SERIALBUS) 152 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 153 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 154 return ("XHCI (generic) USB 3.0 controller"); 155 } 156 return (NULL); /* dunno */ 157 } 158 159 static int 160 xhci_pci_probe(device_t self) 161 { 162 const char *desc = xhci_pci_match(self); 163 164 if (desc) { 165 device_set_desc(self, desc); 166 return (BUS_PROBE_DEFAULT); 167 } else { 168 return (ENXIO); 169 } 170 } 171 172 static int xhci_use_msi = 1; 173 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 174 static int xhci_use_msix = 1; 175 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 176 177 static void 178 xhci_interrupt_poll(void *_sc) 179 { 180 struct xhci_softc *sc = _sc; 181 USB_BUS_UNLOCK(&sc->sc_bus); 182 xhci_interrupt(sc); 183 USB_BUS_LOCK(&sc->sc_bus); 184 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 185 } 186 187 static int 188 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 189 { 190 uint32_t temp; 191 uint32_t usb3_mask; 192 uint32_t usb2_mask; 193 194 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 195 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 196 197 temp |= set; 198 temp &= ~clear; 199 200 /* Don't set bits which the hardware doesn't support */ 201 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 202 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 203 204 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 205 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 206 207 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 208 209 return (0); 210 } 211 212 static int 213 xhci_pci_attach(device_t self) 214 { 215 struct xhci_softc *sc = device_get_softc(self); 216 int count, err, msix_table, rid; 217 uint8_t usemsi = 1; 218 uint8_t usedma32 = 0; 219 220 rid = PCI_XHCI_CBMEM; 221 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 222 RF_ACTIVE); 223 if (!sc->sc_io_res) { 224 device_printf(self, "Could not map memory\n"); 225 return (ENOMEM); 226 } 227 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 228 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 229 sc->sc_io_size = rman_get_size(sc->sc_io_res); 230 231 switch (pci_get_devid(self)) { 232 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 233 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 234 /* Don't use 64-bit DMA on these controllers. */ 235 usedma32 = 1; 236 break; 237 case 0x10001b73: /* FL1000G */ 238 /* Fresco Logic host doesn't support MSI. */ 239 usemsi = 0; 240 break; 241 case 0x0f358086: /* BayTrail */ 242 case 0x9c318086: /* Panther Point */ 243 case 0x1e318086: /* Panther Point */ 244 case 0x8c318086: /* Lynx Point */ 245 case 0x8cb18086: /* Wildcat Point */ 246 case 0x9cb18086: /* Broadwell Mobile Integrated */ 247 /* 248 * On Intel chipsets, reroute ports from EHCI to XHCI 249 * controller and use a different IMOD value. 250 */ 251 sc->sc_port_route = &xhci_pci_port_route; 252 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 253 break; 254 } 255 256 if (xhci_init(sc, self, usedma32)) { 257 device_printf(self, "Could not initialize softc\n"); 258 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 259 sc->sc_io_res); 260 return (ENXIO); 261 } 262 263 pci_enable_busmaster(self); 264 265 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 266 267 rid = 0; 268 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 269 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 270 &msix_table, RF_ACTIVE); 271 if (sc->sc_msix_res == NULL) { 272 /* May not be enabled */ 273 device_printf(self, 274 "Unable to map MSI-X table \n"); 275 } else { 276 count = 1; 277 if (pci_alloc_msix(self, &count) == 0) { 278 if (bootverbose) 279 device_printf(self, "MSI-X enabled\n"); 280 rid = 1; 281 } else { 282 bus_release_resource(self, SYS_RES_MEMORY, 283 msix_table, sc->sc_msix_res); 284 sc->sc_msix_res = NULL; 285 } 286 } 287 } 288 if (rid == 0 && xhci_use_msi && usemsi) { 289 count = 1; 290 if (pci_alloc_msi(self, &count) == 0) { 291 if (bootverbose) 292 device_printf(self, "MSI enabled\n"); 293 rid = 1; 294 } 295 } 296 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 297 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 298 if (sc->sc_irq_res == NULL) { 299 pci_release_msi(self); 300 device_printf(self, "Could not allocate IRQ\n"); 301 /* goto error; FALLTHROUGH - use polling */ 302 } 303 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 304 if (sc->sc_bus.bdev == NULL) { 305 device_printf(self, "Could not add USB device\n"); 306 goto error; 307 } 308 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 309 310 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 311 312 if (sc->sc_irq_res != NULL) { 313 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 314 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 315 if (err != 0) { 316 bus_release_resource(self, SYS_RES_IRQ, 317 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 318 sc->sc_irq_res = NULL; 319 pci_release_msi(self); 320 device_printf(self, "Could not setup IRQ, err=%d\n", err); 321 sc->sc_intr_hdl = NULL; 322 } 323 } 324 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 325 if (xhci_use_polling() != 0) { 326 device_printf(self, "Interrupt polling at %dHz\n", hz); 327 USB_BUS_LOCK(&sc->sc_bus); 328 xhci_interrupt_poll(sc); 329 USB_BUS_UNLOCK(&sc->sc_bus); 330 } else 331 goto error; 332 } 333 334 xhci_pci_take_controller(self); 335 336 err = xhci_halt_controller(sc); 337 338 if (err == 0) 339 err = xhci_start_controller(sc); 340 341 if (err == 0) 342 err = device_probe_and_attach(sc->sc_bus.bdev); 343 344 if (err) { 345 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 346 goto error; 347 } 348 return (0); 349 350 error: 351 xhci_pci_detach(self); 352 return (ENXIO); 353 } 354 355 static int 356 xhci_pci_detach(device_t self) 357 { 358 struct xhci_softc *sc = device_get_softc(self); 359 360 /* during module unload there are lots of children leftover */ 361 device_delete_children(self); 362 363 usb_callout_drain(&sc->sc_callout); 364 xhci_halt_controller(sc); 365 xhci_reset_controller(sc); 366 367 pci_disable_busmaster(self); 368 369 if (sc->sc_irq_res && sc->sc_intr_hdl) { 370 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 371 sc->sc_intr_hdl = NULL; 372 } 373 if (sc->sc_irq_res) { 374 bus_release_resource(self, SYS_RES_IRQ, 375 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 376 sc->sc_irq_res = NULL; 377 pci_release_msi(self); 378 } 379 if (sc->sc_io_res) { 380 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 381 sc->sc_io_res); 382 sc->sc_io_res = NULL; 383 } 384 if (sc->sc_msix_res) { 385 bus_release_resource(self, SYS_RES_MEMORY, 386 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 387 sc->sc_msix_res = NULL; 388 } 389 390 xhci_uninit(sc); 391 392 return (0); 393 } 394 395 static int 396 xhci_pci_take_controller(device_t self) 397 { 398 struct xhci_softc *sc = device_get_softc(self); 399 uint32_t cparams; 400 uint32_t eecp; 401 uint32_t eec; 402 uint16_t to; 403 uint8_t bios_sem; 404 405 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 406 407 eec = -1; 408 409 /* Synchronise with the BIOS if it owns the controller. */ 410 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 411 eecp += XHCI_XECP_NEXT(eec) << 2) { 412 eec = XREAD4(sc, capa, eecp); 413 414 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 415 continue; 416 bios_sem = XREAD1(sc, capa, eecp + 417 XHCI_XECP_BIOS_SEM); 418 if (bios_sem == 0) 419 continue; 420 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 421 "to give up control\n"); 422 XWRITE1(sc, capa, eecp + 423 XHCI_XECP_OS_SEM, 1); 424 to = 500; 425 while (1) { 426 bios_sem = XREAD1(sc, capa, eecp + 427 XHCI_XECP_BIOS_SEM); 428 if (bios_sem == 0) 429 break; 430 431 if (--to == 0) { 432 device_printf(sc->sc_bus.bdev, 433 "timed out waiting for BIOS\n"); 434 break; 435 } 436 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 437 } 438 } 439 return (0); 440 } 441