xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 924226fba12cc9a228c73b956e1b7fa24c60b055)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2010-2022 Hans Petter Selasky
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/stdint.h>
32 #include <sys/stddef.h>
33 #include <sys/param.h>
34 #include <sys/queue.h>
35 #include <sys/types.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/bus.h>
39 #include <sys/module.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 #include <sys/condvar.h>
43 #include <sys/sysctl.h>
44 #include <sys/sx.h>
45 #include <sys/unistd.h>
46 #include <sys/callout.h>
47 #include <sys/malloc.h>
48 #include <sys/priv.h>
49 
50 #include <dev/usb/usb.h>
51 #include <dev/usb/usbdi.h>
52 
53 #include <dev/usb/usb_core.h>
54 #include <dev/usb/usb_busdma.h>
55 #include <dev/usb/usb_process.h>
56 #include <dev/usb/usb_util.h>
57 
58 #include <dev/usb/usb_controller.h>
59 #include <dev/usb/usb_bus.h>
60 #include <dev/usb/usb_pci.h>
61 #include <dev/usb/controller/xhci.h>
62 #include <dev/usb/controller/xhcireg.h>
63 #include "usb_if.h"
64 
65 #define	PCI_XHCI_VENDORID_AMD		0x1022
66 #define	PCI_XHCI_VENDORID_INTEL		0x8086
67 
68 static device_probe_t xhci_pci_probe;
69 static device_detach_t xhci_pci_detach;
70 static usb_take_controller_t xhci_pci_take_controller;
71 
72 static device_method_t xhci_device_methods[] = {
73 	/* device interface */
74 	DEVMETHOD(device_probe, xhci_pci_probe),
75 	DEVMETHOD(device_attach, xhci_pci_attach),
76 	DEVMETHOD(device_detach, xhci_pci_detach),
77 	DEVMETHOD(device_suspend, bus_generic_suspend),
78 	DEVMETHOD(device_resume, bus_generic_resume),
79 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
80 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
81 
82 	DEVMETHOD_END
83 };
84 
85 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods,
86     sizeof(struct xhci_softc));
87 
88 DRIVER_MODULE(xhci, pci, xhci_pci_driver, NULL, NULL);
89 MODULE_DEPEND(xhci, usb, 1, 1, 1);
90 
91 static const char *
92 xhci_pci_match(device_t self)
93 {
94 	uint32_t device_id = pci_get_devid(self);
95 
96 	switch (device_id) {
97 	case 0x145c1022:
98 		return ("AMD KERNCZ USB 3.0 controller");
99 	case 0x148c1022:
100 		return ("AMD Starship USB 3.0 controller");
101 	case 0x149c1022:
102 		return ("AMD Matisse USB 3.0 controller");
103 	case 0x43ba1022:
104 		return ("AMD X399 USB 3.0 controller");
105 	case 0x43b91022: /* X370 */
106 	case 0x43bb1022: /* B350 */
107 		return ("AMD 300 Series USB 3.0 controller");
108 	case 0x78121022:
109 	case 0x78141022:
110 	case 0x79141022:
111 		return ("AMD FCH USB 3.0 controller");
112 
113 	case 0x145f1d94:
114 		return ("Hygon USB 3.0 controller");
115 
116 	case 0x01941033:
117 		return ("NEC uPD720200 USB 3.0 controller");
118 	case 0x00151912:
119 		return ("NEC uPD720202 USB 3.0 controller");
120 
121 	case 0x10001b73:
122 		return ("Fresco Logic FL1000G USB 3.0 controller");
123 	case 0x11001b73:
124 		return ("Fresco Logic FL1100 USB 3.0 controller");
125 
126 	case 0x10421b21:
127 		return ("ASMedia ASM1042 USB 3.0 controller");
128 	case 0x11421b21:
129 		return ("ASMedia ASM1042A USB 3.0 controller");
130 	case 0x13431b21:
131 		return ("ASMedia ASM1143 USB 3.1 controller");
132 	case 0x32421b21:
133 		return ("ASMedia ASM3242 USB 3.2 controller");
134 
135 	case 0x0b278086:
136 		return ("Intel Goshen Ridge Thunderbolt 4 USB controller");
137 	case 0x0f358086:
138 		return ("Intel BayTrail USB 3.0 controller");
139 	case 0x11388086:
140 		return ("Intel Maple Ridge Thunderbolt 4 USB controller");
141 	case 0x15c18086:
142 	case 0x15d48086:
143 	case 0x15db8086:
144 		return ("Intel Alpine Ridge Thunderbolt 3 USB controller");
145 	case 0x15e98086:
146 	case 0x15ec8086:
147 	case 0x15f08086:
148 		return ("Intel Titan Ridge Thunderbolt 3 USB controller");
149 	case 0x19d08086:
150 		return ("Intel Denverton USB 3.0 controller");
151 	case 0x9c318086:
152 	case 0x1e318086:
153 		return ("Intel Panther Point USB 3.0 controller");
154 	case 0x22b58086:
155 		return ("Intel Braswell USB 3.0 controller");
156 	case 0x31a88086:
157 		return ("Intel Gemini Lake USB 3.0 controller");
158 	case 0x34ed8086:
159 		return ("Intel Ice Lake-LP USB 3.1 controller");
160 	case 0x43ed8086:
161 		return ("Intel Tiger Lake-H USB 3.2 controller");
162 	case 0x461e8086:
163 		return ("Intel Alder Lake-P Thunderbolt 4 USB controller");
164 	case 0x51ed8086:
165 		return ("Intel Alder Lake USB 3.2 controller");
166 	case 0x5aa88086:
167 		return ("Intel Apollo Lake USB 3.0 controller");
168 	case 0x7ae08086:
169 		return ("Intel Alder Lake USB 3.2 controller");
170 	case 0x8a138086:
171 		return ("Intel Ice Lake Thunderbolt 3 USB controller");
172 	case 0x8c318086:
173 		return ("Intel Lynx Point USB 3.0 controller");
174 	case 0x8cb18086:
175 		return ("Intel Wildcat Point USB 3.0 controller");
176 	case 0x8d318086:
177 		return ("Intel Wellsburg USB 3.0 controller");
178 	case 0x9a138086:
179 		return ("Intel Tiger Lake-LP Thunderbolt 4 USB controller");
180 	case 0x9a178086:
181 		return ("Intel Tiger Lake-H Thunderbolt 4 USB controller");
182 	case 0x9cb18086:
183 		return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
184 	case 0x9d2f8086:
185 		return ("Intel Sunrise Point-LP USB 3.0 controller");
186 	case 0xa0ed8086:
187 		return ("Intel Tiger Lake-LP USB 3.2 controller");
188 	case 0xa12f8086:
189 		return ("Intel Sunrise Point USB 3.0 controller");
190 	case 0xa1af8086:
191 		return ("Intel Lewisburg USB 3.0 controller");
192 	case 0xa2af8086:
193 		return ("Intel Union Point USB 3.0 controller");
194 	case 0xa36d8086:
195 		return ("Intel Cannon Lake USB 3.1 controller");
196 
197 	case 0xa01b177d:
198 		return ("Cavium ThunderX USB 3.0 controller");
199 
200 	case 0x1ada10de:
201 		return ("NVIDIA TU106 USB 3.1 controller");
202 
203 	default:
204 		break;
205 	}
206 
207 	if ((pci_get_class(self) == PCIC_SERIALBUS)
208 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
209 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
210 		return ("XHCI (generic) USB 3.0 controller");
211 	}
212 	return (NULL);			/* dunno */
213 }
214 
215 static int
216 xhci_pci_probe(device_t self)
217 {
218 	const char *desc = xhci_pci_match(self);
219 
220 	if (desc) {
221 		device_set_desc(self, desc);
222 		return (BUS_PROBE_DEFAULT);
223 	} else {
224 		return (ENXIO);
225 	}
226 }
227 
228 static int xhci_use_msi = 1;
229 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
230 static int xhci_use_msix = 1;
231 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
232 
233 static void
234 xhci_interrupt_poll(void *_sc)
235 {
236 	struct xhci_softc *sc = _sc;
237 	USB_BUS_UNLOCK(&sc->sc_bus);
238 	xhci_interrupt(sc);
239 	USB_BUS_LOCK(&sc->sc_bus);
240 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
241 }
242 
243 static int
244 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
245 {
246 	uint32_t temp;
247 	uint32_t usb3_mask;
248 	uint32_t usb2_mask;
249 
250 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
251 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
252 
253 	temp |= set;
254 	temp &= ~clear;
255 
256 	/* Don't set bits which the hardware doesn't support */
257 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
258 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
259 
260 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
261 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
262 
263 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
264 
265 	return (0);
266 }
267 
268 int
269 xhci_pci_attach(device_t self)
270 {
271 	struct xhci_softc *sc = device_get_softc(self);
272 	int count, err, msix_table, rid;
273 	uint8_t usemsi = 1;
274 	uint8_t usedma32 = 0;
275 
276 	rid = PCI_XHCI_CBMEM;
277 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
278 	    RF_ACTIVE);
279 	if (!sc->sc_io_res) {
280 		device_printf(self, "Could not map memory\n");
281 		return (ENOMEM);
282 	}
283 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
284 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
285 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
286 
287 	switch (pci_get_devid(self)) {
288 	case 0x10091b73:	/* Fresco Logic FL1009 USB3.0 xHCI Controller */
289 	case 0x8241104c:	/* TUSB73x0 USB3.0 xHCI Controller */
290 		sc->sc_no_deconfigure = 1;
291 		break;
292 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
293 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
294 		/* Don't use 64-bit DMA on these controllers. */
295 		usedma32 = 1;
296 		break;
297 	case 0x10001b73:	/* FL1000G */
298 		/* Fresco Logic host doesn't support MSI. */
299 		usemsi = 0;
300 		break;
301 	case 0x0f358086:	/* BayTrail */
302 	case 0x9c318086:	/* Panther Point */
303 	case 0x1e318086:	/* Panther Point */
304 	case 0x8c318086:	/* Lynx Point */
305 	case 0x8cb18086:	/* Wildcat Point */
306 	case 0x9cb18086:	/* Broadwell Mobile Integrated */
307 		/*
308 		 * On Intel chipsets, reroute ports from EHCI to XHCI
309 		 * controller and use a different IMOD value.
310 		 */
311 		sc->sc_port_route = &xhci_pci_port_route;
312 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
313 		sc->sc_ctlstep = 1;
314 		break;
315 	default:
316 		break;
317 	}
318 
319 	if (xhci_init(sc, self, usedma32)) {
320 		device_printf(self, "Could not initialize softc\n");
321 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
322 		    sc->sc_io_res);
323 		return (ENXIO);
324 	}
325 
326 	pci_enable_busmaster(self);
327 
328 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
329 
330 	rid = 0;
331 	if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
332 		if (msix_table == PCI_XHCI_CBMEM) {
333 			sc->sc_msix_res = sc->sc_io_res;
334 		} else {
335 			sc->sc_msix_res = bus_alloc_resource_any(self,
336 			    SYS_RES_MEMORY, &msix_table, RF_ACTIVE);
337 			if (sc->sc_msix_res == NULL) {
338 				/* May not be enabled */
339 				device_printf(self,
340 				    "Unable to map MSI-X table\n");
341 			}
342 		}
343 		if (sc->sc_msix_res != NULL) {
344 			count = 1;
345 			if (pci_alloc_msix(self, &count) == 0) {
346 				if (bootverbose)
347 					device_printf(self, "MSI-X enabled\n");
348 				rid = 1;
349 			} else {
350 				if (sc->sc_msix_res != sc->sc_io_res) {
351 					bus_release_resource(self,
352 					    SYS_RES_MEMORY,
353 					    msix_table, sc->sc_msix_res);
354 				}
355 				sc->sc_msix_res = NULL;
356 			}
357 		}
358 	}
359 	if (rid == 0 && xhci_use_msi && usemsi) {
360 		count = 1;
361 		if (pci_alloc_msi(self, &count) == 0) {
362 			if (bootverbose)
363 				device_printf(self, "MSI enabled\n");
364 			rid = 1;
365 		}
366 	}
367 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
368 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
369 	if (sc->sc_irq_res == NULL) {
370 		pci_release_msi(self);
371 		device_printf(self, "Could not allocate IRQ\n");
372 		/* goto error; FALLTHROUGH - use polling */
373 	}
374 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
375 	if (sc->sc_bus.bdev == NULL) {
376 		device_printf(self, "Could not add USB device\n");
377 		goto error;
378 	}
379 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
380 
381 	switch (pci_get_vendor(self)) {
382 	case PCI_XHCI_VENDORID_AMD:
383 		strlcpy(sc->sc_vendor, "AMD", sizeof(sc->sc_vendor));
384 		break;
385 	case PCI_XHCI_VENDORID_INTEL:
386 		strlcpy(sc->sc_vendor, "Intel", sizeof(sc->sc_vendor));
387 		break;
388 	default:
389 		if (bootverbose)
390 			device_printf(self, "(New XHCI DeviceId=0x%08x)\n",
391 			    pci_get_devid(self));
392 		snprintf(sc->sc_vendor, sizeof(sc->sc_vendor),
393 		    "(0x%04x)", pci_get_vendor(self));
394 		break;
395 	}
396 
397 	if (sc->sc_irq_res != NULL) {
398 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
399 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
400 		if (err != 0) {
401 			bus_release_resource(self, SYS_RES_IRQ,
402 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
403 			sc->sc_irq_res = NULL;
404 			pci_release_msi(self);
405 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
406 			sc->sc_intr_hdl = NULL;
407 		}
408 	}
409 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
410 		if (xhci_use_polling() != 0) {
411 			device_printf(self, "Interrupt polling at %dHz\n", hz);
412 			USB_BUS_LOCK(&sc->sc_bus);
413 			xhci_interrupt_poll(sc);
414 			USB_BUS_UNLOCK(&sc->sc_bus);
415 		} else
416 			goto error;
417 	}
418 
419 	xhci_pci_take_controller(self);
420 
421 	err = xhci_halt_controller(sc);
422 
423 	if (err == 0)
424 		err = xhci_start_controller(sc);
425 
426 	if (err == 0)
427 		err = device_probe_and_attach(sc->sc_bus.bdev);
428 
429 	if (err) {
430 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
431 		goto error;
432 	}
433 	return (0);
434 
435 error:
436 	xhci_pci_detach(self);
437 	return (ENXIO);
438 }
439 
440 static int
441 xhci_pci_detach(device_t self)
442 {
443 	struct xhci_softc *sc = device_get_softc(self);
444 
445 	/* during module unload there are lots of children leftover */
446 	device_delete_children(self);
447 
448 	usb_callout_drain(&sc->sc_callout);
449 	xhci_halt_controller(sc);
450 	xhci_reset_controller(sc);
451 
452 	pci_disable_busmaster(self);
453 
454 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
455 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
456 		sc->sc_intr_hdl = NULL;
457 	}
458 	if (sc->sc_irq_res) {
459 		bus_release_resource(self, SYS_RES_IRQ,
460 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
461 		sc->sc_irq_res = NULL;
462 		pci_release_msi(self);
463 	}
464 	if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) {
465 		bus_release_resource(self, SYS_RES_MEMORY,
466 		    rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
467 		sc->sc_msix_res = NULL;
468 	}
469 	if (sc->sc_io_res) {
470 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
471 		    sc->sc_io_res);
472 		sc->sc_io_res = NULL;
473 	}
474 
475 	xhci_uninit(sc);
476 
477 	return (0);
478 }
479 
480 static int
481 xhci_pci_take_controller(device_t self)
482 {
483 	struct xhci_softc *sc = device_get_softc(self);
484 	uint32_t cparams;
485 	uint32_t eecp;
486 	uint32_t eec;
487 	uint16_t to;
488 	uint8_t bios_sem;
489 
490 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
491 
492 	eec = -1;
493 
494 	/* Synchronise with the BIOS if it owns the controller. */
495 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
496 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
497 		eec = XREAD4(sc, capa, eecp);
498 
499 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
500 			continue;
501 		bios_sem = XREAD1(sc, capa, eecp +
502 		    XHCI_XECP_BIOS_SEM);
503 		if (bios_sem == 0)
504 			continue;
505 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
506 		    "to give up control\n");
507 		XWRITE1(sc, capa, eecp +
508 		    XHCI_XECP_OS_SEM, 1);
509 		to = 500;
510 		while (1) {
511 			bios_sem = XREAD1(sc, capa, eecp +
512 			    XHCI_XECP_BIOS_SEM);
513 			if (bios_sem == 0)
514 				break;
515 
516 			if (--to == 0) {
517 				device_printf(sc->sc_bus.bdev,
518 				    "timed out waiting for BIOS\n");
519 				break;
520 			}
521 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
522 		}
523 	}
524 	return (0);
525 }
526