1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_detach_t xhci_pci_detach; 67 static usb_take_controller_t xhci_pci_take_controller; 68 69 static device_method_t xhci_device_methods[] = { 70 /* device interface */ 71 DEVMETHOD(device_probe, xhci_pci_probe), 72 DEVMETHOD(device_attach, xhci_pci_attach), 73 DEVMETHOD(device_detach, xhci_pci_detach), 74 DEVMETHOD(device_suspend, bus_generic_suspend), 75 DEVMETHOD(device_resume, bus_generic_resume), 76 DEVMETHOD(device_shutdown, bus_generic_shutdown), 77 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 78 79 DEVMETHOD_END 80 }; 81 82 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods, 83 sizeof(struct xhci_softc)); 84 85 static devclass_t xhci_devclass; 86 87 DRIVER_MODULE(xhci, pci, xhci_pci_driver, xhci_devclass, NULL, NULL); 88 MODULE_DEPEND(xhci, usb, 1, 1, 1); 89 90 static const char * 91 xhci_pci_match(device_t self) 92 { 93 uint32_t device_id = pci_get_devid(self); 94 95 switch (device_id) { 96 case 0x145c1022: 97 return ("AMD KERNCZ USB 3.0 controller"); 98 case 0x43ba1022: 99 return ("AMD X399 USB 3.0 controller"); 100 case 0x43b91022: /* X370 */ 101 case 0x43bb1022: /* B350 */ 102 return ("AMD 300 Series USB 3.0 controller"); 103 case 0x78141022: 104 return ("AMD FCH USB 3.0 controller"); 105 106 case 0x145f1d94: 107 return ("Hygon USB 3.0 controller"); 108 109 case 0x01941033: 110 return ("NEC uPD720200 USB 3.0 controller"); 111 case 0x00151912: 112 return ("NEC uPD720202 USB 3.0 controller"); 113 114 case 0x10001b73: 115 return ("Fresco Logic FL1000G USB 3.0 controller"); 116 case 0x11001b73: 117 return ("Fresco Logic FL1100 USB 3.0 controller"); 118 119 case 0x10421b21: 120 return ("ASMedia ASM1042 USB 3.0 controller"); 121 case 0x11421b21: 122 return ("ASMedia ASM1042A USB 3.0 controller"); 123 124 case 0x0f358086: 125 return ("Intel BayTrail USB 3.0 controller"); 126 case 0x19d08086: 127 return ("Intel Denverton USB 3.0 controller"); 128 case 0x9c318086: 129 case 0x1e318086: 130 return ("Intel Panther Point USB 3.0 controller"); 131 case 0x22b58086: 132 return ("Intel Braswell USB 3.0 controller"); 133 case 0x31a88086: 134 return ("Intel Gemini Lake USB 3.0 controller"); 135 case 0x5aa88086: 136 return ("Intel Apollo Lake USB 3.0 controller"); 137 case 0x8c318086: 138 return ("Intel Lynx Point USB 3.0 controller"); 139 case 0x8cb18086: 140 return ("Intel Wildcat Point USB 3.0 controller"); 141 case 0x8d318086: 142 return ("Intel Wellsburg USB 3.0 controller"); 143 case 0x9cb18086: 144 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 145 case 0x9d2f8086: 146 return ("Intel Sunrise Point-LP USB 3.0 controller"); 147 case 0xa12f8086: 148 return ("Intel Sunrise Point USB 3.0 controller"); 149 case 0xa1af8086: 150 return ("Intel Lewisburg USB 3.0 controller"); 151 case 0xa2af8086: 152 return ("Intel Union Point USB 3.0 controller"); 153 case 0xa36d8086: 154 return ("Intel Cannon Lake USB 3.1 controller"); 155 156 case 0xa01b177d: 157 return ("Cavium ThunderX USB 3.0 controller"); 158 159 default: 160 break; 161 } 162 163 if ((pci_get_class(self) == PCIC_SERIALBUS) 164 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 165 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 166 return ("XHCI (generic) USB 3.0 controller"); 167 } 168 return (NULL); /* dunno */ 169 } 170 171 static int 172 xhci_pci_probe(device_t self) 173 { 174 const char *desc = xhci_pci_match(self); 175 176 if (desc) { 177 device_set_desc(self, desc); 178 return (BUS_PROBE_DEFAULT); 179 } else { 180 return (ENXIO); 181 } 182 } 183 184 static int xhci_use_msi = 1; 185 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 186 static int xhci_use_msix = 1; 187 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 188 189 static void 190 xhci_interrupt_poll(void *_sc) 191 { 192 struct xhci_softc *sc = _sc; 193 USB_BUS_UNLOCK(&sc->sc_bus); 194 xhci_interrupt(sc); 195 USB_BUS_LOCK(&sc->sc_bus); 196 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 197 } 198 199 static int 200 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 201 { 202 uint32_t temp; 203 uint32_t usb3_mask; 204 uint32_t usb2_mask; 205 206 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 207 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 208 209 temp |= set; 210 temp &= ~clear; 211 212 /* Don't set bits which the hardware doesn't support */ 213 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 214 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 215 216 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 217 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 218 219 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 220 221 return (0); 222 } 223 224 int 225 xhci_pci_attach(device_t self) 226 { 227 struct xhci_softc *sc = device_get_softc(self); 228 int count, err, msix_table, rid; 229 uint8_t usemsi = 1; 230 uint8_t usedma32 = 0; 231 232 rid = PCI_XHCI_CBMEM; 233 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 234 RF_ACTIVE); 235 if (!sc->sc_io_res) { 236 device_printf(self, "Could not map memory\n"); 237 return (ENOMEM); 238 } 239 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 240 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 241 sc->sc_io_size = rman_get_size(sc->sc_io_res); 242 243 switch (pci_get_devid(self)) { 244 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 245 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 246 /* Don't use 64-bit DMA on these controllers. */ 247 usedma32 = 1; 248 break; 249 case 0x10001b73: /* FL1000G */ 250 /* Fresco Logic host doesn't support MSI. */ 251 usemsi = 0; 252 break; 253 case 0x0f358086: /* BayTrail */ 254 case 0x9c318086: /* Panther Point */ 255 case 0x1e318086: /* Panther Point */ 256 case 0x8c318086: /* Lynx Point */ 257 case 0x8cb18086: /* Wildcat Point */ 258 case 0x9cb18086: /* Broadwell Mobile Integrated */ 259 /* 260 * On Intel chipsets, reroute ports from EHCI to XHCI 261 * controller and use a different IMOD value. 262 */ 263 sc->sc_port_route = &xhci_pci_port_route; 264 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 265 sc->sc_ctlstep = 1; 266 break; 267 } 268 269 if (xhci_init(sc, self, usedma32)) { 270 device_printf(self, "Could not initialize softc\n"); 271 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 272 sc->sc_io_res); 273 return (ENXIO); 274 } 275 276 pci_enable_busmaster(self); 277 278 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 279 280 rid = 0; 281 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 282 if (msix_table == PCI_XHCI_CBMEM) { 283 sc->sc_msix_res = sc->sc_io_res; 284 } else { 285 sc->sc_msix_res = bus_alloc_resource_any(self, 286 SYS_RES_MEMORY, &msix_table, RF_ACTIVE); 287 if (sc->sc_msix_res == NULL) { 288 /* May not be enabled */ 289 device_printf(self, 290 "Unable to map MSI-X table\n"); 291 } 292 } 293 if (sc->sc_msix_res != NULL) { 294 count = 1; 295 if (pci_alloc_msix(self, &count) == 0) { 296 if (bootverbose) 297 device_printf(self, "MSI-X enabled\n"); 298 rid = 1; 299 } else { 300 if (sc->sc_msix_res != sc->sc_io_res) { 301 bus_release_resource(self, 302 SYS_RES_MEMORY, 303 msix_table, sc->sc_msix_res); 304 } 305 sc->sc_msix_res = NULL; 306 } 307 } 308 } 309 if (rid == 0 && xhci_use_msi && usemsi) { 310 count = 1; 311 if (pci_alloc_msi(self, &count) == 0) { 312 if (bootverbose) 313 device_printf(self, "MSI enabled\n"); 314 rid = 1; 315 } 316 } 317 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 318 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 319 if (sc->sc_irq_res == NULL) { 320 pci_release_msi(self); 321 device_printf(self, "Could not allocate IRQ\n"); 322 /* goto error; FALLTHROUGH - use polling */ 323 } 324 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 325 if (sc->sc_bus.bdev == NULL) { 326 device_printf(self, "Could not add USB device\n"); 327 goto error; 328 } 329 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 330 331 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 332 333 if (sc->sc_irq_res != NULL) { 334 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 335 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 336 if (err != 0) { 337 bus_release_resource(self, SYS_RES_IRQ, 338 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 339 sc->sc_irq_res = NULL; 340 pci_release_msi(self); 341 device_printf(self, "Could not setup IRQ, err=%d\n", err); 342 sc->sc_intr_hdl = NULL; 343 } 344 } 345 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 346 if (xhci_use_polling() != 0) { 347 device_printf(self, "Interrupt polling at %dHz\n", hz); 348 USB_BUS_LOCK(&sc->sc_bus); 349 xhci_interrupt_poll(sc); 350 USB_BUS_UNLOCK(&sc->sc_bus); 351 } else 352 goto error; 353 } 354 355 xhci_pci_take_controller(self); 356 357 err = xhci_halt_controller(sc); 358 359 if (err == 0) 360 err = xhci_start_controller(sc); 361 362 if (err == 0) 363 err = device_probe_and_attach(sc->sc_bus.bdev); 364 365 if (err) { 366 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 367 goto error; 368 } 369 return (0); 370 371 error: 372 xhci_pci_detach(self); 373 return (ENXIO); 374 } 375 376 static int 377 xhci_pci_detach(device_t self) 378 { 379 struct xhci_softc *sc = device_get_softc(self); 380 381 /* during module unload there are lots of children leftover */ 382 device_delete_children(self); 383 384 usb_callout_drain(&sc->sc_callout); 385 xhci_halt_controller(sc); 386 xhci_reset_controller(sc); 387 388 pci_disable_busmaster(self); 389 390 if (sc->sc_irq_res && sc->sc_intr_hdl) { 391 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 392 sc->sc_intr_hdl = NULL; 393 } 394 if (sc->sc_irq_res) { 395 bus_release_resource(self, SYS_RES_IRQ, 396 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 397 sc->sc_irq_res = NULL; 398 pci_release_msi(self); 399 } 400 if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) { 401 bus_release_resource(self, SYS_RES_MEMORY, 402 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 403 sc->sc_msix_res = NULL; 404 } 405 if (sc->sc_io_res) { 406 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 407 sc->sc_io_res); 408 sc->sc_io_res = NULL; 409 } 410 411 xhci_uninit(sc); 412 413 return (0); 414 } 415 416 static int 417 xhci_pci_take_controller(device_t self) 418 { 419 struct xhci_softc *sc = device_get_softc(self); 420 uint32_t cparams; 421 uint32_t eecp; 422 uint32_t eec; 423 uint16_t to; 424 uint8_t bios_sem; 425 426 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 427 428 eec = -1; 429 430 /* Synchronise with the BIOS if it owns the controller. */ 431 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 432 eecp += XHCI_XECP_NEXT(eec) << 2) { 433 eec = XREAD4(sc, capa, eecp); 434 435 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 436 continue; 437 bios_sem = XREAD1(sc, capa, eecp + 438 XHCI_XECP_BIOS_SEM); 439 if (bios_sem == 0) 440 continue; 441 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 442 "to give up control\n"); 443 XWRITE1(sc, capa, eecp + 444 XHCI_XECP_OS_SEM, 1); 445 to = 500; 446 while (1) { 447 bios_sem = XREAD1(sc, capa, eecp + 448 XHCI_XECP_BIOS_SEM); 449 if (bios_sem == 0) 450 break; 451 452 if (--to == 0) { 453 device_printf(sc->sc_bus.bdev, 454 "timed out waiting for BIOS\n"); 455 break; 456 } 457 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 458 } 459 } 460 return (0); 461 } 462