xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 6c925b9c81036a86db387f75a32b423420eadf6c)
1 /*-
2  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55 
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62 
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67 
68 static device_method_t xhci_device_methods[] = {
69 	/* device interface */
70 	DEVMETHOD(device_probe, xhci_pci_probe),
71 	DEVMETHOD(device_attach, xhci_pci_attach),
72 	DEVMETHOD(device_detach, xhci_pci_detach),
73 	DEVMETHOD(device_suspend, bus_generic_suspend),
74 	DEVMETHOD(device_resume, bus_generic_resume),
75 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77 
78 	DEVMETHOD_END
79 };
80 
81 static driver_t xhci_driver = {
82 	.name = "xhci",
83 	.methods = xhci_device_methods,
84 	.size = sizeof(struct xhci_softc),
85 };
86 
87 static devclass_t xhci_devclass;
88 
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91 
92 static const char *
93 xhci_pci_match(device_t self)
94 {
95 	uint32_t device_id = pci_get_devid(self);
96 
97 	switch (device_id) {
98 	case 0x78141022:
99 		return ("AMD FCH USB 3.0 controller");
100 
101 	case 0x01941033:
102 		return ("NEC uPD720200 USB 3.0 controller");
103 
104 	case 0x10001b73:
105 		return ("Fresco Logic FL1000G USB 3.0 controller");
106 
107 	case 0x10421b21:
108 		return ("ASMedia ASM1042 USB 3.0 controller");
109 	case 0x11421b21:
110 		return ("ASMedia ASM1042A USB 3.0 controller");
111 
112 	case 0x0f358086:
113 		return ("Intel BayTrail USB 3.0 controller");
114 	case 0x9c318086:
115 	case 0x1e318086:
116 		return ("Intel Panther Point USB 3.0 controller");
117 	case 0x8c318086:
118 		return ("Intel Lynx Point USB 3.0 controller");
119 	case 0x8cb18086:
120 		return ("Intel Wildcat Point USB 3.0 controller");
121 	case 0x8d318086:
122 		return ("Intel Wellsburg USB 3.0 controller");
123 	case 0x9cb18086:
124 		return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
125 	case 0x9d2f8086:
126 		return ("Intel Sunrise Point-LP USB 3.0 controller");
127 	case 0xa12f8086:
128 		return ("Intel Sunrise Point USB 3.0 controller");
129 
130 	case 0xa01b177d:
131 		return ("Cavium ThunderX USB 3.0 controller");
132 
133 	default:
134 		break;
135 	}
136 
137 	if ((pci_get_class(self) == PCIC_SERIALBUS)
138 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
139 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
140 		return ("XHCI (generic) USB 3.0 controller");
141 	}
142 	return (NULL);			/* dunno */
143 }
144 
145 static int
146 xhci_pci_probe(device_t self)
147 {
148 	const char *desc = xhci_pci_match(self);
149 
150 	if (desc) {
151 		device_set_desc(self, desc);
152 		return (BUS_PROBE_DEFAULT);
153 	} else {
154 		return (ENXIO);
155 	}
156 }
157 
158 static int xhci_use_msi = 1;
159 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
160 static int xhci_use_msix = 1;
161 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
162 
163 static void
164 xhci_interrupt_poll(void *_sc)
165 {
166 	struct xhci_softc *sc = _sc;
167 	USB_BUS_UNLOCK(&sc->sc_bus);
168 	xhci_interrupt(sc);
169 	USB_BUS_LOCK(&sc->sc_bus);
170 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
171 }
172 
173 static int
174 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
175 {
176 	uint32_t temp;
177 	uint32_t usb3_mask;
178 	uint32_t usb2_mask;
179 
180 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
181 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
182 
183 	temp |= set;
184 	temp &= ~clear;
185 
186 	/* Don't set bits which the hardware doesn't support */
187 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
188 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
189 
190 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
191 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
192 
193 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
194 
195 	return (0);
196 }
197 
198 static int
199 xhci_pci_attach(device_t self)
200 {
201 	struct xhci_softc *sc = device_get_softc(self);
202 	int count, err, msix_table, rid;
203 	uint8_t usemsi = 1;
204 	uint8_t usedma32 = 0;
205 
206 	rid = PCI_XHCI_CBMEM;
207 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
208 	    RF_ACTIVE);
209 	if (!sc->sc_io_res) {
210 		device_printf(self, "Could not map memory\n");
211 		return (ENOMEM);
212 	}
213 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
214 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
215 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
216 
217 	switch (pci_get_devid(self)) {
218 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
219 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
220 		/* Don't use 64-bit DMA on these controllers. */
221 		usedma32 = 1;
222 		break;
223 	case 0x10001b73:	/* FL1000G */
224 		/* Fresco Logic host doesn't support MSI. */
225 		usemsi = 0;
226 		break;
227 	case 0x0f358086:	/* BayTrail */
228 	case 0x9c318086:	/* Panther Point */
229 	case 0x1e318086:	/* Panther Point */
230 	case 0x8c318086:	/* Lynx Point */
231 	case 0x8cb18086:	/* Wildcat Point */
232 	case 0x9cb18086:	/* Broadwell Mobile Integrated */
233 		/*
234 		 * On Intel chipsets, reroute ports from EHCI to XHCI
235 		 * controller and use a different IMOD value.
236 		 */
237 		sc->sc_port_route = &xhci_pci_port_route;
238 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
239 		break;
240 	}
241 
242 	if (xhci_init(sc, self, usedma32)) {
243 		device_printf(self, "Could not initialize softc\n");
244 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
245 		    sc->sc_io_res);
246 		return (ENXIO);
247 	}
248 
249 	pci_enable_busmaster(self);
250 
251 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
252 
253 	rid = 0;
254 	if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
255 		sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY,
256 		    &msix_table, RF_ACTIVE);
257 		if (sc->sc_msix_res == NULL) {
258 			/* May not be enabled */
259 			device_printf(self,
260 			    "Unable to map MSI-X table \n");
261 		} else {
262 			count = 1;
263 			if (pci_alloc_msix(self, &count) == 0) {
264 				if (bootverbose)
265 					device_printf(self, "MSI-X enabled\n");
266 				rid = 1;
267 			} else {
268 				bus_release_resource(self, SYS_RES_MEMORY,
269 				    msix_table, sc->sc_msix_res);
270 				sc->sc_msix_res = NULL;
271 			}
272 		}
273 	}
274 	if (rid == 0 && xhci_use_msi && usemsi) {
275 		count = 1;
276 		if (pci_alloc_msi(self, &count) == 0) {
277 			if (bootverbose)
278 				device_printf(self, "MSI enabled\n");
279 			rid = 1;
280 		}
281 	}
282 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
283 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
284 	if (sc->sc_irq_res == NULL) {
285 		pci_release_msi(self);
286 		device_printf(self, "Could not allocate IRQ\n");
287 		/* goto error; FALLTHROUGH - use polling */
288 	}
289 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
290 	if (sc->sc_bus.bdev == NULL) {
291 		device_printf(self, "Could not add USB device\n");
292 		goto error;
293 	}
294 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
295 
296 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
297 
298 	if (sc->sc_irq_res != NULL) {
299 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
300 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
301 		if (err != 0) {
302 			bus_release_resource(self, SYS_RES_IRQ,
303 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
304 			sc->sc_irq_res = NULL;
305 			pci_release_msi(self);
306 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
307 			sc->sc_intr_hdl = NULL;
308 		}
309 	}
310 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
311 		if (xhci_use_polling() != 0) {
312 			device_printf(self, "Interrupt polling at %dHz\n", hz);
313 			USB_BUS_LOCK(&sc->sc_bus);
314 			xhci_interrupt_poll(sc);
315 			USB_BUS_UNLOCK(&sc->sc_bus);
316 		} else
317 			goto error;
318 	}
319 
320 	xhci_pci_take_controller(self);
321 
322 	err = xhci_halt_controller(sc);
323 
324 	if (err == 0)
325 		err = xhci_start_controller(sc);
326 
327 	if (err == 0)
328 		err = device_probe_and_attach(sc->sc_bus.bdev);
329 
330 	if (err) {
331 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
332 		goto error;
333 	}
334 	return (0);
335 
336 error:
337 	xhci_pci_detach(self);
338 	return (ENXIO);
339 }
340 
341 static int
342 xhci_pci_detach(device_t self)
343 {
344 	struct xhci_softc *sc = device_get_softc(self);
345 
346 	/* during module unload there are lots of children leftover */
347 	device_delete_children(self);
348 
349 	usb_callout_drain(&sc->sc_callout);
350 	xhci_halt_controller(sc);
351 
352 	pci_disable_busmaster(self);
353 
354 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
355 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
356 		sc->sc_intr_hdl = NULL;
357 	}
358 	if (sc->sc_irq_res) {
359 		bus_release_resource(self, SYS_RES_IRQ,
360 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
361 		sc->sc_irq_res = NULL;
362 		pci_release_msi(self);
363 	}
364 	if (sc->sc_io_res) {
365 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
366 		    sc->sc_io_res);
367 		sc->sc_io_res = NULL;
368 	}
369 	if (sc->sc_msix_res) {
370 		bus_release_resource(self, SYS_RES_MEMORY,
371 		    rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
372 		sc->sc_msix_res = NULL;
373 	}
374 
375 	xhci_uninit(sc);
376 
377 	return (0);
378 }
379 
380 static int
381 xhci_pci_take_controller(device_t self)
382 {
383 	struct xhci_softc *sc = device_get_softc(self);
384 	uint32_t cparams;
385 	uint32_t eecp;
386 	uint32_t eec;
387 	uint16_t to;
388 	uint8_t bios_sem;
389 
390 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
391 
392 	eec = -1;
393 
394 	/* Synchronise with the BIOS if it owns the controller. */
395 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
396 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
397 		eec = XREAD4(sc, capa, eecp);
398 
399 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
400 			continue;
401 		bios_sem = XREAD1(sc, capa, eecp +
402 		    XHCI_XECP_BIOS_SEM);
403 		if (bios_sem == 0)
404 			continue;
405 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
406 		    "to give up control\n");
407 		XWRITE1(sc, capa, eecp +
408 		    XHCI_XECP_OS_SEM, 1);
409 		to = 500;
410 		while (1) {
411 			bios_sem = XREAD1(sc, capa, eecp +
412 			    XHCI_XECP_BIOS_SEM);
413 			if (bios_sem == 0)
414 				break;
415 
416 			if (--to == 0) {
417 				device_printf(sc->sc_bus.bdev,
418 				    "timed out waiting for BIOS\n");
419 				break;
420 			}
421 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
422 		}
423 	}
424 	return (0);
425 }
426