xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 681ce946f33e75c590e97c53076e86dff1fe8f4a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/stdint.h>
32 #include <sys/stddef.h>
33 #include <sys/param.h>
34 #include <sys/queue.h>
35 #include <sys/types.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/bus.h>
39 #include <sys/module.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 #include <sys/condvar.h>
43 #include <sys/sysctl.h>
44 #include <sys/sx.h>
45 #include <sys/unistd.h>
46 #include <sys/callout.h>
47 #include <sys/malloc.h>
48 #include <sys/priv.h>
49 
50 #include <dev/usb/usb.h>
51 #include <dev/usb/usbdi.h>
52 
53 #include <dev/usb/usb_core.h>
54 #include <dev/usb/usb_busdma.h>
55 #include <dev/usb/usb_process.h>
56 #include <dev/usb/usb_util.h>
57 
58 #include <dev/usb/usb_controller.h>
59 #include <dev/usb/usb_bus.h>
60 #include <dev/usb/usb_pci.h>
61 #include <dev/usb/controller/xhci.h>
62 #include <dev/usb/controller/xhcireg.h>
63 #include "usb_if.h"
64 
65 static device_probe_t xhci_pci_probe;
66 static device_detach_t xhci_pci_detach;
67 static usb_take_controller_t xhci_pci_take_controller;
68 
69 static device_method_t xhci_device_methods[] = {
70 	/* device interface */
71 	DEVMETHOD(device_probe, xhci_pci_probe),
72 	DEVMETHOD(device_attach, xhci_pci_attach),
73 	DEVMETHOD(device_detach, xhci_pci_detach),
74 	DEVMETHOD(device_suspend, bus_generic_suspend),
75 	DEVMETHOD(device_resume, bus_generic_resume),
76 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
77 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
78 
79 	DEVMETHOD_END
80 };
81 
82 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods,
83     sizeof(struct xhci_softc));
84 
85 static devclass_t xhci_devclass;
86 
87 DRIVER_MODULE(xhci, pci, xhci_pci_driver, xhci_devclass, NULL, NULL);
88 MODULE_DEPEND(xhci, usb, 1, 1, 1);
89 
90 static const char *
91 xhci_pci_match(device_t self)
92 {
93 	uint32_t device_id = pci_get_devid(self);
94 
95 	switch (device_id) {
96 	case 0x145c1022:
97 		return ("AMD KERNCZ USB 3.0 controller");
98 	case 0x148c1022:
99 		return ("AMD Starship USB 3.0 controller");
100 	case 0x149c1022:
101 		return ("AMD Matisse USB 3.0 controller");
102 	case 0x43ba1022:
103 		return ("AMD X399 USB 3.0 controller");
104 	case 0x43b91022: /* X370 */
105 	case 0x43bb1022: /* B350 */
106 		return ("AMD 300 Series USB 3.0 controller");
107 	case 0x78141022:
108 		return ("AMD FCH USB 3.0 controller");
109 
110 	case 0x145f1d94:
111 		return ("Hygon USB 3.0 controller");
112 
113 	case 0x01941033:
114 		return ("NEC uPD720200 USB 3.0 controller");
115 	case 0x00151912:
116 		return ("NEC uPD720202 USB 3.0 controller");
117 
118 	case 0x10001b73:
119 		return ("Fresco Logic FL1000G USB 3.0 controller");
120 	case 0x11001b73:
121 		return ("Fresco Logic FL1100 USB 3.0 controller");
122 
123 	case 0x10421b21:
124 		return ("ASMedia ASM1042 USB 3.0 controller");
125 	case 0x11421b21:
126 		return ("ASMedia ASM1042A USB 3.0 controller");
127 	case 0x32421b21:
128 		return ("ASMedia ASM3242 USB 3.2 controller");
129 
130 	case 0x0b278086:
131 		return ("Intel Goshen Ridge Thunderbolt 4 USB controller");
132 	case 0x0f358086:
133 		return ("Intel BayTrail USB 3.0 controller");
134 	case 0x11388086:
135 		return ("Intel Maple Ridge Thunderbolt 4 USB controller");
136 	case 0x15c18086:
137 	case 0x15d48086:
138 	case 0x15db8086:
139 		return ("Intel Alpine Ridge Thunderbolt 3 USB controller");
140 	case 0x15e98086:
141 	case 0x15ec8086:
142 	case 0x15f08086:
143 		return ("Intel Titan Ridge Thunderbolt 3 USB controller");
144 	case 0x19d08086:
145 		return ("Intel Denverton USB 3.0 controller");
146 	case 0x9c318086:
147 	case 0x1e318086:
148 		return ("Intel Panther Point USB 3.0 controller");
149 	case 0x22b58086:
150 		return ("Intel Braswell USB 3.0 controller");
151 	case 0x31a88086:
152 		return ("Intel Gemini Lake USB 3.0 controller");
153 	case 0x34ed8086:
154 		return ("Intel Ice Lake-LP USB 3.1 controller");
155 	case 0x43ed8086:
156 		return ("Intel Tiger Lake-H USB 3.2 controller");
157 	case 0x461e8086:
158 		return ("Intel Alder Lake-P Thunderbolt 4 USB controller");
159 	case 0x51ed8086:
160 		return ("Intel Alder Lake USB 3.2 controller");
161 	case 0x5aa88086:
162 		return ("Intel Apollo Lake USB 3.0 controller");
163 	case 0x7ae08086:
164 		return ("Intel Alder Lake USB 3.2 controller");
165 	case 0x8a138086:
166 		return ("Intel Ice Lake Thunderbolt 3 USB controller");
167 	case 0x8c318086:
168 		return ("Intel Lynx Point USB 3.0 controller");
169 	case 0x8cb18086:
170 		return ("Intel Wildcat Point USB 3.0 controller");
171 	case 0x8d318086:
172 		return ("Intel Wellsburg USB 3.0 controller");
173 	case 0x9a138086:
174 		return ("Intel Tiger Lake-LP Thunderbolt 4 USB controller");
175 	case 0x9a178086:
176 		return ("Intel Tiger Lake-H Thunderbolt 4 USB controller");
177 	case 0x9cb18086:
178 		return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
179 	case 0x9d2f8086:
180 		return ("Intel Sunrise Point-LP USB 3.0 controller");
181 	case 0xa0ed8086:
182 		return ("Intel Tiger Lake-LP USB 3.2 controller");
183 	case 0xa12f8086:
184 		return ("Intel Sunrise Point USB 3.0 controller");
185 	case 0xa1af8086:
186 		return ("Intel Lewisburg USB 3.0 controller");
187 	case 0xa2af8086:
188 		return ("Intel Union Point USB 3.0 controller");
189 	case 0xa36d8086:
190 		return ("Intel Cannon Lake USB 3.1 controller");
191 
192 	case 0xa01b177d:
193 		return ("Cavium ThunderX USB 3.0 controller");
194 
195 	case 0x1ada10de:
196 		return ("NVIDIA TU106 USB 3.1 controller");
197 
198 	default:
199 		break;
200 	}
201 
202 	if ((pci_get_class(self) == PCIC_SERIALBUS)
203 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
204 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
205 		return ("XHCI (generic) USB 3.0 controller");
206 	}
207 	return (NULL);			/* dunno */
208 }
209 
210 static int
211 xhci_pci_probe(device_t self)
212 {
213 	const char *desc = xhci_pci_match(self);
214 
215 	if (desc) {
216 		device_set_desc(self, desc);
217 		return (BUS_PROBE_DEFAULT);
218 	} else {
219 		return (ENXIO);
220 	}
221 }
222 
223 static int xhci_use_msi = 1;
224 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
225 static int xhci_use_msix = 1;
226 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
227 
228 static void
229 xhci_interrupt_poll(void *_sc)
230 {
231 	struct xhci_softc *sc = _sc;
232 	USB_BUS_UNLOCK(&sc->sc_bus);
233 	xhci_interrupt(sc);
234 	USB_BUS_LOCK(&sc->sc_bus);
235 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
236 }
237 
238 static int
239 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
240 {
241 	uint32_t temp;
242 	uint32_t usb3_mask;
243 	uint32_t usb2_mask;
244 
245 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
246 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
247 
248 	temp |= set;
249 	temp &= ~clear;
250 
251 	/* Don't set bits which the hardware doesn't support */
252 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
253 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
254 
255 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
256 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
257 
258 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
259 
260 	return (0);
261 }
262 
263 int
264 xhci_pci_attach(device_t self)
265 {
266 	struct xhci_softc *sc = device_get_softc(self);
267 	int count, err, msix_table, rid;
268 	uint8_t usemsi = 1;
269 	uint8_t usedma32 = 0;
270 
271 	rid = PCI_XHCI_CBMEM;
272 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
273 	    RF_ACTIVE);
274 	if (!sc->sc_io_res) {
275 		device_printf(self, "Could not map memory\n");
276 		return (ENOMEM);
277 	}
278 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
279 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
280 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
281 
282 	switch (pci_get_devid(self)) {
283 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
284 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
285 		/* Don't use 64-bit DMA on these controllers. */
286 		usedma32 = 1;
287 		break;
288 	case 0x10001b73:	/* FL1000G */
289 		/* Fresco Logic host doesn't support MSI. */
290 		usemsi = 0;
291 		break;
292 	case 0x0f358086:	/* BayTrail */
293 	case 0x9c318086:	/* Panther Point */
294 	case 0x1e318086:	/* Panther Point */
295 	case 0x8c318086:	/* Lynx Point */
296 	case 0x8cb18086:	/* Wildcat Point */
297 	case 0x9cb18086:	/* Broadwell Mobile Integrated */
298 		/*
299 		 * On Intel chipsets, reroute ports from EHCI to XHCI
300 		 * controller and use a different IMOD value.
301 		 */
302 		sc->sc_port_route = &xhci_pci_port_route;
303 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
304 		sc->sc_ctlstep = 1;
305 		break;
306 	}
307 
308 	if (xhci_init(sc, self, usedma32)) {
309 		device_printf(self, "Could not initialize softc\n");
310 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
311 		    sc->sc_io_res);
312 		return (ENXIO);
313 	}
314 
315 	pci_enable_busmaster(self);
316 
317 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
318 
319 	rid = 0;
320 	if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
321 		if (msix_table == PCI_XHCI_CBMEM) {
322 			sc->sc_msix_res = sc->sc_io_res;
323 		} else {
324 			sc->sc_msix_res = bus_alloc_resource_any(self,
325 			    SYS_RES_MEMORY, &msix_table, RF_ACTIVE);
326 			if (sc->sc_msix_res == NULL) {
327 				/* May not be enabled */
328 				device_printf(self,
329 				    "Unable to map MSI-X table\n");
330 			}
331 		}
332 		if (sc->sc_msix_res != NULL) {
333 			count = 1;
334 			if (pci_alloc_msix(self, &count) == 0) {
335 				if (bootverbose)
336 					device_printf(self, "MSI-X enabled\n");
337 				rid = 1;
338 			} else {
339 				if (sc->sc_msix_res != sc->sc_io_res) {
340 					bus_release_resource(self,
341 					    SYS_RES_MEMORY,
342 					    msix_table, sc->sc_msix_res);
343 				}
344 				sc->sc_msix_res = NULL;
345 			}
346 		}
347 	}
348 	if (rid == 0 && xhci_use_msi && usemsi) {
349 		count = 1;
350 		if (pci_alloc_msi(self, &count) == 0) {
351 			if (bootverbose)
352 				device_printf(self, "MSI enabled\n");
353 			rid = 1;
354 		}
355 	}
356 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
357 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
358 	if (sc->sc_irq_res == NULL) {
359 		pci_release_msi(self);
360 		device_printf(self, "Could not allocate IRQ\n");
361 		/* goto error; FALLTHROUGH - use polling */
362 	}
363 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
364 	if (sc->sc_bus.bdev == NULL) {
365 		device_printf(self, "Could not add USB device\n");
366 		goto error;
367 	}
368 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
369 
370 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
371 
372 	if (sc->sc_irq_res != NULL) {
373 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
374 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
375 		if (err != 0) {
376 			bus_release_resource(self, SYS_RES_IRQ,
377 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
378 			sc->sc_irq_res = NULL;
379 			pci_release_msi(self);
380 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
381 			sc->sc_intr_hdl = NULL;
382 		}
383 	}
384 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
385 		if (xhci_use_polling() != 0) {
386 			device_printf(self, "Interrupt polling at %dHz\n", hz);
387 			USB_BUS_LOCK(&sc->sc_bus);
388 			xhci_interrupt_poll(sc);
389 			USB_BUS_UNLOCK(&sc->sc_bus);
390 		} else
391 			goto error;
392 	}
393 
394 	xhci_pci_take_controller(self);
395 
396 	err = xhci_halt_controller(sc);
397 
398 	if (err == 0)
399 		err = xhci_start_controller(sc);
400 
401 	if (err == 0)
402 		err = device_probe_and_attach(sc->sc_bus.bdev);
403 
404 	if (err) {
405 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
406 		goto error;
407 	}
408 	return (0);
409 
410 error:
411 	xhci_pci_detach(self);
412 	return (ENXIO);
413 }
414 
415 static int
416 xhci_pci_detach(device_t self)
417 {
418 	struct xhci_softc *sc = device_get_softc(self);
419 
420 	/* during module unload there are lots of children leftover */
421 	device_delete_children(self);
422 
423 	usb_callout_drain(&sc->sc_callout);
424 	xhci_halt_controller(sc);
425 	xhci_reset_controller(sc);
426 
427 	pci_disable_busmaster(self);
428 
429 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
430 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
431 		sc->sc_intr_hdl = NULL;
432 	}
433 	if (sc->sc_irq_res) {
434 		bus_release_resource(self, SYS_RES_IRQ,
435 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
436 		sc->sc_irq_res = NULL;
437 		pci_release_msi(self);
438 	}
439 	if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) {
440 		bus_release_resource(self, SYS_RES_MEMORY,
441 		    rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
442 		sc->sc_msix_res = NULL;
443 	}
444 	if (sc->sc_io_res) {
445 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
446 		    sc->sc_io_res);
447 		sc->sc_io_res = NULL;
448 	}
449 
450 	xhci_uninit(sc);
451 
452 	return (0);
453 }
454 
455 static int
456 xhci_pci_take_controller(device_t self)
457 {
458 	struct xhci_softc *sc = device_get_softc(self);
459 	uint32_t cparams;
460 	uint32_t eecp;
461 	uint32_t eec;
462 	uint16_t to;
463 	uint8_t bios_sem;
464 
465 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
466 
467 	eec = -1;
468 
469 	/* Synchronise with the BIOS if it owns the controller. */
470 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
471 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
472 		eec = XREAD4(sc, capa, eecp);
473 
474 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
475 			continue;
476 		bios_sem = XREAD1(sc, capa, eecp +
477 		    XHCI_XECP_BIOS_SEM);
478 		if (bios_sem == 0)
479 			continue;
480 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
481 		    "to give up control\n");
482 		XWRITE1(sc, capa, eecp +
483 		    XHCI_XECP_OS_SEM, 1);
484 		to = 500;
485 		while (1) {
486 			bios_sem = XREAD1(sc, capa, eecp +
487 			    XHCI_XECP_BIOS_SEM);
488 			if (bios_sem == 0)
489 				break;
490 
491 			if (--to == 0) {
492 				device_printf(sc->sc_bus.bdev,
493 				    "timed out waiting for BIOS\n");
494 				break;
495 			}
496 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
497 		}
498 	}
499 	return (0);
500 }
501