xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 656f49f8e2b0656824a5f10aeb760a00fdd3753f)
1 /*-
2  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55 
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62 
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67 
68 static device_method_t xhci_device_methods[] = {
69 	/* device interface */
70 	DEVMETHOD(device_probe, xhci_pci_probe),
71 	DEVMETHOD(device_attach, xhci_pci_attach),
72 	DEVMETHOD(device_detach, xhci_pci_detach),
73 	DEVMETHOD(device_suspend, bus_generic_suspend),
74 	DEVMETHOD(device_resume, bus_generic_resume),
75 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77 
78 	DEVMETHOD_END
79 };
80 
81 static driver_t xhci_driver = {
82 	.name = "xhci",
83 	.methods = xhci_device_methods,
84 	.size = sizeof(struct xhci_softc),
85 };
86 
87 static devclass_t xhci_devclass;
88 
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91 
92 static const char *
93 xhci_pci_match(device_t self)
94 {
95 	uint32_t device_id = pci_get_devid(self);
96 
97 	switch (device_id) {
98 	case 0x01941033:
99 		return ("NEC uPD720200 USB 3.0 controller");
100 
101 	case 0x10001b73:
102 		return ("Fresco Logic FL1000G USB 3.0 controller");
103 
104 	case 0x10421b21:
105 		return ("ASMedia ASM1042 USB 3.0 controller");
106 	case 0x11421b21:
107 		return ("ASMedia ASM1042A USB 3.0 controller");
108 
109 	case 0x0f358086:
110 		return ("Intel BayTrail USB 3.0 controller");
111 	case 0x9c318086:
112 	case 0x1e318086:
113 		return ("Intel Panther Point USB 3.0 controller");
114 	case 0x8c318086:
115 		return ("Intel Lynx Point USB 3.0 controller");
116 	case 0x8cb18086:
117 		return ("Intel Wildcat Point USB 3.0 controller");
118 
119 	case 0xa01b177d:
120 		return ("Cavium ThunderX USB 3.0 controller");
121 
122 	default:
123 		break;
124 	}
125 
126 	if ((pci_get_class(self) == PCIC_SERIALBUS)
127 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
128 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
129 		return ("XHCI (generic) USB 3.0 controller");
130 	}
131 	return (NULL);			/* dunno */
132 }
133 
134 static int
135 xhci_pci_probe(device_t self)
136 {
137 	const char *desc = xhci_pci_match(self);
138 
139 	if (desc) {
140 		device_set_desc(self, desc);
141 		return (BUS_PROBE_DEFAULT);
142 	} else {
143 		return (ENXIO);
144 	}
145 }
146 
147 static int xhci_use_msi = 1;
148 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
149 
150 static void
151 xhci_interrupt_poll(void *_sc)
152 {
153 	struct xhci_softc *sc = _sc;
154 	USB_BUS_UNLOCK(&sc->sc_bus);
155 	xhci_interrupt(sc);
156 	USB_BUS_LOCK(&sc->sc_bus);
157 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
158 }
159 
160 static int
161 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
162 {
163 	uint32_t temp;
164 	uint32_t usb3_mask;
165 	uint32_t usb2_mask;
166 
167 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
168 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
169 
170 	temp |= set;
171 	temp &= ~clear;
172 
173 	/* Don't set bits which the hardware doesn't support */
174 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
175 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
176 
177 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
178 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
179 
180 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
181 
182 	return (0);
183 }
184 
185 static int
186 xhci_pci_attach(device_t self)
187 {
188 	struct xhci_softc *sc = device_get_softc(self);
189 	int count, err, rid;
190 	uint8_t usemsi = 1;
191 	uint8_t usedma32 = 0;
192 
193 	rid = PCI_XHCI_CBMEM;
194 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
195 	    RF_ACTIVE);
196 	if (!sc->sc_io_res) {
197 		device_printf(self, "Could not map memory\n");
198 		return (ENOMEM);
199 	}
200 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
201 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
202 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
203 
204 	switch (pci_get_devid(self)) {
205 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
206 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
207 		/* Don't use 64-bit DMA on these controllers. */
208 		usedma32 = 1;
209 		break;
210 	case 0x10001b73:	/* FL1000G */
211 		/* Fresco Logic host doesn't support MSI. */
212 		usemsi = 0;
213 		break;
214 	case 0x0f358086:	/* BayTrail */
215 	case 0x9c318086:	/* Panther Point */
216 	case 0x1e318086:	/* Panther Point */
217 	case 0x8c318086:	/* Lynx Point */
218 	case 0x8cb18086:	/* Wildcat Point */
219 		/*
220 		 * On Intel chipsets, reroute ports from EHCI to XHCI
221 		 * controller and use a different IMOD value.
222 		 */
223 		sc->sc_port_route = &xhci_pci_port_route;
224 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
225 		break;
226 	}
227 
228 	if (xhci_init(sc, self, usedma32)) {
229 		device_printf(self, "Could not initialize softc\n");
230 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
231 		    sc->sc_io_res);
232 		return (ENXIO);
233 	}
234 
235 	pci_enable_busmaster(self);
236 
237 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
238 
239 	rid = 0;
240 	if (xhci_use_msi && usemsi) {
241 		count = 1;
242 		if (pci_alloc_msi(self, &count) == 0) {
243 			if (bootverbose)
244 				device_printf(self, "MSI enabled\n");
245 			rid = 1;
246 		}
247 	}
248 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
249 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
250 	if (sc->sc_irq_res == NULL) {
251 		pci_release_msi(self);
252 		device_printf(self, "Could not allocate IRQ\n");
253 		/* goto error; FALLTHROUGH - use polling */
254 	}
255 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
256 	if (sc->sc_bus.bdev == NULL) {
257 		device_printf(self, "Could not add USB device\n");
258 		goto error;
259 	}
260 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
261 
262 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
263 
264 	if (sc->sc_irq_res != NULL) {
265 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
266 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
267 		if (err != 0) {
268 			bus_release_resource(self, SYS_RES_IRQ,
269 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
270 			sc->sc_irq_res = NULL;
271 			pci_release_msi(self);
272 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
273 			sc->sc_intr_hdl = NULL;
274 		}
275 	}
276 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
277 		if (xhci_use_polling() != 0) {
278 			device_printf(self, "Interrupt polling at %dHz\n", hz);
279 			USB_BUS_LOCK(&sc->sc_bus);
280 			xhci_interrupt_poll(sc);
281 			USB_BUS_UNLOCK(&sc->sc_bus);
282 		} else
283 			goto error;
284 	}
285 
286 	xhci_pci_take_controller(self);
287 
288 	err = xhci_halt_controller(sc);
289 
290 	if (err == 0)
291 		err = xhci_start_controller(sc);
292 
293 	if (err == 0)
294 		err = device_probe_and_attach(sc->sc_bus.bdev);
295 
296 	if (err) {
297 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
298 		goto error;
299 	}
300 	return (0);
301 
302 error:
303 	xhci_pci_detach(self);
304 	return (ENXIO);
305 }
306 
307 static int
308 xhci_pci_detach(device_t self)
309 {
310 	struct xhci_softc *sc = device_get_softc(self);
311 	device_t bdev;
312 
313 	if (sc->sc_bus.bdev != NULL) {
314 		bdev = sc->sc_bus.bdev;
315 		device_detach(bdev);
316 		device_delete_child(self, bdev);
317 	}
318 	/* during module unload there are lots of children leftover */
319 	device_delete_children(self);
320 
321 	usb_callout_drain(&sc->sc_callout);
322 	xhci_halt_controller(sc);
323 
324 	pci_disable_busmaster(self);
325 
326 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
327 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
328 		sc->sc_intr_hdl = NULL;
329 	}
330 	if (sc->sc_irq_res) {
331 		bus_release_resource(self, SYS_RES_IRQ,
332 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
333 		sc->sc_irq_res = NULL;
334 		pci_release_msi(self);
335 	}
336 	if (sc->sc_io_res) {
337 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
338 		    sc->sc_io_res);
339 		sc->sc_io_res = NULL;
340 	}
341 
342 	xhci_uninit(sc);
343 
344 	return (0);
345 }
346 
347 static int
348 xhci_pci_take_controller(device_t self)
349 {
350 	struct xhci_softc *sc = device_get_softc(self);
351 	uint32_t cparams;
352 	uint32_t eecp;
353 	uint32_t eec;
354 	uint16_t to;
355 	uint8_t bios_sem;
356 
357 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
358 
359 	eec = -1;
360 
361 	/* Synchronise with the BIOS if it owns the controller. */
362 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
363 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
364 		eec = XREAD4(sc, capa, eecp);
365 
366 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
367 			continue;
368 		bios_sem = XREAD1(sc, capa, eecp +
369 		    XHCI_XECP_BIOS_SEM);
370 		if (bios_sem == 0)
371 			continue;
372 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
373 		    "to give up control\n");
374 		XWRITE1(sc, capa, eecp +
375 		    XHCI_XECP_OS_SEM, 1);
376 		to = 500;
377 		while (1) {
378 			bios_sem = XREAD1(sc, capa, eecp +
379 			    XHCI_XECP_BIOS_SEM);
380 			if (bios_sem == 0)
381 				break;
382 
383 			if (--to == 0) {
384 				device_printf(sc->sc_bus.bdev,
385 				    "timed out waiting for BIOS\n");
386 				break;
387 			}
388 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
389 		}
390 	}
391 	return (0);
392 }
393