1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/stdint.h> 32 #include <sys/stddef.h> 33 #include <sys/param.h> 34 #include <sys/queue.h> 35 #include <sys/types.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/condvar.h> 43 #include <sys/sysctl.h> 44 #include <sys/sx.h> 45 #include <sys/unistd.h> 46 #include <sys/callout.h> 47 #include <sys/malloc.h> 48 #include <sys/priv.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 53 #include <dev/usb/usb_core.h> 54 #include <dev/usb/usb_busdma.h> 55 #include <dev/usb/usb_process.h> 56 #include <dev/usb/usb_util.h> 57 58 #include <dev/usb/usb_controller.h> 59 #include <dev/usb/usb_bus.h> 60 #include <dev/usb/usb_pci.h> 61 #include <dev/usb/controller/xhci.h> 62 #include <dev/usb/controller/xhcireg.h> 63 #include "usb_if.h" 64 65 static device_probe_t xhci_pci_probe; 66 static device_attach_t xhci_pci_attach; 67 static device_detach_t xhci_pci_detach; 68 static usb_take_controller_t xhci_pci_take_controller; 69 70 static device_method_t xhci_device_methods[] = { 71 /* device interface */ 72 DEVMETHOD(device_probe, xhci_pci_probe), 73 DEVMETHOD(device_attach, xhci_pci_attach), 74 DEVMETHOD(device_detach, xhci_pci_detach), 75 DEVMETHOD(device_suspend, bus_generic_suspend), 76 DEVMETHOD(device_resume, bus_generic_resume), 77 DEVMETHOD(device_shutdown, bus_generic_shutdown), 78 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t xhci_driver = { 84 .name = "xhci", 85 .methods = xhci_device_methods, 86 .size = sizeof(struct xhci_softc), 87 }; 88 89 static devclass_t xhci_devclass; 90 91 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 92 MODULE_DEPEND(xhci, usb, 1, 1, 1); 93 94 static const char * 95 xhci_pci_match(device_t self) 96 { 97 uint32_t device_id = pci_get_devid(self); 98 99 switch (device_id) { 100 case 0x145c1022: 101 return ("AMD KERNCZ USB 3.0 controller"); 102 case 0x43ba1022: 103 return ("AMD X399 USB 3.0 controller"); 104 case 0x43bb1022: 105 return ("AMD 300 Series USB 3.0 controller"); 106 case 0x78141022: 107 return ("AMD FCH USB 3.0 controller"); 108 109 case 0x01941033: 110 return ("NEC uPD720200 USB 3.0 controller"); 111 case 0x00151912: 112 return ("NEC uPD720202 USB 3.0 controller"); 113 114 case 0x10001b73: 115 return ("Fresco Logic FL1000G USB 3.0 controller"); 116 117 case 0x10421b21: 118 return ("ASMedia ASM1042 USB 3.0 controller"); 119 case 0x11421b21: 120 return ("ASMedia ASM1042A USB 3.0 controller"); 121 122 case 0x0f358086: 123 return ("Intel BayTrail USB 3.0 controller"); 124 case 0x19d08086: 125 return ("Intel Denverton USB 3.0 controller"); 126 case 0x9c318086: 127 case 0x1e318086: 128 return ("Intel Panther Point USB 3.0 controller"); 129 case 0x22b58086: 130 return ("Intel Braswell USB 3.0 controller"); 131 case 0x5aa88086: 132 return ("Intel Apollo Lake USB 3.0 controller"); 133 case 0x8c318086: 134 return ("Intel Lynx Point USB 3.0 controller"); 135 case 0x8cb18086: 136 return ("Intel Wildcat Point USB 3.0 controller"); 137 case 0x8d318086: 138 return ("Intel Wellsburg USB 3.0 controller"); 139 case 0x9cb18086: 140 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 141 case 0x9d2f8086: 142 return ("Intel Sunrise Point-LP USB 3.0 controller"); 143 case 0xa12f8086: 144 return ("Intel Sunrise Point USB 3.0 controller"); 145 case 0xa1af8086: 146 return ("Intel Lewisburg USB 3.0 controller"); 147 case 0xa2af8086: 148 return ("Intel Union Point USB 3.0 controller"); 149 150 case 0xa01b177d: 151 return ("Cavium ThunderX USB 3.0 controller"); 152 153 default: 154 break; 155 } 156 157 if ((pci_get_class(self) == PCIC_SERIALBUS) 158 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 159 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 160 return ("XHCI (generic) USB 3.0 controller"); 161 } 162 return (NULL); /* dunno */ 163 } 164 165 static int 166 xhci_pci_probe(device_t self) 167 { 168 const char *desc = xhci_pci_match(self); 169 170 if (desc) { 171 device_set_desc(self, desc); 172 return (BUS_PROBE_DEFAULT); 173 } else { 174 return (ENXIO); 175 } 176 } 177 178 static int xhci_use_msi = 1; 179 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 180 static int xhci_use_msix = 1; 181 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 182 183 static void 184 xhci_interrupt_poll(void *_sc) 185 { 186 struct xhci_softc *sc = _sc; 187 USB_BUS_UNLOCK(&sc->sc_bus); 188 xhci_interrupt(sc); 189 USB_BUS_LOCK(&sc->sc_bus); 190 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 191 } 192 193 static int 194 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 195 { 196 uint32_t temp; 197 uint32_t usb3_mask; 198 uint32_t usb2_mask; 199 200 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 201 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 202 203 temp |= set; 204 temp &= ~clear; 205 206 /* Don't set bits which the hardware doesn't support */ 207 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 208 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 209 210 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 211 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 212 213 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 214 215 return (0); 216 } 217 218 static int 219 xhci_pci_attach(device_t self) 220 { 221 struct xhci_softc *sc = device_get_softc(self); 222 int count, err, msix_table, rid; 223 uint8_t usemsi = 1; 224 uint8_t usedma32 = 0; 225 226 rid = PCI_XHCI_CBMEM; 227 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 228 RF_ACTIVE); 229 if (!sc->sc_io_res) { 230 device_printf(self, "Could not map memory\n"); 231 return (ENOMEM); 232 } 233 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 234 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 235 sc->sc_io_size = rman_get_size(sc->sc_io_res); 236 237 switch (pci_get_devid(self)) { 238 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 239 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 240 /* Don't use 64-bit DMA on these controllers. */ 241 usedma32 = 1; 242 break; 243 case 0x10001b73: /* FL1000G */ 244 /* Fresco Logic host doesn't support MSI. */ 245 usemsi = 0; 246 break; 247 case 0x0f358086: /* BayTrail */ 248 case 0x9c318086: /* Panther Point */ 249 case 0x1e318086: /* Panther Point */ 250 case 0x8c318086: /* Lynx Point */ 251 case 0x8cb18086: /* Wildcat Point */ 252 case 0x9cb18086: /* Broadwell Mobile Integrated */ 253 /* 254 * On Intel chipsets, reroute ports from EHCI to XHCI 255 * controller and use a different IMOD value. 256 */ 257 sc->sc_port_route = &xhci_pci_port_route; 258 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 259 sc->sc_ctlstep = 1; 260 break; 261 } 262 263 if (xhci_init(sc, self, usedma32)) { 264 device_printf(self, "Could not initialize softc\n"); 265 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 266 sc->sc_io_res); 267 return (ENXIO); 268 } 269 270 pci_enable_busmaster(self); 271 272 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 273 274 rid = 0; 275 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 276 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 277 &msix_table, RF_ACTIVE); 278 if (sc->sc_msix_res == NULL) { 279 /* May not be enabled */ 280 device_printf(self, 281 "Unable to map MSI-X table \n"); 282 } else { 283 count = 1; 284 if (pci_alloc_msix(self, &count) == 0) { 285 if (bootverbose) 286 device_printf(self, "MSI-X enabled\n"); 287 rid = 1; 288 } else { 289 bus_release_resource(self, SYS_RES_MEMORY, 290 msix_table, sc->sc_msix_res); 291 sc->sc_msix_res = NULL; 292 } 293 } 294 } 295 if (rid == 0 && xhci_use_msi && usemsi) { 296 count = 1; 297 if (pci_alloc_msi(self, &count) == 0) { 298 if (bootverbose) 299 device_printf(self, "MSI enabled\n"); 300 rid = 1; 301 } 302 } 303 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 304 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 305 if (sc->sc_irq_res == NULL) { 306 pci_release_msi(self); 307 device_printf(self, "Could not allocate IRQ\n"); 308 /* goto error; FALLTHROUGH - use polling */ 309 } 310 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 311 if (sc->sc_bus.bdev == NULL) { 312 device_printf(self, "Could not add USB device\n"); 313 goto error; 314 } 315 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 316 317 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 318 319 if (sc->sc_irq_res != NULL) { 320 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 321 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 322 if (err != 0) { 323 bus_release_resource(self, SYS_RES_IRQ, 324 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 325 sc->sc_irq_res = NULL; 326 pci_release_msi(self); 327 device_printf(self, "Could not setup IRQ, err=%d\n", err); 328 sc->sc_intr_hdl = NULL; 329 } 330 } 331 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 332 if (xhci_use_polling() != 0) { 333 device_printf(self, "Interrupt polling at %dHz\n", hz); 334 USB_BUS_LOCK(&sc->sc_bus); 335 xhci_interrupt_poll(sc); 336 USB_BUS_UNLOCK(&sc->sc_bus); 337 } else 338 goto error; 339 } 340 341 xhci_pci_take_controller(self); 342 343 err = xhci_halt_controller(sc); 344 345 if (err == 0) 346 err = xhci_start_controller(sc); 347 348 if (err == 0) 349 err = device_probe_and_attach(sc->sc_bus.bdev); 350 351 if (err) { 352 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 353 goto error; 354 } 355 return (0); 356 357 error: 358 xhci_pci_detach(self); 359 return (ENXIO); 360 } 361 362 static int 363 xhci_pci_detach(device_t self) 364 { 365 struct xhci_softc *sc = device_get_softc(self); 366 367 /* during module unload there are lots of children leftover */ 368 device_delete_children(self); 369 370 usb_callout_drain(&sc->sc_callout); 371 xhci_halt_controller(sc); 372 xhci_reset_controller(sc); 373 374 pci_disable_busmaster(self); 375 376 if (sc->sc_irq_res && sc->sc_intr_hdl) { 377 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 378 sc->sc_intr_hdl = NULL; 379 } 380 if (sc->sc_irq_res) { 381 bus_release_resource(self, SYS_RES_IRQ, 382 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 383 sc->sc_irq_res = NULL; 384 pci_release_msi(self); 385 } 386 if (sc->sc_io_res) { 387 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 388 sc->sc_io_res); 389 sc->sc_io_res = NULL; 390 } 391 if (sc->sc_msix_res) { 392 bus_release_resource(self, SYS_RES_MEMORY, 393 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 394 sc->sc_msix_res = NULL; 395 } 396 397 xhci_uninit(sc); 398 399 return (0); 400 } 401 402 static int 403 xhci_pci_take_controller(device_t self) 404 { 405 struct xhci_softc *sc = device_get_softc(self); 406 uint32_t cparams; 407 uint32_t eecp; 408 uint32_t eec; 409 uint16_t to; 410 uint8_t bios_sem; 411 412 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 413 414 eec = -1; 415 416 /* Synchronise with the BIOS if it owns the controller. */ 417 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 418 eecp += XHCI_XECP_NEXT(eec) << 2) { 419 eec = XREAD4(sc, capa, eecp); 420 421 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 422 continue; 423 bios_sem = XREAD1(sc, capa, eecp + 424 XHCI_XECP_BIOS_SEM); 425 if (bios_sem == 0) 426 continue; 427 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 428 "to give up control\n"); 429 XWRITE1(sc, capa, eecp + 430 XHCI_XECP_OS_SEM, 1); 431 to = 500; 432 while (1) { 433 bios_sem = XREAD1(sc, capa, eecp + 434 XHCI_XECP_BIOS_SEM); 435 if (bios_sem == 0) 436 break; 437 438 if (--to == 0) { 439 device_printf(sc->sc_bus.bdev, 440 "timed out waiting for BIOS\n"); 441 break; 442 } 443 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 444 } 445 } 446 return (0); 447 } 448