1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 static const char * 93 xhci_pci_match(device_t self) 94 { 95 uint32_t device_id = pci_get_devid(self); 96 97 switch (device_id) { 98 case 0x01941033: 99 return ("NEC uPD720200 USB 3.0 controller"); 100 101 case 0x10001b73: 102 return ("Fresco Logic FL1000G USB 3.0 controller"); 103 104 case 0x10421b21: 105 return ("ASMedia ASM1042 USB 3.0 controller"); 106 case 0x11421b21: 107 return ("ASMedia ASM1042A USB 3.0 controller"); 108 109 case 0x0f358086: 110 return ("Intel BayTrail USB 3.0 controller"); 111 case 0x9c318086: 112 case 0x1e318086: 113 return ("Intel Panther Point USB 3.0 controller"); 114 case 0x8c318086: 115 return ("Intel Lynx Point USB 3.0 controller"); 116 case 0x8cb18086: 117 return ("Intel Wildcat Point USB 3.0 controller"); 118 case 0x9cb18086: 119 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 120 121 case 0xa01b177d: 122 return ("Cavium ThunderX USB 3.0 controller"); 123 124 default: 125 break; 126 } 127 128 if ((pci_get_class(self) == PCIC_SERIALBUS) 129 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 130 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 131 return ("XHCI (generic) USB 3.0 controller"); 132 } 133 return (NULL); /* dunno */ 134 } 135 136 static int 137 xhci_pci_probe(device_t self) 138 { 139 const char *desc = xhci_pci_match(self); 140 141 if (desc) { 142 device_set_desc(self, desc); 143 return (BUS_PROBE_DEFAULT); 144 } else { 145 return (ENXIO); 146 } 147 } 148 149 static int xhci_use_msi = 1; 150 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 151 152 static void 153 xhci_interrupt_poll(void *_sc) 154 { 155 struct xhci_softc *sc = _sc; 156 USB_BUS_UNLOCK(&sc->sc_bus); 157 xhci_interrupt(sc); 158 USB_BUS_LOCK(&sc->sc_bus); 159 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 160 } 161 162 static int 163 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 164 { 165 uint32_t temp; 166 uint32_t usb3_mask; 167 uint32_t usb2_mask; 168 169 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 170 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 171 172 temp |= set; 173 temp &= ~clear; 174 175 /* Don't set bits which the hardware doesn't support */ 176 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 177 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 178 179 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 180 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 181 182 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 183 184 return (0); 185 } 186 187 static int 188 xhci_pci_attach(device_t self) 189 { 190 struct xhci_softc *sc = device_get_softc(self); 191 int count, err, rid; 192 uint8_t usemsi = 1; 193 uint8_t usedma32 = 0; 194 195 rid = PCI_XHCI_CBMEM; 196 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 197 RF_ACTIVE); 198 if (!sc->sc_io_res) { 199 device_printf(self, "Could not map memory\n"); 200 return (ENOMEM); 201 } 202 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 203 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 204 sc->sc_io_size = rman_get_size(sc->sc_io_res); 205 206 switch (pci_get_devid(self)) { 207 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 208 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 209 /* Don't use 64-bit DMA on these controllers. */ 210 usedma32 = 1; 211 break; 212 case 0x10001b73: /* FL1000G */ 213 /* Fresco Logic host doesn't support MSI. */ 214 usemsi = 0; 215 break; 216 case 0x0f358086: /* BayTrail */ 217 case 0x9c318086: /* Panther Point */ 218 case 0x1e318086: /* Panther Point */ 219 case 0x8c318086: /* Lynx Point */ 220 case 0x8cb18086: /* Wildcat Point */ 221 case 0x9cb18086: /* Broadwell Mobile Integrated */ 222 /* 223 * On Intel chipsets, reroute ports from EHCI to XHCI 224 * controller and use a different IMOD value. 225 */ 226 sc->sc_port_route = &xhci_pci_port_route; 227 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 228 break; 229 } 230 231 if (xhci_init(sc, self, usedma32)) { 232 device_printf(self, "Could not initialize softc\n"); 233 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 234 sc->sc_io_res); 235 return (ENXIO); 236 } 237 238 pci_enable_busmaster(self); 239 240 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 241 242 rid = 0; 243 if (xhci_use_msi && usemsi) { 244 count = 1; 245 if (pci_alloc_msi(self, &count) == 0) { 246 if (bootverbose) 247 device_printf(self, "MSI enabled\n"); 248 rid = 1; 249 } 250 } 251 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 252 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 253 if (sc->sc_irq_res == NULL) { 254 pci_release_msi(self); 255 device_printf(self, "Could not allocate IRQ\n"); 256 /* goto error; FALLTHROUGH - use polling */ 257 } 258 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 259 if (sc->sc_bus.bdev == NULL) { 260 device_printf(self, "Could not add USB device\n"); 261 goto error; 262 } 263 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 264 265 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 266 267 if (sc->sc_irq_res != NULL) { 268 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 269 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 270 if (err != 0) { 271 bus_release_resource(self, SYS_RES_IRQ, 272 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 273 sc->sc_irq_res = NULL; 274 pci_release_msi(self); 275 device_printf(self, "Could not setup IRQ, err=%d\n", err); 276 sc->sc_intr_hdl = NULL; 277 } 278 } 279 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 280 if (xhci_use_polling() != 0) { 281 device_printf(self, "Interrupt polling at %dHz\n", hz); 282 USB_BUS_LOCK(&sc->sc_bus); 283 xhci_interrupt_poll(sc); 284 USB_BUS_UNLOCK(&sc->sc_bus); 285 } else 286 goto error; 287 } 288 289 xhci_pci_take_controller(self); 290 291 err = xhci_halt_controller(sc); 292 293 if (err == 0) 294 err = xhci_start_controller(sc); 295 296 if (err == 0) 297 err = device_probe_and_attach(sc->sc_bus.bdev); 298 299 if (err) { 300 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 301 goto error; 302 } 303 return (0); 304 305 error: 306 xhci_pci_detach(self); 307 return (ENXIO); 308 } 309 310 static int 311 xhci_pci_detach(device_t self) 312 { 313 struct xhci_softc *sc = device_get_softc(self); 314 device_t bdev; 315 316 if (sc->sc_bus.bdev != NULL) { 317 bdev = sc->sc_bus.bdev; 318 device_detach(bdev); 319 device_delete_child(self, bdev); 320 } 321 /* during module unload there are lots of children leftover */ 322 device_delete_children(self); 323 324 usb_callout_drain(&sc->sc_callout); 325 xhci_halt_controller(sc); 326 327 pci_disable_busmaster(self); 328 329 if (sc->sc_irq_res && sc->sc_intr_hdl) { 330 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 331 sc->sc_intr_hdl = NULL; 332 } 333 if (sc->sc_irq_res) { 334 bus_release_resource(self, SYS_RES_IRQ, 335 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 336 sc->sc_irq_res = NULL; 337 pci_release_msi(self); 338 } 339 if (sc->sc_io_res) { 340 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 341 sc->sc_io_res); 342 sc->sc_io_res = NULL; 343 } 344 345 xhci_uninit(sc); 346 347 return (0); 348 } 349 350 static int 351 xhci_pci_take_controller(device_t self) 352 { 353 struct xhci_softc *sc = device_get_softc(self); 354 uint32_t cparams; 355 uint32_t eecp; 356 uint32_t eec; 357 uint16_t to; 358 uint8_t bios_sem; 359 360 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 361 362 eec = -1; 363 364 /* Synchronise with the BIOS if it owns the controller. */ 365 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 366 eecp += XHCI_XECP_NEXT(eec) << 2) { 367 eec = XREAD4(sc, capa, eecp); 368 369 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 370 continue; 371 bios_sem = XREAD1(sc, capa, eecp + 372 XHCI_XECP_BIOS_SEM); 373 if (bios_sem == 0) 374 continue; 375 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 376 "to give up control\n"); 377 XWRITE1(sc, capa, eecp + 378 XHCI_XECP_OS_SEM, 1); 379 to = 500; 380 while (1) { 381 bios_sem = XREAD1(sc, capa, eecp + 382 XHCI_XECP_BIOS_SEM); 383 if (bios_sem == 0) 384 break; 385 386 if (--to == 0) { 387 device_printf(sc->sc_bus.bdev, 388 "timed out waiting for BIOS\n"); 389 break; 390 } 391 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 392 } 393 } 394 return (0); 395 } 396