1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 93 static const char * 94 xhci_pci_match(device_t self) 95 { 96 uint32_t device_id = pci_get_devid(self); 97 98 switch (device_id) { 99 case 0x01941033: 100 return ("NEC uPD720200 USB 3.0 controller"); 101 102 case 0x10421b21: 103 return ("ASMedia ASM1042 USB 3.0 controller"); 104 105 case 0x9c318086: 106 case 0x1e318086: 107 return ("Intel Panther Point USB 3.0 controller"); 108 case 0x8c318086: 109 return ("Intel Lynx Point USB 3.0 controller"); 110 111 default: 112 break; 113 } 114 115 if ((pci_get_class(self) == PCIC_SERIALBUS) 116 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 117 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 118 return ("XHCI (generic) USB 3.0 controller"); 119 } 120 return (NULL); /* dunno */ 121 } 122 123 static int 124 xhci_pci_probe(device_t self) 125 { 126 const char *desc = xhci_pci_match(self); 127 128 if (desc) { 129 device_set_desc(self, desc); 130 return (0); 131 } else { 132 return (ENXIO); 133 } 134 } 135 136 static int xhci_use_msi = 1; 137 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 138 139 static void 140 xhci_interrupt_poll(void *_sc) 141 { 142 struct xhci_softc *sc = _sc; 143 USB_BUS_UNLOCK(&sc->sc_bus); 144 xhci_interrupt(sc); 145 USB_BUS_LOCK(&sc->sc_bus); 146 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 147 } 148 149 static int 150 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 151 { 152 uint32_t temp; 153 154 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 155 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 156 157 temp |= set; 158 temp &= ~clear; 159 160 /* Don't set bits which the hardware doesn't support */ 161 temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 162 163 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); 164 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); 165 166 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 167 168 return (0); 169 } 170 171 static int 172 xhci_pci_attach(device_t self) 173 { 174 struct xhci_softc *sc = device_get_softc(self); 175 int count, err, rid; 176 177 /* XXX check for 64-bit capability */ 178 179 if (xhci_init(sc, self)) { 180 device_printf(self, "Could not initialize softc\n"); 181 goto error; 182 } 183 184 pci_enable_busmaster(self); 185 186 rid = PCI_XHCI_CBMEM; 187 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 188 RF_ACTIVE); 189 if (!sc->sc_io_res) { 190 device_printf(self, "Could not map memory\n"); 191 goto error; 192 } 193 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 194 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 195 sc->sc_io_size = rman_get_size(sc->sc_io_res); 196 197 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 198 199 sc->sc_irq_rid = 0; 200 if (xhci_use_msi) { 201 count = pci_msi_count(self); 202 if (count >= 1) { 203 count = 1; 204 if (pci_alloc_msi(self, &count) == 0) { 205 if (bootverbose) 206 device_printf(self, "MSI enabled\n"); 207 sc->sc_irq_rid = 1; 208 } 209 } 210 } 211 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, 212 &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE); 213 if (sc->sc_irq_res == NULL) { 214 device_printf(self, "Could not allocate IRQ\n"); 215 /* goto error; FALLTHROUGH - use polling */ 216 } 217 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 218 if (sc->sc_bus.bdev == NULL) { 219 device_printf(self, "Could not add USB device\n"); 220 goto error; 221 } 222 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 223 224 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 225 226 if (sc->sc_irq_res != NULL) { 227 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 228 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 229 if (err != 0) { 230 device_printf(self, "Could not setup IRQ, err=%d\n", err); 231 sc->sc_intr_hdl = NULL; 232 } 233 } 234 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL || 235 xhci_use_polling() != 0) { 236 device_printf(self, "Interrupt polling at %dHz\n", hz); 237 USB_BUS_LOCK(&sc->sc_bus); 238 xhci_interrupt_poll(sc); 239 USB_BUS_UNLOCK(&sc->sc_bus); 240 } 241 242 /* On Intel chipsets reroute ports from EHCI to XHCI controller. */ 243 switch (pci_get_devid(self)) { 244 case 0x9c318086: /* Panther Point */ 245 case 0x1e318086: /* Panther Point */ 246 case 0x8c318086: /* Lynx Point */ 247 sc->sc_port_route = &xhci_pci_port_route; 248 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 249 break; 250 default: 251 break; 252 } 253 254 xhci_pci_take_controller(self); 255 256 err = xhci_halt_controller(sc); 257 258 if (err == 0) 259 err = xhci_start_controller(sc); 260 261 if (err == 0) 262 err = device_probe_and_attach(sc->sc_bus.bdev); 263 264 if (err) { 265 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 266 goto error; 267 } 268 return (0); 269 270 error: 271 xhci_pci_detach(self); 272 return (ENXIO); 273 } 274 275 static int 276 xhci_pci_detach(device_t self) 277 { 278 struct xhci_softc *sc = device_get_softc(self); 279 device_t bdev; 280 281 if (sc->sc_bus.bdev != NULL) { 282 bdev = sc->sc_bus.bdev; 283 device_detach(bdev); 284 device_delete_child(self, bdev); 285 } 286 /* during module unload there are lots of children leftover */ 287 device_delete_children(self); 288 289 if (sc->sc_io_res) { 290 usb_callout_drain(&sc->sc_callout); 291 xhci_halt_controller(sc); 292 } 293 294 pci_disable_busmaster(self); 295 296 if (sc->sc_irq_res && sc->sc_intr_hdl) { 297 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 298 sc->sc_intr_hdl = NULL; 299 } 300 if (sc->sc_irq_res) { 301 if (sc->sc_irq_rid == 1) 302 pci_release_msi(self); 303 bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid, 304 sc->sc_irq_res); 305 sc->sc_irq_res = NULL; 306 } 307 if (sc->sc_io_res) { 308 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 309 sc->sc_io_res); 310 sc->sc_io_res = NULL; 311 } 312 313 xhci_uninit(sc); 314 315 return (0); 316 } 317 318 static int 319 xhci_pci_take_controller(device_t self) 320 { 321 struct xhci_softc *sc = device_get_softc(self); 322 uint32_t cparams; 323 uint32_t eecp; 324 uint32_t eec; 325 uint16_t to; 326 uint8_t bios_sem; 327 328 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 329 330 eec = -1; 331 332 /* Synchronise with the BIOS if it owns the controller. */ 333 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 334 eecp += XHCI_XECP_NEXT(eec) << 2) { 335 eec = XREAD4(sc, capa, eecp); 336 337 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 338 continue; 339 bios_sem = XREAD1(sc, capa, eecp + 340 XHCI_XECP_BIOS_SEM); 341 if (bios_sem == 0) 342 continue; 343 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 344 "to give up control\n"); 345 XWRITE1(sc, capa, eecp + 346 XHCI_XECP_OS_SEM, 1); 347 to = 500; 348 while (1) { 349 bios_sem = XREAD1(sc, capa, eecp + 350 XHCI_XECP_BIOS_SEM); 351 if (bios_sem == 0) 352 break; 353 354 if (--to == 0) { 355 device_printf(sc->sc_bus.bdev, 356 "timed out waiting for BIOS\n"); 357 break; 358 } 359 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 360 } 361 } 362 return (0); 363 } 364