xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 3fe401a500cdfc73d8c066da3c577c4b9f0aa953)
1 /*-
2  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55 
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62 
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67 
68 static device_method_t xhci_device_methods[] = {
69 	/* device interface */
70 	DEVMETHOD(device_probe, xhci_pci_probe),
71 	DEVMETHOD(device_attach, xhci_pci_attach),
72 	DEVMETHOD(device_detach, xhci_pci_detach),
73 	DEVMETHOD(device_suspend, bus_generic_suspend),
74 	DEVMETHOD(device_resume, bus_generic_resume),
75 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77 
78 	DEVMETHOD_END
79 };
80 
81 static driver_t xhci_driver = {
82 	.name = "xhci",
83 	.methods = xhci_device_methods,
84 	.size = sizeof(struct xhci_softc),
85 };
86 
87 static devclass_t xhci_devclass;
88 
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91 
92 static const char *
93 xhci_pci_match(device_t self)
94 {
95 	uint32_t device_id = pci_get_devid(self);
96 
97 	switch (device_id) {
98 	case 0x01941033:
99 		return ("NEC uPD720200 USB 3.0 controller");
100 
101 	case 0x10421b21:
102 		return ("ASMedia ASM1042 USB 3.0 controller");
103 	case 0x11421b21:
104 		return ("ASMedia ASM1042A USB 3.0 controller");
105 
106 	case 0x0f358086:
107 		return ("Intel Intel BayTrail USB 3.0 controller");
108 	case 0x9c318086:
109 	case 0x1e318086:
110 		return ("Intel Panther Point USB 3.0 controller");
111 	case 0x8c318086:
112 		return ("Intel Lynx Point USB 3.0 controller");
113 	case 0x8cb18086:
114 		return ("Intel Wildcat Point USB 3.0 controller");
115 
116 	default:
117 		break;
118 	}
119 
120 	if ((pci_get_class(self) == PCIC_SERIALBUS)
121 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
122 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
123 		return ("XHCI (generic) USB 3.0 controller");
124 	}
125 	return (NULL);			/* dunno */
126 }
127 
128 static int
129 xhci_pci_probe(device_t self)
130 {
131 	const char *desc = xhci_pci_match(self);
132 
133 	if (desc) {
134 		device_set_desc(self, desc);
135 		return (BUS_PROBE_DEFAULT);
136 	} else {
137 		return (ENXIO);
138 	}
139 }
140 
141 static int xhci_use_msi = 1;
142 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
143 
144 static void
145 xhci_interrupt_poll(void *_sc)
146 {
147 	struct xhci_softc *sc = _sc;
148 	USB_BUS_UNLOCK(&sc->sc_bus);
149 	xhci_interrupt(sc);
150 	USB_BUS_LOCK(&sc->sc_bus);
151 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
152 }
153 
154 static int
155 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
156 {
157 	uint32_t temp;
158 	uint32_t usb3_mask;
159 	uint32_t usb2_mask;
160 
161 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
162 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
163 
164 	temp |= set;
165 	temp &= ~clear;
166 
167 	/* Don't set bits which the hardware doesn't support */
168 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
169 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
170 
171 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
172 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
173 
174 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
175 
176 	return (0);
177 }
178 
179 static int
180 xhci_pci_attach(device_t self)
181 {
182 	struct xhci_softc *sc = device_get_softc(self);
183 	int count, err, rid;
184 	uint8_t usedma32;
185 
186 	rid = PCI_XHCI_CBMEM;
187 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
188 	    RF_ACTIVE);
189 	if (!sc->sc_io_res) {
190 		device_printf(self, "Could not map memory\n");
191 		return (ENOMEM);
192 	}
193 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
194 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
195 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
196 
197 	switch (pci_get_devid(self)) {
198 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
199 		/* Don't use 64-bit DMA on these controllers. */
200 		usedma32 = 1;
201 		break;
202 	case 0x0f358086:	/* BayTrail */
203 	case 0x9c318086:	/* Panther Point */
204 	case 0x1e318086:	/* Panther Point */
205 	case 0x8c318086:	/* Lynx Point */
206 	case 0x8cb18086:	/* Wildcat Point */
207 		/*
208 		 * On Intel chipsets, reroute ports from EHCI to XHCI
209 		 * controller and use a different IMOD value.
210 		 */
211 		sc->sc_port_route = &xhci_pci_port_route;
212 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
213 		/* FALLTHROUGH */
214 	default:
215 		usedma32 = 0;
216 		break;
217 	}
218 
219 	if (xhci_init(sc, self, usedma32)) {
220 		device_printf(self, "Could not initialize softc\n");
221 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
222 		    sc->sc_io_res);
223 		return (ENXIO);
224 	}
225 
226 	pci_enable_busmaster(self);
227 
228 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
229 
230 	rid = 0;
231 	if (xhci_use_msi) {
232 		count = 1;
233 		if (pci_alloc_msi(self, &count) == 0) {
234 			if (bootverbose)
235 				device_printf(self, "MSI enabled\n");
236 			rid = 1;
237 		}
238 	}
239 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
240 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
241 	if (sc->sc_irq_res == NULL) {
242 		pci_release_msi(self);
243 		device_printf(self, "Could not allocate IRQ\n");
244 		/* goto error; FALLTHROUGH - use polling */
245 	}
246 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
247 	if (sc->sc_bus.bdev == NULL) {
248 		device_printf(self, "Could not add USB device\n");
249 		goto error;
250 	}
251 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
252 
253 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
254 
255 	if (sc->sc_irq_res != NULL) {
256 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
257 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
258 		if (err != 0) {
259 			bus_release_resource(self, SYS_RES_IRQ,
260 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
261 			sc->sc_irq_res = NULL;
262 			pci_release_msi(self);
263 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
264 			sc->sc_intr_hdl = NULL;
265 		}
266 	}
267 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
268 		if (xhci_use_polling() != 0) {
269 			device_printf(self, "Interrupt polling at %dHz\n", hz);
270 			USB_BUS_LOCK(&sc->sc_bus);
271 			xhci_interrupt_poll(sc);
272 			USB_BUS_UNLOCK(&sc->sc_bus);
273 		} else
274 			goto error;
275 	}
276 
277 	xhci_pci_take_controller(self);
278 
279 	err = xhci_halt_controller(sc);
280 
281 	if (err == 0)
282 		err = xhci_start_controller(sc);
283 
284 	if (err == 0)
285 		err = device_probe_and_attach(sc->sc_bus.bdev);
286 
287 	if (err) {
288 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
289 		goto error;
290 	}
291 	return (0);
292 
293 error:
294 	xhci_pci_detach(self);
295 	return (ENXIO);
296 }
297 
298 static int
299 xhci_pci_detach(device_t self)
300 {
301 	struct xhci_softc *sc = device_get_softc(self);
302 	device_t bdev;
303 
304 	if (sc->sc_bus.bdev != NULL) {
305 		bdev = sc->sc_bus.bdev;
306 		device_detach(bdev);
307 		device_delete_child(self, bdev);
308 	}
309 	/* during module unload there are lots of children leftover */
310 	device_delete_children(self);
311 
312 	usb_callout_drain(&sc->sc_callout);
313 	xhci_halt_controller(sc);
314 
315 	pci_disable_busmaster(self);
316 
317 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
318 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
319 		sc->sc_intr_hdl = NULL;
320 	}
321 	if (sc->sc_irq_res) {
322 		bus_release_resource(self, SYS_RES_IRQ,
323 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
324 		sc->sc_irq_res = NULL;
325 		pci_release_msi(self);
326 	}
327 	if (sc->sc_io_res) {
328 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
329 		    sc->sc_io_res);
330 		sc->sc_io_res = NULL;
331 	}
332 
333 	xhci_uninit(sc);
334 
335 	return (0);
336 }
337 
338 static int
339 xhci_pci_take_controller(device_t self)
340 {
341 	struct xhci_softc *sc = device_get_softc(self);
342 	uint32_t cparams;
343 	uint32_t eecp;
344 	uint32_t eec;
345 	uint16_t to;
346 	uint8_t bios_sem;
347 
348 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
349 
350 	eec = -1;
351 
352 	/* Synchronise with the BIOS if it owns the controller. */
353 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
354 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
355 		eec = XREAD4(sc, capa, eecp);
356 
357 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
358 			continue;
359 		bios_sem = XREAD1(sc, capa, eecp +
360 		    XHCI_XECP_BIOS_SEM);
361 		if (bios_sem == 0)
362 			continue;
363 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
364 		    "to give up control\n");
365 		XWRITE1(sc, capa, eecp +
366 		    XHCI_XECP_OS_SEM, 1);
367 		to = 500;
368 		while (1) {
369 			bios_sem = XREAD1(sc, capa, eecp +
370 			    XHCI_XECP_BIOS_SEM);
371 			if (bios_sem == 0)
372 				break;
373 
374 			if (--to == 0) {
375 				device_printf(sc->sc_bus.bdev,
376 				    "timed out waiting for BIOS\n");
377 				break;
378 			}
379 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
380 		}
381 	}
382 	return (0);
383 }
384