1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 93 static const char * 94 xhci_pci_match(device_t self) 95 { 96 uint32_t device_id = pci_get_devid(self); 97 98 switch (device_id) { 99 case 0x01941033: 100 return ("NEC uPD720200 USB 3.0 controller"); 101 102 case 0x10421b21: 103 return ("ASMedia ASM1042 USB 3.0 controller"); 104 105 case 0x1e318086: 106 return ("Intel Panther Point USB 3.0 controller"); 107 case 0x8c318086: 108 return ("Intel Lynx Point USB 3.0 controller"); 109 110 default: 111 break; 112 } 113 114 if ((pci_get_class(self) == PCIC_SERIALBUS) 115 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 116 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 117 return ("XHCI (generic) USB 3.0 controller"); 118 } 119 return (NULL); /* dunno */ 120 } 121 122 static int 123 xhci_pci_probe(device_t self) 124 { 125 const char *desc = xhci_pci_match(self); 126 127 if (desc) { 128 device_set_desc(self, desc); 129 return (0); 130 } else { 131 return (ENXIO); 132 } 133 } 134 135 static void 136 xhci_interrupt_poll(void *_sc) 137 { 138 struct xhci_softc *sc = _sc; 139 USB_BUS_UNLOCK(&sc->sc_bus); 140 xhci_interrupt(sc); 141 USB_BUS_LOCK(&sc->sc_bus); 142 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 143 } 144 145 static int 146 xhci_pci_attach(device_t self) 147 { 148 struct xhci_softc *sc = device_get_softc(self); 149 int err; 150 int rid; 151 152 /* XXX check for 64-bit capability */ 153 154 if (xhci_init(sc, self)) { 155 device_printf(self, "Could not initialize softc\n"); 156 goto error; 157 } 158 159 pci_enable_busmaster(self); 160 161 rid = PCI_XHCI_CBMEM; 162 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 163 RF_ACTIVE); 164 if (!sc->sc_io_res) { 165 device_printf(self, "Could not map memory\n"); 166 goto error; 167 } 168 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 169 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 170 sc->sc_io_size = rman_get_size(sc->sc_io_res); 171 172 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 173 174 rid = 0; 175 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 176 RF_SHAREABLE | RF_ACTIVE); 177 if (sc->sc_irq_res == NULL) { 178 device_printf(self, "Could not allocate IRQ\n"); 179 } 180 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 181 if (sc->sc_bus.bdev == NULL) { 182 device_printf(self, "Could not add USB device\n"); 183 goto error; 184 } 185 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 186 187 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 188 189 if (sc->sc_irq_res != NULL) { 190 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 191 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 192 if (err != 0) { 193 device_printf(self, "Could not setup IRQ, err=%d\n", err); 194 sc->sc_intr_hdl = NULL; 195 } 196 } 197 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL || 198 xhci_use_polling() != 0) { 199 device_printf(self, "Interrupt polling at %dHz\n", hz); 200 USB_BUS_LOCK(&sc->sc_bus); 201 xhci_interrupt_poll(sc); 202 USB_BUS_UNLOCK(&sc->sc_bus); 203 } 204 205 xhci_pci_take_controller(self); 206 207 err = xhci_halt_controller(sc); 208 209 if (err == 0) 210 err = xhci_start_controller(sc); 211 212 if (err == 0) 213 err = device_probe_and_attach(sc->sc_bus.bdev); 214 215 if (err) { 216 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 217 goto error; 218 } 219 return (0); 220 221 error: 222 xhci_pci_detach(self); 223 return (ENXIO); 224 } 225 226 static int 227 xhci_pci_detach(device_t self) 228 { 229 struct xhci_softc *sc = device_get_softc(self); 230 device_t bdev; 231 232 if (sc->sc_bus.bdev != NULL) { 233 bdev = sc->sc_bus.bdev; 234 device_detach(bdev); 235 device_delete_child(self, bdev); 236 } 237 /* during module unload there are lots of children leftover */ 238 device_delete_children(self); 239 240 if (sc->sc_io_res) { 241 usb_callout_drain(&sc->sc_callout); 242 xhci_halt_controller(sc); 243 } 244 245 pci_disable_busmaster(self); 246 247 if (sc->sc_irq_res && sc->sc_intr_hdl) { 248 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 249 sc->sc_intr_hdl = NULL; 250 } 251 if (sc->sc_irq_res) { 252 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 253 sc->sc_irq_res = NULL; 254 } 255 if (sc->sc_io_res) { 256 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 257 sc->sc_io_res); 258 sc->sc_io_res = NULL; 259 } 260 261 xhci_uninit(sc); 262 263 return (0); 264 } 265 266 static int 267 xhci_pci_take_controller(device_t self) 268 { 269 struct xhci_softc *sc = device_get_softc(self); 270 uint32_t device_id = pci_get_devid(self); 271 uint32_t cparams; 272 uint32_t eecp; 273 uint32_t eec; 274 uint16_t to; 275 uint8_t bios_sem; 276 277 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 278 279 eec = -1; 280 281 /* Synchronise with the BIOS if it owns the controller. */ 282 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 283 eecp += XHCI_XECP_NEXT(eec) << 2) { 284 eec = XREAD4(sc, capa, eecp); 285 286 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 287 continue; 288 bios_sem = XREAD1(sc, capa, eecp + 289 XHCI_XECP_BIOS_SEM); 290 if (bios_sem == 0) 291 continue; 292 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 293 "to give up control\n"); 294 XWRITE1(sc, capa, eecp + 295 XHCI_XECP_OS_SEM, 1); 296 to = 500; 297 while (1) { 298 bios_sem = XREAD1(sc, capa, eecp + 299 XHCI_XECP_BIOS_SEM); 300 if (bios_sem == 0) 301 break; 302 303 if (--to == 0) { 304 device_printf(sc->sc_bus.bdev, 305 "timed out waiting for BIOS\n"); 306 break; 307 } 308 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 309 } 310 } 311 312 /* On Intel chipsets reroute ports from EHCI to XHCI controller. */ 313 if (device_id == 0x1e318086 /* Panther Point */ || 314 device_id == 0x8c318086 /* Lynx Point */) { 315 uint32_t temp = xhci_get_port_route(); 316 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); 317 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); 318 } 319 return (0); 320 } 321