xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision 264104f26834fdb27974e0c5fdedf8f2f5a90383)
1 /*-
2  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55 
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62 
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67 
68 static device_method_t xhci_device_methods[] = {
69 	/* device interface */
70 	DEVMETHOD(device_probe, xhci_pci_probe),
71 	DEVMETHOD(device_attach, xhci_pci_attach),
72 	DEVMETHOD(device_detach, xhci_pci_detach),
73 	DEVMETHOD(device_suspend, bus_generic_suspend),
74 	DEVMETHOD(device_resume, bus_generic_resume),
75 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77 
78 	DEVMETHOD_END
79 };
80 
81 static driver_t xhci_driver = {
82 	.name = "xhci",
83 	.methods = xhci_device_methods,
84 	.size = sizeof(struct xhci_softc),
85 };
86 
87 static devclass_t xhci_devclass;
88 
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91 
92 static const char *
93 xhci_pci_match(device_t self)
94 {
95 	uint32_t device_id = pci_get_devid(self);
96 
97 	switch (device_id) {
98 	case 0x78141022:
99 		return ("AMD FCH USB 3.0 controller");
100 
101 	case 0x01941033:
102 		return ("NEC uPD720200 USB 3.0 controller");
103 	case 0x00151912:
104 		return ("NEC uPD720202 USB 3.0 controller");
105 
106 	case 0x10001b73:
107 		return ("Fresco Logic FL1000G USB 3.0 controller");
108 
109 	case 0x10421b21:
110 		return ("ASMedia ASM1042 USB 3.0 controller");
111 	case 0x11421b21:
112 		return ("ASMedia ASM1042A USB 3.0 controller");
113 
114 	case 0x0f358086:
115 		return ("Intel BayTrail USB 3.0 controller");
116 	case 0x9c318086:
117 	case 0x1e318086:
118 		return ("Intel Panther Point USB 3.0 controller");
119 	case 0x22b58086:
120 		return ("Intel Braswell USB 3.0 controller");
121 	case 0x5aa88086:
122 		return ("Intel Apollo Lake USB 3.0 controller");
123 	case 0x8c318086:
124 		return ("Intel Lynx Point USB 3.0 controller");
125 	case 0x8cb18086:
126 		return ("Intel Wildcat Point USB 3.0 controller");
127 	case 0x8d318086:
128 		return ("Intel Wellsburg USB 3.0 controller");
129 	case 0x9cb18086:
130 		return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
131 	case 0x9d2f8086:
132 		return ("Intel Sunrise Point-LP USB 3.0 controller");
133 	case 0xa12f8086:
134 		return ("Intel Sunrise Point USB 3.0 controller");
135 
136 	case 0xa01b177d:
137 		return ("Cavium ThunderX USB 3.0 controller");
138 
139 	default:
140 		break;
141 	}
142 
143 	if ((pci_get_class(self) == PCIC_SERIALBUS)
144 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
145 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
146 		return ("XHCI (generic) USB 3.0 controller");
147 	}
148 	return (NULL);			/* dunno */
149 }
150 
151 static int
152 xhci_pci_probe(device_t self)
153 {
154 	const char *desc = xhci_pci_match(self);
155 
156 	if (desc) {
157 		device_set_desc(self, desc);
158 		return (BUS_PROBE_DEFAULT);
159 	} else {
160 		return (ENXIO);
161 	}
162 }
163 
164 static int xhci_use_msi = 1;
165 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
166 static int xhci_use_msix = 1;
167 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
168 
169 static void
170 xhci_interrupt_poll(void *_sc)
171 {
172 	struct xhci_softc *sc = _sc;
173 	USB_BUS_UNLOCK(&sc->sc_bus);
174 	xhci_interrupt(sc);
175 	USB_BUS_LOCK(&sc->sc_bus);
176 	usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
177 }
178 
179 static int
180 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
181 {
182 	uint32_t temp;
183 	uint32_t usb3_mask;
184 	uint32_t usb2_mask;
185 
186 	temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
187 	    pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
188 
189 	temp |= set;
190 	temp &= ~clear;
191 
192 	/* Don't set bits which the hardware doesn't support */
193 	usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
194 	usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
195 
196 	pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
197 	pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
198 
199 	device_printf(self, "Port routing mask set to 0x%08x\n", temp);
200 
201 	return (0);
202 }
203 
204 static int
205 xhci_pci_attach(device_t self)
206 {
207 	struct xhci_softc *sc = device_get_softc(self);
208 	int count, err, msix_table, rid;
209 	uint8_t usemsi = 1;
210 	uint8_t usedma32 = 0;
211 
212 	rid = PCI_XHCI_CBMEM;
213 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
214 	    RF_ACTIVE);
215 	if (!sc->sc_io_res) {
216 		device_printf(self, "Could not map memory\n");
217 		return (ENOMEM);
218 	}
219 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
220 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
221 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
222 
223 	switch (pci_get_devid(self)) {
224 	case 0x01941033:	/* NEC uPD720200 USB 3.0 controller */
225 	case 0x00141912:	/* NEC uPD720201 USB 3.0 controller */
226 		/* Don't use 64-bit DMA on these controllers. */
227 		usedma32 = 1;
228 		break;
229 	case 0x10001b73:	/* FL1000G */
230 		/* Fresco Logic host doesn't support MSI. */
231 		usemsi = 0;
232 		break;
233 	case 0x0f358086:	/* BayTrail */
234 	case 0x9c318086:	/* Panther Point */
235 	case 0x1e318086:	/* Panther Point */
236 	case 0x8c318086:	/* Lynx Point */
237 	case 0x8cb18086:	/* Wildcat Point */
238 	case 0x9cb18086:	/* Broadwell Mobile Integrated */
239 		/*
240 		 * On Intel chipsets, reroute ports from EHCI to XHCI
241 		 * controller and use a different IMOD value.
242 		 */
243 		sc->sc_port_route = &xhci_pci_port_route;
244 		sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
245 		break;
246 	}
247 
248 	if (xhci_init(sc, self, usedma32)) {
249 		device_printf(self, "Could not initialize softc\n");
250 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
251 		    sc->sc_io_res);
252 		return (ENXIO);
253 	}
254 
255 	pci_enable_busmaster(self);
256 
257 	usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
258 
259 	rid = 0;
260 	if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
261 		sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY,
262 		    &msix_table, RF_ACTIVE);
263 		if (sc->sc_msix_res == NULL) {
264 			/* May not be enabled */
265 			device_printf(self,
266 			    "Unable to map MSI-X table \n");
267 		} else {
268 			count = 1;
269 			if (pci_alloc_msix(self, &count) == 0) {
270 				if (bootverbose)
271 					device_printf(self, "MSI-X enabled\n");
272 				rid = 1;
273 			} else {
274 				bus_release_resource(self, SYS_RES_MEMORY,
275 				    msix_table, sc->sc_msix_res);
276 				sc->sc_msix_res = NULL;
277 			}
278 		}
279 	}
280 	if (rid == 0 && xhci_use_msi && usemsi) {
281 		count = 1;
282 		if (pci_alloc_msi(self, &count) == 0) {
283 			if (bootverbose)
284 				device_printf(self, "MSI enabled\n");
285 			rid = 1;
286 		}
287 	}
288 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
289 	    RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
290 	if (sc->sc_irq_res == NULL) {
291 		pci_release_msi(self);
292 		device_printf(self, "Could not allocate IRQ\n");
293 		/* goto error; FALLTHROUGH - use polling */
294 	}
295 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
296 	if (sc->sc_bus.bdev == NULL) {
297 		device_printf(self, "Could not add USB device\n");
298 		goto error;
299 	}
300 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
301 
302 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
303 
304 	if (sc->sc_irq_res != NULL) {
305 		err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
306 		    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
307 		if (err != 0) {
308 			bus_release_resource(self, SYS_RES_IRQ,
309 			    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
310 			sc->sc_irq_res = NULL;
311 			pci_release_msi(self);
312 			device_printf(self, "Could not setup IRQ, err=%d\n", err);
313 			sc->sc_intr_hdl = NULL;
314 		}
315 	}
316 	if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
317 		if (xhci_use_polling() != 0) {
318 			device_printf(self, "Interrupt polling at %dHz\n", hz);
319 			USB_BUS_LOCK(&sc->sc_bus);
320 			xhci_interrupt_poll(sc);
321 			USB_BUS_UNLOCK(&sc->sc_bus);
322 		} else
323 			goto error;
324 	}
325 
326 	xhci_pci_take_controller(self);
327 
328 	err = xhci_halt_controller(sc);
329 
330 	if (err == 0)
331 		err = xhci_start_controller(sc);
332 
333 	if (err == 0)
334 		err = device_probe_and_attach(sc->sc_bus.bdev);
335 
336 	if (err) {
337 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
338 		goto error;
339 	}
340 	return (0);
341 
342 error:
343 	xhci_pci_detach(self);
344 	return (ENXIO);
345 }
346 
347 static int
348 xhci_pci_detach(device_t self)
349 {
350 	struct xhci_softc *sc = device_get_softc(self);
351 
352 	/* during module unload there are lots of children leftover */
353 	device_delete_children(self);
354 
355 	usb_callout_drain(&sc->sc_callout);
356 	xhci_halt_controller(sc);
357 	xhci_reset_controller(sc);
358 
359 	pci_disable_busmaster(self);
360 
361 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
362 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
363 		sc->sc_intr_hdl = NULL;
364 	}
365 	if (sc->sc_irq_res) {
366 		bus_release_resource(self, SYS_RES_IRQ,
367 		    rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
368 		sc->sc_irq_res = NULL;
369 		pci_release_msi(self);
370 	}
371 	if (sc->sc_io_res) {
372 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
373 		    sc->sc_io_res);
374 		sc->sc_io_res = NULL;
375 	}
376 	if (sc->sc_msix_res) {
377 		bus_release_resource(self, SYS_RES_MEMORY,
378 		    rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
379 		sc->sc_msix_res = NULL;
380 	}
381 
382 	xhci_uninit(sc);
383 
384 	return (0);
385 }
386 
387 static int
388 xhci_pci_take_controller(device_t self)
389 {
390 	struct xhci_softc *sc = device_get_softc(self);
391 	uint32_t cparams;
392 	uint32_t eecp;
393 	uint32_t eec;
394 	uint16_t to;
395 	uint8_t bios_sem;
396 
397 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
398 
399 	eec = -1;
400 
401 	/* Synchronise with the BIOS if it owns the controller. */
402 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
403 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
404 		eec = XREAD4(sc, capa, eecp);
405 
406 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
407 			continue;
408 		bios_sem = XREAD1(sc, capa, eecp +
409 		    XHCI_XECP_BIOS_SEM);
410 		if (bios_sem == 0)
411 			continue;
412 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
413 		    "to give up control\n");
414 		XWRITE1(sc, capa, eecp +
415 		    XHCI_XECP_OS_SEM, 1);
416 		to = 500;
417 		while (1) {
418 			bios_sem = XREAD1(sc, capa, eecp +
419 			    XHCI_XECP_BIOS_SEM);
420 			if (bios_sem == 0)
421 				break;
422 
423 			if (--to == 0) {
424 				device_printf(sc->sc_bus.bdev,
425 				    "timed out waiting for BIOS\n");
426 				break;
427 			}
428 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
429 		}
430 	}
431 	return (0);
432 }
433