1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 static const char * 93 xhci_pci_match(device_t self) 94 { 95 uint32_t device_id = pci_get_devid(self); 96 97 switch (device_id) { 98 case 0x78141022: 99 return ("AMD FCH USB 3.0 controller"); 100 101 case 0x01941033: 102 return ("NEC uPD720200 USB 3.0 controller"); 103 104 case 0x10001b73: 105 return ("Fresco Logic FL1000G USB 3.0 controller"); 106 107 case 0x10421b21: 108 return ("ASMedia ASM1042 USB 3.0 controller"); 109 case 0x11421b21: 110 return ("ASMedia ASM1042A USB 3.0 controller"); 111 112 case 0x0f358086: 113 return ("Intel BayTrail USB 3.0 controller"); 114 case 0x9c318086: 115 case 0x1e318086: 116 return ("Intel Panther Point USB 3.0 controller"); 117 case 0x8c318086: 118 return ("Intel Lynx Point USB 3.0 controller"); 119 case 0x8cb18086: 120 return ("Intel Wildcat Point USB 3.0 controller"); 121 case 0x8d318086: 122 return ("Intel Wellsburg USB 3.0 controller"); 123 case 0x9cb18086: 124 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 125 case 0xa12f8086: 126 return ("Intel Sunrise Point USB 3.0 controller"); 127 128 case 0xa01b177d: 129 return ("Cavium ThunderX USB 3.0 controller"); 130 131 default: 132 break; 133 } 134 135 if ((pci_get_class(self) == PCIC_SERIALBUS) 136 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 137 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 138 return ("XHCI (generic) USB 3.0 controller"); 139 } 140 return (NULL); /* dunno */ 141 } 142 143 static int 144 xhci_pci_probe(device_t self) 145 { 146 const char *desc = xhci_pci_match(self); 147 148 if (desc) { 149 device_set_desc(self, desc); 150 return (BUS_PROBE_DEFAULT); 151 } else { 152 return (ENXIO); 153 } 154 } 155 156 static int xhci_use_msi = 1; 157 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 158 static int xhci_use_msix = 1; 159 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 160 161 static void 162 xhci_interrupt_poll(void *_sc) 163 { 164 struct xhci_softc *sc = _sc; 165 USB_BUS_UNLOCK(&sc->sc_bus); 166 xhci_interrupt(sc); 167 USB_BUS_LOCK(&sc->sc_bus); 168 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 169 } 170 171 static int 172 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 173 { 174 uint32_t temp; 175 uint32_t usb3_mask; 176 uint32_t usb2_mask; 177 178 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 179 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 180 181 temp |= set; 182 temp &= ~clear; 183 184 /* Don't set bits which the hardware doesn't support */ 185 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 186 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 187 188 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 189 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 190 191 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 192 193 return (0); 194 } 195 196 static int 197 xhci_pci_attach(device_t self) 198 { 199 struct xhci_softc *sc = device_get_softc(self); 200 int count, err, msix_table, rid; 201 uint8_t usemsi = 1; 202 uint8_t usedma32 = 0; 203 204 rid = PCI_XHCI_CBMEM; 205 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 206 RF_ACTIVE); 207 if (!sc->sc_io_res) { 208 device_printf(self, "Could not map memory\n"); 209 return (ENOMEM); 210 } 211 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 212 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 213 sc->sc_io_size = rman_get_size(sc->sc_io_res); 214 215 switch (pci_get_devid(self)) { 216 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 217 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 218 /* Don't use 64-bit DMA on these controllers. */ 219 usedma32 = 1; 220 break; 221 case 0x10001b73: /* FL1000G */ 222 /* Fresco Logic host doesn't support MSI. */ 223 usemsi = 0; 224 break; 225 case 0x0f358086: /* BayTrail */ 226 case 0x9c318086: /* Panther Point */ 227 case 0x1e318086: /* Panther Point */ 228 case 0x8c318086: /* Lynx Point */ 229 case 0x8cb18086: /* Wildcat Point */ 230 case 0x9cb18086: /* Broadwell Mobile Integrated */ 231 /* 232 * On Intel chipsets, reroute ports from EHCI to XHCI 233 * controller and use a different IMOD value. 234 */ 235 sc->sc_port_route = &xhci_pci_port_route; 236 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 237 break; 238 } 239 240 if (xhci_init(sc, self, usedma32)) { 241 device_printf(self, "Could not initialize softc\n"); 242 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 243 sc->sc_io_res); 244 return (ENXIO); 245 } 246 247 pci_enable_busmaster(self); 248 249 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 250 251 rid = 0; 252 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 253 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 254 &msix_table, RF_ACTIVE); 255 if (sc->sc_msix_res == NULL) { 256 /* May not be enabled */ 257 device_printf(self, 258 "Unable to map MSI-X table \n"); 259 } else { 260 count = 1; 261 if (pci_alloc_msix(self, &count) == 0) { 262 if (bootverbose) 263 device_printf(self, "MSI-X enabled\n"); 264 rid = 1; 265 } else { 266 bus_release_resource(self, SYS_RES_MEMORY, 267 msix_table, sc->sc_msix_res); 268 sc->sc_msix_res = NULL; 269 } 270 } 271 } 272 if (rid == 0 && xhci_use_msi && usemsi) { 273 count = 1; 274 if (pci_alloc_msi(self, &count) == 0) { 275 if (bootverbose) 276 device_printf(self, "MSI enabled\n"); 277 rid = 1; 278 } 279 } 280 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 281 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 282 if (sc->sc_irq_res == NULL) { 283 pci_release_msi(self); 284 device_printf(self, "Could not allocate IRQ\n"); 285 /* goto error; FALLTHROUGH - use polling */ 286 } 287 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 288 if (sc->sc_bus.bdev == NULL) { 289 device_printf(self, "Could not add USB device\n"); 290 goto error; 291 } 292 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 293 294 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 295 296 if (sc->sc_irq_res != NULL) { 297 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 298 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 299 if (err != 0) { 300 bus_release_resource(self, SYS_RES_IRQ, 301 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 302 sc->sc_irq_res = NULL; 303 pci_release_msi(self); 304 device_printf(self, "Could not setup IRQ, err=%d\n", err); 305 sc->sc_intr_hdl = NULL; 306 } 307 } 308 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 309 if (xhci_use_polling() != 0) { 310 device_printf(self, "Interrupt polling at %dHz\n", hz); 311 USB_BUS_LOCK(&sc->sc_bus); 312 xhci_interrupt_poll(sc); 313 USB_BUS_UNLOCK(&sc->sc_bus); 314 } else 315 goto error; 316 } 317 318 xhci_pci_take_controller(self); 319 320 err = xhci_halt_controller(sc); 321 322 if (err == 0) 323 err = xhci_start_controller(sc); 324 325 if (err == 0) 326 err = device_probe_and_attach(sc->sc_bus.bdev); 327 328 if (err) { 329 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 330 goto error; 331 } 332 return (0); 333 334 error: 335 xhci_pci_detach(self); 336 return (ENXIO); 337 } 338 339 static int 340 xhci_pci_detach(device_t self) 341 { 342 struct xhci_softc *sc = device_get_softc(self); 343 device_t bdev; 344 345 if (sc->sc_bus.bdev != NULL) { 346 bdev = sc->sc_bus.bdev; 347 device_detach(bdev); 348 device_delete_child(self, bdev); 349 } 350 /* during module unload there are lots of children leftover */ 351 device_delete_children(self); 352 353 usb_callout_drain(&sc->sc_callout); 354 xhci_halt_controller(sc); 355 356 pci_disable_busmaster(self); 357 358 if (sc->sc_irq_res && sc->sc_intr_hdl) { 359 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 360 sc->sc_intr_hdl = NULL; 361 } 362 if (sc->sc_irq_res) { 363 bus_release_resource(self, SYS_RES_IRQ, 364 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 365 sc->sc_irq_res = NULL; 366 pci_release_msi(self); 367 } 368 if (sc->sc_io_res) { 369 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 370 sc->sc_io_res); 371 sc->sc_io_res = NULL; 372 } 373 if (sc->sc_msix_res) { 374 bus_release_resource(self, SYS_RES_MEMORY, 375 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 376 sc->sc_msix_res = NULL; 377 } 378 379 xhci_uninit(sc); 380 381 return (0); 382 } 383 384 static int 385 xhci_pci_take_controller(device_t self) 386 { 387 struct xhci_softc *sc = device_get_softc(self); 388 uint32_t cparams; 389 uint32_t eecp; 390 uint32_t eec; 391 uint16_t to; 392 uint8_t bios_sem; 393 394 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 395 396 eec = -1; 397 398 /* Synchronise with the BIOS if it owns the controller. */ 399 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 400 eecp += XHCI_XECP_NEXT(eec) << 2) { 401 eec = XREAD4(sc, capa, eecp); 402 403 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 404 continue; 405 bios_sem = XREAD1(sc, capa, eecp + 406 XHCI_XECP_BIOS_SEM); 407 if (bios_sem == 0) 408 continue; 409 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 410 "to give up control\n"); 411 XWRITE1(sc, capa, eecp + 412 XHCI_XECP_OS_SEM, 1); 413 to = 500; 414 while (1) { 415 bios_sem = XREAD1(sc, capa, eecp + 416 XHCI_XECP_BIOS_SEM); 417 if (bios_sem == 0) 418 break; 419 420 if (--to == 0) { 421 device_printf(sc->sc_bus.bdev, 422 "timed out waiting for BIOS\n"); 423 break; 424 } 425 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 426 } 427 } 428 return (0); 429 } 430