1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 static const char * 93 xhci_pci_match(device_t self) 94 { 95 uint32_t device_id = pci_get_devid(self); 96 97 switch (device_id) { 98 case 0x78141022: 99 return ("AMD FCH USB 3.0 controller"); 100 101 case 0x01941033: 102 return ("NEC uPD720200 USB 3.0 controller"); 103 case 0x00151912: 104 return ("NEC uPD720202 USB 3.0 controller"); 105 106 case 0x10001b73: 107 return ("Fresco Logic FL1000G USB 3.0 controller"); 108 109 case 0x10421b21: 110 return ("ASMedia ASM1042 USB 3.0 controller"); 111 case 0x11421b21: 112 return ("ASMedia ASM1042A USB 3.0 controller"); 113 114 case 0x0f358086: 115 return ("Intel BayTrail USB 3.0 controller"); 116 case 0x9c318086: 117 case 0x1e318086: 118 return ("Intel Panther Point USB 3.0 controller"); 119 case 0x8c318086: 120 return ("Intel Lynx Point USB 3.0 controller"); 121 case 0x8cb18086: 122 return ("Intel Wildcat Point USB 3.0 controller"); 123 case 0x8d318086: 124 return ("Intel Wellsburg USB 3.0 controller"); 125 case 0x9cb18086: 126 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller"); 127 case 0x9d2f8086: 128 return ("Intel Sunrise Point-LP USB 3.0 controller"); 129 case 0xa12f8086: 130 return ("Intel Sunrise Point USB 3.0 controller"); 131 132 case 0xa01b177d: 133 return ("Cavium ThunderX USB 3.0 controller"); 134 135 default: 136 break; 137 } 138 139 if ((pci_get_class(self) == PCIC_SERIALBUS) 140 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 141 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 142 return ("XHCI (generic) USB 3.0 controller"); 143 } 144 return (NULL); /* dunno */ 145 } 146 147 static int 148 xhci_pci_probe(device_t self) 149 { 150 const char *desc = xhci_pci_match(self); 151 152 if (desc) { 153 device_set_desc(self, desc); 154 return (BUS_PROBE_DEFAULT); 155 } else { 156 return (ENXIO); 157 } 158 } 159 160 static int xhci_use_msi = 1; 161 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 162 static int xhci_use_msix = 1; 163 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix); 164 165 static void 166 xhci_interrupt_poll(void *_sc) 167 { 168 struct xhci_softc *sc = _sc; 169 USB_BUS_UNLOCK(&sc->sc_bus); 170 xhci_interrupt(sc); 171 USB_BUS_LOCK(&sc->sc_bus); 172 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 173 } 174 175 static int 176 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 177 { 178 uint32_t temp; 179 uint32_t usb3_mask; 180 uint32_t usb2_mask; 181 182 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 183 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 184 185 temp |= set; 186 temp &= ~clear; 187 188 /* Don't set bits which the hardware doesn't support */ 189 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 190 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 191 192 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 193 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 194 195 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 196 197 return (0); 198 } 199 200 static int 201 xhci_pci_attach(device_t self) 202 { 203 struct xhci_softc *sc = device_get_softc(self); 204 int count, err, msix_table, rid; 205 uint8_t usemsi = 1; 206 uint8_t usedma32 = 0; 207 208 rid = PCI_XHCI_CBMEM; 209 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 210 RF_ACTIVE); 211 if (!sc->sc_io_res) { 212 device_printf(self, "Could not map memory\n"); 213 return (ENOMEM); 214 } 215 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 216 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 217 sc->sc_io_size = rman_get_size(sc->sc_io_res); 218 219 switch (pci_get_devid(self)) { 220 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */ 221 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */ 222 /* Don't use 64-bit DMA on these controllers. */ 223 usedma32 = 1; 224 break; 225 case 0x10001b73: /* FL1000G */ 226 /* Fresco Logic host doesn't support MSI. */ 227 usemsi = 0; 228 break; 229 case 0x0f358086: /* BayTrail */ 230 case 0x9c318086: /* Panther Point */ 231 case 0x1e318086: /* Panther Point */ 232 case 0x8c318086: /* Lynx Point */ 233 case 0x8cb18086: /* Wildcat Point */ 234 case 0x9cb18086: /* Broadwell Mobile Integrated */ 235 /* 236 * On Intel chipsets, reroute ports from EHCI to XHCI 237 * controller and use a different IMOD value. 238 */ 239 sc->sc_port_route = &xhci_pci_port_route; 240 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 241 break; 242 } 243 244 if (xhci_init(sc, self, usedma32)) { 245 device_printf(self, "Could not initialize softc\n"); 246 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 247 sc->sc_io_res); 248 return (ENXIO); 249 } 250 251 pci_enable_busmaster(self); 252 253 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 254 255 rid = 0; 256 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) { 257 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, 258 &msix_table, RF_ACTIVE); 259 if (sc->sc_msix_res == NULL) { 260 /* May not be enabled */ 261 device_printf(self, 262 "Unable to map MSI-X table \n"); 263 } else { 264 count = 1; 265 if (pci_alloc_msix(self, &count) == 0) { 266 if (bootverbose) 267 device_printf(self, "MSI-X enabled\n"); 268 rid = 1; 269 } else { 270 bus_release_resource(self, SYS_RES_MEMORY, 271 msix_table, sc->sc_msix_res); 272 sc->sc_msix_res = NULL; 273 } 274 } 275 } 276 if (rid == 0 && xhci_use_msi && usemsi) { 277 count = 1; 278 if (pci_alloc_msi(self, &count) == 0) { 279 if (bootverbose) 280 device_printf(self, "MSI enabled\n"); 281 rid = 1; 282 } 283 } 284 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 285 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE)); 286 if (sc->sc_irq_res == NULL) { 287 pci_release_msi(self); 288 device_printf(self, "Could not allocate IRQ\n"); 289 /* goto error; FALLTHROUGH - use polling */ 290 } 291 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 292 if (sc->sc_bus.bdev == NULL) { 293 device_printf(self, "Could not add USB device\n"); 294 goto error; 295 } 296 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 297 298 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 299 300 if (sc->sc_irq_res != NULL) { 301 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 302 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 303 if (err != 0) { 304 bus_release_resource(self, SYS_RES_IRQ, 305 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 306 sc->sc_irq_res = NULL; 307 pci_release_msi(self); 308 device_printf(self, "Could not setup IRQ, err=%d\n", err); 309 sc->sc_intr_hdl = NULL; 310 } 311 } 312 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) { 313 if (xhci_use_polling() != 0) { 314 device_printf(self, "Interrupt polling at %dHz\n", hz); 315 USB_BUS_LOCK(&sc->sc_bus); 316 xhci_interrupt_poll(sc); 317 USB_BUS_UNLOCK(&sc->sc_bus); 318 } else 319 goto error; 320 } 321 322 xhci_pci_take_controller(self); 323 324 err = xhci_halt_controller(sc); 325 326 if (err == 0) 327 err = xhci_start_controller(sc); 328 329 if (err == 0) 330 err = device_probe_and_attach(sc->sc_bus.bdev); 331 332 if (err) { 333 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 334 goto error; 335 } 336 return (0); 337 338 error: 339 xhci_pci_detach(self); 340 return (ENXIO); 341 } 342 343 static int 344 xhci_pci_detach(device_t self) 345 { 346 struct xhci_softc *sc = device_get_softc(self); 347 348 /* during module unload there are lots of children leftover */ 349 device_delete_children(self); 350 351 usb_callout_drain(&sc->sc_callout); 352 xhci_halt_controller(sc); 353 xhci_reset_controller(sc); 354 355 pci_disable_busmaster(self); 356 357 if (sc->sc_irq_res && sc->sc_intr_hdl) { 358 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 359 sc->sc_intr_hdl = NULL; 360 } 361 if (sc->sc_irq_res) { 362 bus_release_resource(self, SYS_RES_IRQ, 363 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 364 sc->sc_irq_res = NULL; 365 pci_release_msi(self); 366 } 367 if (sc->sc_io_res) { 368 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 369 sc->sc_io_res); 370 sc->sc_io_res = NULL; 371 } 372 if (sc->sc_msix_res) { 373 bus_release_resource(self, SYS_RES_MEMORY, 374 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res); 375 sc->sc_msix_res = NULL; 376 } 377 378 xhci_uninit(sc); 379 380 return (0); 381 } 382 383 static int 384 xhci_pci_take_controller(device_t self) 385 { 386 struct xhci_softc *sc = device_get_softc(self); 387 uint32_t cparams; 388 uint32_t eecp; 389 uint32_t eec; 390 uint16_t to; 391 uint8_t bios_sem; 392 393 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 394 395 eec = -1; 396 397 /* Synchronise with the BIOS if it owns the controller. */ 398 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 399 eecp += XHCI_XECP_NEXT(eec) << 2) { 400 eec = XREAD4(sc, capa, eecp); 401 402 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 403 continue; 404 bios_sem = XREAD1(sc, capa, eecp + 405 XHCI_XECP_BIOS_SEM); 406 if (bios_sem == 0) 407 continue; 408 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 409 "to give up control\n"); 410 XWRITE1(sc, capa, eecp + 411 XHCI_XECP_OS_SEM, 1); 412 to = 500; 413 while (1) { 414 bios_sem = XREAD1(sc, capa, eecp + 415 XHCI_XECP_BIOS_SEM); 416 if (bios_sem == 0) 417 break; 418 419 if (--to == 0) { 420 device_printf(sc->sc_bus.bdev, 421 "timed out waiting for BIOS\n"); 422 break; 423 } 424 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 425 } 426 } 427 return (0); 428 } 429