1 /*- 2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/queue.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/sysctl.h> 42 #include <sys/sx.h> 43 #include <sys/unistd.h> 44 #include <sys/callout.h> 45 #include <sys/malloc.h> 46 #include <sys/priv.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 51 #include <dev/usb/usb_core.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_util.h> 55 56 #include <dev/usb/usb_controller.h> 57 #include <dev/usb/usb_bus.h> 58 #include <dev/usb/usb_pci.h> 59 #include <dev/usb/controller/xhci.h> 60 #include <dev/usb/controller/xhcireg.h> 61 #include "usb_if.h" 62 63 static device_probe_t xhci_pci_probe; 64 static device_attach_t xhci_pci_attach; 65 static device_detach_t xhci_pci_detach; 66 static usb_take_controller_t xhci_pci_take_controller; 67 68 static device_method_t xhci_device_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, xhci_pci_probe), 71 DEVMETHOD(device_attach, xhci_pci_attach), 72 DEVMETHOD(device_detach, xhci_pci_detach), 73 DEVMETHOD(device_suspend, bus_generic_suspend), 74 DEVMETHOD(device_resume, bus_generic_resume), 75 DEVMETHOD(device_shutdown, bus_generic_shutdown), 76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller), 77 78 DEVMETHOD_END 79 }; 80 81 static driver_t xhci_driver = { 82 .name = "xhci", 83 .methods = xhci_device_methods, 84 .size = sizeof(struct xhci_softc), 85 }; 86 87 static devclass_t xhci_devclass; 88 89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0); 90 MODULE_DEPEND(xhci, usb, 1, 1, 1); 91 92 93 static const char * 94 xhci_pci_match(device_t self) 95 { 96 uint32_t device_id = pci_get_devid(self); 97 98 switch (device_id) { 99 case 0x01941033: 100 return ("NEC uPD720200 USB 3.0 controller"); 101 102 case 0x10421b21: 103 return ("ASMedia ASM1042 USB 3.0 controller"); 104 105 case 0x0f358086: 106 return ("Intel Intel BayTrail USB 3.0 controller"); 107 case 0x9c318086: 108 case 0x1e318086: 109 return ("Intel Panther Point USB 3.0 controller"); 110 case 0x8c318086: 111 return ("Intel Lynx Point USB 3.0 controller"); 112 113 default: 114 break; 115 } 116 117 if ((pci_get_class(self) == PCIC_SERIALBUS) 118 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 119 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) { 120 return ("XHCI (generic) USB 3.0 controller"); 121 } 122 return (NULL); /* dunno */ 123 } 124 125 static int 126 xhci_pci_probe(device_t self) 127 { 128 const char *desc = xhci_pci_match(self); 129 130 if (desc) { 131 device_set_desc(self, desc); 132 return (0); 133 } else { 134 return (ENXIO); 135 } 136 } 137 138 static int xhci_use_msi = 1; 139 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi); 140 141 static void 142 xhci_interrupt_poll(void *_sc) 143 { 144 struct xhci_softc *sc = _sc; 145 USB_BUS_UNLOCK(&sc->sc_bus); 146 xhci_interrupt(sc); 147 USB_BUS_LOCK(&sc->sc_bus); 148 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc); 149 } 150 151 static int 152 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) 153 { 154 uint32_t temp; 155 uint32_t usb3_mask; 156 uint32_t usb2_mask; 157 158 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) | 159 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4); 160 161 temp |= set; 162 temp &= ~clear; 163 164 /* Don't set bits which the hardware doesn't support */ 165 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); 166 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4); 167 168 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4); 169 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4); 170 171 device_printf(self, "Port routing mask set to 0x%08x\n", temp); 172 173 return (0); 174 } 175 176 static int 177 xhci_pci_attach(device_t self) 178 { 179 struct xhci_softc *sc = device_get_softc(self); 180 int count, err, rid; 181 182 /* XXX check for 64-bit capability */ 183 184 if (xhci_init(sc, self)) { 185 device_printf(self, "Could not initialize softc\n"); 186 goto error; 187 } 188 189 pci_enable_busmaster(self); 190 191 rid = PCI_XHCI_CBMEM; 192 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 193 RF_ACTIVE); 194 if (!sc->sc_io_res) { 195 device_printf(self, "Could not map memory\n"); 196 goto error; 197 } 198 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 199 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 200 sc->sc_io_size = rman_get_size(sc->sc_io_res); 201 202 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0); 203 204 sc->sc_irq_rid = 0; 205 if (xhci_use_msi) { 206 count = pci_msi_count(self); 207 if (count >= 1) { 208 count = 1; 209 if (pci_alloc_msi(self, &count) == 0) { 210 if (bootverbose) 211 device_printf(self, "MSI enabled\n"); 212 sc->sc_irq_rid = 1; 213 } 214 } 215 } 216 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, 217 &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE); 218 if (sc->sc_irq_res == NULL) { 219 device_printf(self, "Could not allocate IRQ\n"); 220 /* goto error; FALLTHROUGH - use polling */ 221 } 222 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 223 if (sc->sc_bus.bdev == NULL) { 224 device_printf(self, "Could not add USB device\n"); 225 goto error; 226 } 227 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 228 229 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self)); 230 231 if (sc->sc_irq_res != NULL) { 232 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 233 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); 234 if (err != 0) { 235 device_printf(self, "Could not setup IRQ, err=%d\n", err); 236 sc->sc_intr_hdl = NULL; 237 } 238 } 239 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL || 240 xhci_use_polling() != 0) { 241 device_printf(self, "Interrupt polling at %dHz\n", hz); 242 USB_BUS_LOCK(&sc->sc_bus); 243 xhci_interrupt_poll(sc); 244 USB_BUS_UNLOCK(&sc->sc_bus); 245 } 246 247 /* On Intel chipsets reroute ports from EHCI to XHCI controller. */ 248 switch (pci_get_devid(self)) { 249 case 0x0f358086: /* BayTrail */ 250 case 0x9c318086: /* Panther Point */ 251 case 0x1e318086: /* Panther Point */ 252 case 0x8c318086: /* Lynx Point */ 253 sc->sc_port_route = &xhci_pci_port_route; 254 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP; 255 break; 256 default: 257 break; 258 } 259 260 xhci_pci_take_controller(self); 261 262 err = xhci_halt_controller(sc); 263 264 if (err == 0) 265 err = xhci_start_controller(sc); 266 267 if (err == 0) 268 err = device_probe_and_attach(sc->sc_bus.bdev); 269 270 if (err) { 271 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err); 272 goto error; 273 } 274 return (0); 275 276 error: 277 xhci_pci_detach(self); 278 return (ENXIO); 279 } 280 281 static int 282 xhci_pci_detach(device_t self) 283 { 284 struct xhci_softc *sc = device_get_softc(self); 285 device_t bdev; 286 287 if (sc->sc_bus.bdev != NULL) { 288 bdev = sc->sc_bus.bdev; 289 device_detach(bdev); 290 device_delete_child(self, bdev); 291 } 292 /* during module unload there are lots of children leftover */ 293 device_delete_children(self); 294 295 if (sc->sc_io_res) { 296 usb_callout_drain(&sc->sc_callout); 297 xhci_halt_controller(sc); 298 } 299 300 pci_disable_busmaster(self); 301 302 if (sc->sc_irq_res && sc->sc_intr_hdl) { 303 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 304 sc->sc_intr_hdl = NULL; 305 } 306 if (sc->sc_irq_res) { 307 if (sc->sc_irq_rid == 1) 308 pci_release_msi(self); 309 bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid, 310 sc->sc_irq_res); 311 sc->sc_irq_res = NULL; 312 } 313 if (sc->sc_io_res) { 314 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM, 315 sc->sc_io_res); 316 sc->sc_io_res = NULL; 317 } 318 319 xhci_uninit(sc); 320 321 return (0); 322 } 323 324 static int 325 xhci_pci_take_controller(device_t self) 326 { 327 struct xhci_softc *sc = device_get_softc(self); 328 uint32_t cparams; 329 uint32_t eecp; 330 uint32_t eec; 331 uint16_t to; 332 uint8_t bios_sem; 333 334 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0); 335 336 eec = -1; 337 338 /* Synchronise with the BIOS if it owns the controller. */ 339 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec); 340 eecp += XHCI_XECP_NEXT(eec) << 2) { 341 eec = XREAD4(sc, capa, eecp); 342 343 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY) 344 continue; 345 bios_sem = XREAD1(sc, capa, eecp + 346 XHCI_XECP_BIOS_SEM); 347 if (bios_sem == 0) 348 continue; 349 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 350 "to give up control\n"); 351 XWRITE1(sc, capa, eecp + 352 XHCI_XECP_OS_SEM, 1); 353 to = 500; 354 while (1) { 355 bios_sem = XREAD1(sc, capa, eecp + 356 XHCI_XECP_BIOS_SEM); 357 if (bios_sem == 0) 358 break; 359 360 if (--to == 0) { 361 device_printf(sc->sc_bus.bdev, 362 "timed out waiting for BIOS\n"); 363 break; 364 } 365 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 366 } 367 } 368 return (0); 369 } 370