1 /* $FreeBSD$ */ 2 /*- 3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 4 * 5 * Copyright (c) 2008 Hans Petter Selasky <hselasky@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * This file contains the driver for the USS820 series USB Device 32 * Controller 33 * 34 * NOTE: The datasheet does not document everything. 35 */ 36 37 #ifdef USB_GLOBAL_INCLUDE_FILE 38 #include USB_GLOBAL_INCLUDE_FILE 39 #else 40 #include <sys/stdint.h> 41 #include <sys/stddef.h> 42 #include <sys/param.h> 43 #include <sys/queue.h> 44 #include <sys/types.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/bus.h> 48 #include <sys/module.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/condvar.h> 52 #include <sys/sysctl.h> 53 #include <sys/sx.h> 54 #include <sys/unistd.h> 55 #include <sys/callout.h> 56 #include <sys/malloc.h> 57 #include <sys/priv.h> 58 59 #include <dev/usb/usb.h> 60 #include <dev/usb/usbdi.h> 61 62 #define USB_DEBUG_VAR uss820dcidebug 63 64 #include <dev/usb/usb_core.h> 65 #include <dev/usb/usb_debug.h> 66 #include <dev/usb/usb_busdma.h> 67 #include <dev/usb/usb_process.h> 68 #include <dev/usb/usb_transfer.h> 69 #include <dev/usb/usb_device.h> 70 #include <dev/usb/usb_hub.h> 71 #include <dev/usb/usb_util.h> 72 73 #include <dev/usb/usb_controller.h> 74 #include <dev/usb/usb_bus.h> 75 #endif /* USB_GLOBAL_INCLUDE_FILE */ 76 77 #include <dev/usb/controller/uss820dci.h> 78 79 #define USS820_DCI_BUS2SC(bus) \ 80 __containerof(bus, struct uss820dci_softc, sc_bus) 81 82 #define USS820_DCI_PC2SC(pc) \ 83 USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus) 84 85 #define USS820_DCI_THREAD_IRQ \ 86 (USS820_SSR_SUSPEND | USS820_SSR_RESUME | USS820_SSR_RESET) 87 88 #ifdef USB_DEBUG 89 static int uss820dcidebug = 0; 90 91 static SYSCTL_NODE(_hw_usb, OID_AUTO, uss820dci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 92 "USB uss820dci"); 93 SYSCTL_INT(_hw_usb_uss820dci, OID_AUTO, debug, CTLFLAG_RWTUN, 94 &uss820dcidebug, 0, "uss820dci debug level"); 95 #endif 96 97 #define USS820_DCI_INTR_ENDPT 1 98 99 /* prototypes */ 100 101 static const struct usb_bus_methods uss820dci_bus_methods; 102 static const struct usb_pipe_methods uss820dci_device_bulk_methods; 103 static const struct usb_pipe_methods uss820dci_device_ctrl_methods; 104 static const struct usb_pipe_methods uss820dci_device_intr_methods; 105 static const struct usb_pipe_methods uss820dci_device_isoc_fs_methods; 106 107 static uss820dci_cmd_t uss820dci_setup_rx; 108 static uss820dci_cmd_t uss820dci_data_rx; 109 static uss820dci_cmd_t uss820dci_data_tx; 110 static uss820dci_cmd_t uss820dci_data_tx_sync; 111 static void uss820dci_device_done(struct usb_xfer *, usb_error_t); 112 static void uss820dci_do_poll(struct usb_bus *); 113 static void uss820dci_standard_done(struct usb_xfer *); 114 static void uss820dci_intr_set(struct usb_xfer *, uint8_t); 115 static void uss820dci_update_shared_1(struct uss820dci_softc *, uint8_t, 116 uint8_t, uint8_t); 117 static void uss820dci_root_intr(struct uss820dci_softc *); 118 119 /* 120 * Here is a list of what the USS820D chip can support. The main 121 * limitation is that the sum of the buffer sizes must be less than 122 * 1120 bytes. 123 */ 124 static const struct usb_hw_ep_profile 125 uss820dci_ep_profile[] = { 126 [0] = { 127 .max_in_frame_size = 32, 128 .max_out_frame_size = 32, 129 .is_simplex = 0, 130 .support_control = 1, 131 }, 132 [1] = { 133 .max_in_frame_size = 64, 134 .max_out_frame_size = 64, 135 .is_simplex = 0, 136 .support_multi_buffer = 1, 137 .support_bulk = 1, 138 .support_interrupt = 1, 139 .support_in = 1, 140 .support_out = 1, 141 }, 142 [2] = { 143 .max_in_frame_size = 8, 144 .max_out_frame_size = 8, 145 .is_simplex = 0, 146 .support_multi_buffer = 1, 147 .support_bulk = 1, 148 .support_interrupt = 1, 149 .support_in = 1, 150 .support_out = 1, 151 }, 152 [3] = { 153 .max_in_frame_size = 256, 154 .max_out_frame_size = 256, 155 .is_simplex = 0, 156 .support_multi_buffer = 1, 157 .support_isochronous = 1, 158 .support_in = 1, 159 .support_out = 1, 160 }, 161 }; 162 163 static void 164 uss820dci_update_shared_1(struct uss820dci_softc *sc, uint8_t reg, 165 uint8_t keep_mask, uint8_t set_mask) 166 { 167 uint8_t temp; 168 169 USS820_WRITE_1(sc, USS820_PEND, 1); 170 temp = USS820_READ_1(sc, reg); 171 temp &= (keep_mask); 172 temp |= (set_mask); 173 USS820_WRITE_1(sc, reg, temp); 174 USS820_WRITE_1(sc, USS820_PEND, 0); 175 } 176 177 static void 178 uss820dci_get_hw_ep_profile(struct usb_device *udev, 179 const struct usb_hw_ep_profile **ppf, uint8_t ep_addr) 180 { 181 if (ep_addr == 0) { 182 *ppf = uss820dci_ep_profile + 0; 183 } else if (ep_addr < 5) { 184 *ppf = uss820dci_ep_profile + 1; 185 } else if (ep_addr < 7) { 186 *ppf = uss820dci_ep_profile + 2; 187 } else if (ep_addr == 7) { 188 *ppf = uss820dci_ep_profile + 3; 189 } else { 190 *ppf = NULL; 191 } 192 } 193 194 static void 195 uss820dci_pull_up(struct uss820dci_softc *sc) 196 { 197 uint8_t temp; 198 199 /* pullup D+, if possible */ 200 201 if (!sc->sc_flags.d_pulled_up && 202 sc->sc_flags.port_powered) { 203 sc->sc_flags.d_pulled_up = 1; 204 205 DPRINTF("\n"); 206 207 temp = USS820_READ_1(sc, USS820_MCSR); 208 temp |= USS820_MCSR_DPEN; 209 USS820_WRITE_1(sc, USS820_MCSR, temp); 210 } 211 } 212 213 static void 214 uss820dci_pull_down(struct uss820dci_softc *sc) 215 { 216 uint8_t temp; 217 218 /* pulldown D+, if possible */ 219 220 if (sc->sc_flags.d_pulled_up) { 221 sc->sc_flags.d_pulled_up = 0; 222 223 DPRINTF("\n"); 224 225 temp = USS820_READ_1(sc, USS820_MCSR); 226 temp &= ~USS820_MCSR_DPEN; 227 USS820_WRITE_1(sc, USS820_MCSR, temp); 228 } 229 } 230 231 static void 232 uss820dci_wakeup_peer(struct uss820dci_softc *sc) 233 { 234 if (!(sc->sc_flags.status_suspend)) { 235 return; 236 } 237 DPRINTFN(0, "not supported\n"); 238 } 239 240 static void 241 uss820dci_set_address(struct uss820dci_softc *sc, uint8_t addr) 242 { 243 DPRINTFN(5, "addr=%d\n", addr); 244 245 USS820_WRITE_1(sc, USS820_FADDR, addr); 246 } 247 248 static uint8_t 249 uss820dci_setup_rx(struct uss820dci_softc *sc, struct uss820dci_td *td) 250 { 251 struct usb_device_request req; 252 uint16_t count; 253 uint8_t rx_stat; 254 uint8_t temp; 255 256 /* select the correct endpoint */ 257 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index); 258 259 /* read out FIFO status */ 260 rx_stat = USS820_READ_1(sc, USS820_RXSTAT); 261 262 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder); 263 264 if (!(rx_stat & USS820_RXSTAT_RXSETUP)) { 265 goto not_complete; 266 } 267 /* clear did stall */ 268 td->did_stall = 0; 269 270 /* clear stall and all I/O */ 271 uss820dci_update_shared_1(sc, USS820_EPCON, 272 0xFF ^ (USS820_EPCON_TXSTL | 273 USS820_EPCON_RXSTL | 274 USS820_EPCON_RXIE | 275 USS820_EPCON_TXOE), 0); 276 277 /* clear end overwrite flag */ 278 uss820dci_update_shared_1(sc, USS820_RXSTAT, 279 0xFF ^ USS820_RXSTAT_EDOVW, 0); 280 281 /* get the packet byte count */ 282 count = USS820_READ_1(sc, USS820_RXCNTL); 283 count |= (USS820_READ_1(sc, USS820_RXCNTH) << 8); 284 count &= 0x3FF; 285 286 /* verify data length */ 287 if (count != td->remainder) { 288 DPRINTFN(0, "Invalid SETUP packet " 289 "length, %d bytes\n", count); 290 goto setup_not_complete; 291 } 292 if (count != sizeof(req)) { 293 DPRINTFN(0, "Unsupported SETUP packet " 294 "length, %d bytes\n", count); 295 goto setup_not_complete; 296 } 297 /* receive data */ 298 bus_space_read_multi_1(sc->sc_io_tag, sc->sc_io_hdl, 299 USS820_RXDAT * USS820_REG_STRIDE, (void *)&req, sizeof(req)); 300 301 /* read out FIFO status */ 302 rx_stat = USS820_READ_1(sc, USS820_RXSTAT); 303 304 if (rx_stat & (USS820_RXSTAT_EDOVW | 305 USS820_RXSTAT_STOVW)) { 306 DPRINTF("new SETUP packet received\n"); 307 return (1); /* not complete */ 308 } 309 /* clear receive setup bit */ 310 uss820dci_update_shared_1(sc, USS820_RXSTAT, 311 0xFF ^ (USS820_RXSTAT_RXSETUP | 312 USS820_RXSTAT_EDOVW | 313 USS820_RXSTAT_STOVW), 0); 314 315 /* set RXFFRC bit */ 316 temp = USS820_READ_1(sc, USS820_RXCON); 317 temp |= USS820_RXCON_RXFFRC; 318 USS820_WRITE_1(sc, USS820_RXCON, temp); 319 320 /* copy data into real buffer */ 321 usbd_copy_in(td->pc, 0, &req, sizeof(req)); 322 323 td->offset = sizeof(req); 324 td->remainder = 0; 325 326 /* sneak peek the set address */ 327 if ((req.bmRequestType == UT_WRITE_DEVICE) && 328 (req.bRequest == UR_SET_ADDRESS)) { 329 sc->sc_dv_addr = req.wValue[0] & 0x7F; 330 } else { 331 sc->sc_dv_addr = 0xFF; 332 } 333 334 /* reset TX FIFO */ 335 temp = USS820_READ_1(sc, USS820_TXCON); 336 temp |= USS820_TXCON_TXCLR; 337 USS820_WRITE_1(sc, USS820_TXCON, temp); 338 temp &= ~USS820_TXCON_TXCLR; 339 USS820_WRITE_1(sc, USS820_TXCON, temp); 340 341 return (0); /* complete */ 342 343 setup_not_complete: 344 345 /* set RXFFRC bit */ 346 temp = USS820_READ_1(sc, USS820_RXCON); 347 temp |= USS820_RXCON_RXFFRC; 348 USS820_WRITE_1(sc, USS820_RXCON, temp); 349 350 /* FALLTHROUGH */ 351 352 not_complete: 353 /* abort any ongoing transfer */ 354 if (!td->did_stall) { 355 DPRINTFN(5, "stalling\n"); 356 /* set stall */ 357 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, 358 (USS820_EPCON_TXSTL | USS820_EPCON_RXSTL)); 359 360 td->did_stall = 1; 361 } 362 363 /* clear end overwrite flag, if any */ 364 if (rx_stat & USS820_RXSTAT_RXSETUP) { 365 uss820dci_update_shared_1(sc, USS820_RXSTAT, 366 0xFF ^ (USS820_RXSTAT_EDOVW | 367 USS820_RXSTAT_STOVW | 368 USS820_RXSTAT_RXSETUP), 0); 369 } 370 return (1); /* not complete */ 371 } 372 373 static uint8_t 374 uss820dci_data_rx(struct uss820dci_softc *sc, struct uss820dci_td *td) 375 { 376 struct usb_page_search buf_res; 377 uint16_t count; 378 uint8_t rx_flag; 379 uint8_t rx_stat; 380 uint8_t rx_cntl; 381 uint8_t to; 382 uint8_t got_short; 383 384 to = 2; /* don't loop forever! */ 385 got_short = 0; 386 387 /* select the correct endpoint */ 388 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index); 389 390 /* check if any of the FIFO banks have data */ 391 repeat: 392 /* read out FIFO flag */ 393 rx_flag = USS820_READ_1(sc, USS820_RXFLG); 394 /* read out FIFO status */ 395 rx_stat = USS820_READ_1(sc, USS820_RXSTAT); 396 397 DPRINTFN(5, "rx_stat=0x%02x rx_flag=0x%02x rem=%u\n", 398 rx_stat, rx_flag, td->remainder); 399 400 if (rx_stat & (USS820_RXSTAT_RXSETUP | 401 USS820_RXSTAT_RXSOVW | 402 USS820_RXSTAT_EDOVW)) { 403 if (td->remainder == 0 && td->ep_index == 0) { 404 /* 405 * We are actually complete and have 406 * received the next SETUP 407 */ 408 DPRINTFN(5, "faking complete\n"); 409 return (0); /* complete */ 410 } 411 /* 412 * USB Host Aborted the transfer. 413 */ 414 td->error = 1; 415 return (0); /* complete */ 416 } 417 /* check for errors */ 418 if (rx_flag & (USS820_RXFLG_RXOVF | 419 USS820_RXFLG_RXURF)) { 420 DPRINTFN(5, "overflow or underflow\n"); 421 /* should not happen */ 422 td->error = 1; 423 return (0); /* complete */ 424 } 425 /* check status */ 426 if (!(rx_flag & (USS820_RXFLG_RXFIF0 | 427 USS820_RXFLG_RXFIF1))) { 428 /* read out EPCON register */ 429 /* enable RX input */ 430 if (!td->did_enable) { 431 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc), 432 USS820_EPCON, 0xFF, USS820_EPCON_RXIE); 433 td->did_enable = 1; 434 } 435 return (1); /* not complete */ 436 } 437 /* get the packet byte count */ 438 count = USS820_READ_1(sc, USS820_RXCNTL); 439 count |= (USS820_READ_1(sc, USS820_RXCNTH) << 8); 440 count &= 0x3FF; 441 442 DPRINTFN(5, "count=0x%04x\n", count); 443 444 /* verify the packet byte count */ 445 if (count != td->max_packet_size) { 446 if (count < td->max_packet_size) { 447 /* we have a short packet */ 448 td->short_pkt = 1; 449 got_short = 1; 450 } else { 451 /* invalid USB packet */ 452 td->error = 1; 453 return (0); /* we are complete */ 454 } 455 } 456 /* verify the packet byte count */ 457 if (count > td->remainder) { 458 /* invalid USB packet */ 459 td->error = 1; 460 return (0); /* we are complete */ 461 } 462 while (count > 0) { 463 usbd_get_page(td->pc, td->offset, &buf_res); 464 465 /* get correct length */ 466 if (buf_res.length > count) { 467 buf_res.length = count; 468 } 469 /* receive data */ 470 bus_space_read_multi_1(sc->sc_io_tag, sc->sc_io_hdl, 471 USS820_RXDAT * USS820_REG_STRIDE, buf_res.buffer, buf_res.length); 472 473 /* update counters */ 474 count -= buf_res.length; 475 td->offset += buf_res.length; 476 td->remainder -= buf_res.length; 477 } 478 479 /* set RXFFRC bit */ 480 rx_cntl = USS820_READ_1(sc, USS820_RXCON); 481 rx_cntl |= USS820_RXCON_RXFFRC; 482 USS820_WRITE_1(sc, USS820_RXCON, rx_cntl); 483 484 /* check if we are complete */ 485 if ((td->remainder == 0) || got_short) { 486 if (td->short_pkt) { 487 /* we are complete */ 488 return (0); 489 } 490 /* else need to receive a zero length packet */ 491 } 492 if (--to) { 493 goto repeat; 494 } 495 return (1); /* not complete */ 496 } 497 498 static uint8_t 499 uss820dci_data_tx(struct uss820dci_softc *sc, struct uss820dci_td *td) 500 { 501 struct usb_page_search buf_res; 502 uint16_t count; 503 uint16_t count_copy; 504 uint8_t rx_stat; 505 uint8_t tx_flag; 506 uint8_t to; 507 508 /* select the correct endpoint */ 509 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index); 510 511 to = 2; /* don't loop forever! */ 512 513 repeat: 514 /* read out TX FIFO flags */ 515 tx_flag = USS820_READ_1(sc, USS820_TXFLG); 516 517 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n", tx_flag, td->remainder); 518 519 if (td->ep_index == 0) { 520 /* read out RX FIFO status last */ 521 rx_stat = USS820_READ_1(sc, USS820_RXSTAT); 522 523 DPRINTFN(5, "rx_stat=0x%02x\n", rx_stat); 524 525 if (rx_stat & (USS820_RXSTAT_RXSETUP | 526 USS820_RXSTAT_RXSOVW | 527 USS820_RXSTAT_EDOVW)) { 528 /* 529 * The current transfer was aborted by the USB 530 * Host: 531 */ 532 td->error = 1; 533 return (0); /* complete */ 534 } 535 } 536 if (tx_flag & (USS820_TXFLG_TXOVF | 537 USS820_TXFLG_TXURF)) { 538 td->error = 1; 539 return (0); /* complete */ 540 } 541 if (tx_flag & USS820_TXFLG_TXFIF0) { 542 if (tx_flag & USS820_TXFLG_TXFIF1) { 543 return (1); /* not complete */ 544 } 545 } 546 if ((!td->support_multi_buffer) && 547 (tx_flag & (USS820_TXFLG_TXFIF0 | 548 USS820_TXFLG_TXFIF1))) { 549 return (1); /* not complete */ 550 } 551 count = td->max_packet_size; 552 if (td->remainder < count) { 553 /* we have a short packet */ 554 td->short_pkt = 1; 555 count = td->remainder; 556 } 557 count_copy = count; 558 while (count > 0) { 559 usbd_get_page(td->pc, td->offset, &buf_res); 560 561 /* get correct length */ 562 if (buf_res.length > count) { 563 buf_res.length = count; 564 } 565 /* transmit data */ 566 bus_space_write_multi_1(sc->sc_io_tag, sc->sc_io_hdl, 567 USS820_TXDAT * USS820_REG_STRIDE, buf_res.buffer, buf_res.length); 568 569 /* update counters */ 570 count -= buf_res.length; 571 td->offset += buf_res.length; 572 td->remainder -= buf_res.length; 573 } 574 575 /* post-write high packet byte count first */ 576 USS820_WRITE_1(sc, USS820_TXCNTH, count_copy >> 8); 577 578 /* post-write low packet byte count last */ 579 USS820_WRITE_1(sc, USS820_TXCNTL, count_copy); 580 581 /* 582 * Enable TX output, which must happen after that we have written 583 * data into the FIFO. This is undocumented. 584 */ 585 if (!td->did_enable) { 586 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc), 587 USS820_EPCON, 0xFF, USS820_EPCON_TXOE); 588 td->did_enable = 1; 589 } 590 /* check remainder */ 591 if (td->remainder == 0) { 592 if (td->short_pkt) { 593 return (0); /* complete */ 594 } 595 /* else we need to transmit a short packet */ 596 } 597 if (--to) { 598 goto repeat; 599 } 600 return (1); /* not complete */ 601 } 602 603 static uint8_t 604 uss820dci_data_tx_sync(struct uss820dci_softc *sc, struct uss820dci_td *td) 605 { 606 uint8_t rx_stat; 607 uint8_t tx_flag; 608 609 /* select the correct endpoint */ 610 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index); 611 612 /* read out TX FIFO flag */ 613 tx_flag = USS820_READ_1(sc, USS820_TXFLG); 614 615 if (td->ep_index == 0) { 616 /* read out RX FIFO status last */ 617 rx_stat = USS820_READ_1(sc, USS820_RXSTAT); 618 619 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder); 620 621 if (rx_stat & (USS820_RXSTAT_RXSETUP | 622 USS820_RXSTAT_RXSOVW | 623 USS820_RXSTAT_EDOVW)) { 624 DPRINTFN(5, "faking complete\n"); 625 /* Race condition */ 626 return (0); /* complete */ 627 } 628 } 629 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n", tx_flag, td->remainder); 630 631 if (tx_flag & (USS820_TXFLG_TXOVF | 632 USS820_TXFLG_TXURF)) { 633 td->error = 1; 634 return (0); /* complete */ 635 } 636 if (tx_flag & (USS820_TXFLG_TXFIF0 | 637 USS820_TXFLG_TXFIF1)) { 638 return (1); /* not complete */ 639 } 640 if (td->ep_index == 0 && sc->sc_dv_addr != 0xFF) { 641 /* write function address */ 642 uss820dci_set_address(sc, sc->sc_dv_addr); 643 } 644 return (0); /* complete */ 645 } 646 647 static void 648 uss820dci_xfer_do_fifo(struct usb_xfer *xfer) 649 { 650 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 651 struct uss820dci_td *td; 652 653 DPRINTFN(9, "\n"); 654 655 td = xfer->td_transfer_cache; 656 if (td == NULL) 657 return; 658 659 while (1) { 660 if ((td->func) (sc, td)) { 661 /* operation in progress */ 662 break; 663 } 664 if (((void *)td) == xfer->td_transfer_last) { 665 goto done; 666 } 667 if (td->error) { 668 goto done; 669 } else if (td->remainder > 0) { 670 /* 671 * We had a short transfer. If there is no alternate 672 * next, stop processing ! 673 */ 674 if (!td->alt_next) { 675 goto done; 676 } 677 } 678 /* 679 * Fetch the next transfer descriptor. 680 */ 681 td = td->obj_next; 682 xfer->td_transfer_cache = td; 683 } 684 return; 685 686 done: 687 /* compute all actual lengths */ 688 xfer->td_transfer_cache = NULL; 689 sc->sc_xfer_complete = 1; 690 } 691 692 static uint8_t 693 uss820dci_xfer_do_complete(struct usb_xfer *xfer) 694 { 695 struct uss820dci_td *td; 696 697 DPRINTFN(9, "\n"); 698 699 td = xfer->td_transfer_cache; 700 if (td == NULL) { 701 /* compute all actual lengths */ 702 uss820dci_standard_done(xfer); 703 return(1); 704 } 705 return (0); 706 } 707 708 static void 709 uss820dci_interrupt_poll_locked(struct uss820dci_softc *sc) 710 { 711 struct usb_xfer *xfer; 712 713 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) 714 uss820dci_xfer_do_fifo(xfer); 715 } 716 717 static void 718 uss820dci_interrupt_complete_locked(struct uss820dci_softc *sc) 719 { 720 struct usb_xfer *xfer; 721 repeat: 722 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) { 723 if (uss820dci_xfer_do_complete(xfer)) 724 goto repeat; 725 } 726 } 727 728 static void 729 uss820dci_wait_suspend(struct uss820dci_softc *sc, uint8_t on) 730 { 731 uint8_t scr; 732 uint8_t scratch; 733 734 scr = USS820_READ_1(sc, USS820_SCR); 735 scratch = USS820_READ_1(sc, USS820_SCRATCH); 736 737 if (on) { 738 scr |= USS820_SCR_IE_SUSP; 739 scratch &= ~USS820_SCRATCH_IE_RESUME; 740 } else { 741 scr &= ~USS820_SCR_IE_SUSP; 742 scratch |= USS820_SCRATCH_IE_RESUME; 743 } 744 745 USS820_WRITE_1(sc, USS820_SCR, scr); 746 USS820_WRITE_1(sc, USS820_SCRATCH, scratch); 747 } 748 749 int 750 uss820dci_filter_interrupt(void *arg) 751 { 752 struct uss820dci_softc *sc = arg; 753 int retval = FILTER_HANDLED; 754 uint8_t ssr; 755 756 USB_BUS_SPIN_LOCK(&sc->sc_bus); 757 758 ssr = USS820_READ_1(sc, USS820_SSR); 759 uss820dci_update_shared_1(sc, USS820_SSR, USS820_DCI_THREAD_IRQ, 0); 760 761 if (ssr & USS820_DCI_THREAD_IRQ) 762 retval = FILTER_SCHEDULE_THREAD; 763 764 /* poll FIFOs, if any */ 765 uss820dci_interrupt_poll_locked(sc); 766 767 if (sc->sc_xfer_complete != 0) 768 retval = FILTER_SCHEDULE_THREAD; 769 770 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 771 772 return (retval); 773 } 774 775 void 776 uss820dci_interrupt(void *arg) 777 { 778 struct uss820dci_softc *sc = arg; 779 uint8_t ssr; 780 uint8_t event; 781 782 USB_BUS_LOCK(&sc->sc_bus); 783 USB_BUS_SPIN_LOCK(&sc->sc_bus); 784 785 ssr = USS820_READ_1(sc, USS820_SSR); 786 787 /* acknowledge all interrupts */ 788 789 uss820dci_update_shared_1(sc, USS820_SSR, ~USS820_DCI_THREAD_IRQ, 0); 790 791 /* check for any bus state change interrupts */ 792 793 if (ssr & USS820_DCI_THREAD_IRQ) { 794 event = 0; 795 796 if (ssr & USS820_SSR_RESET) { 797 sc->sc_flags.status_bus_reset = 1; 798 sc->sc_flags.status_suspend = 0; 799 sc->sc_flags.change_suspend = 0; 800 sc->sc_flags.change_connect = 1; 801 802 /* disable resume interrupt */ 803 uss820dci_wait_suspend(sc, 1); 804 805 event = 1; 806 } 807 /* 808 * If "RESUME" and "SUSPEND" is set at the same time 809 * we interpret that like "RESUME". Resume is set when 810 * there is at least 3 milliseconds of inactivity on 811 * the USB BUS. 812 */ 813 if (ssr & USS820_SSR_RESUME) { 814 if (sc->sc_flags.status_suspend) { 815 sc->sc_flags.status_suspend = 0; 816 sc->sc_flags.change_suspend = 1; 817 /* disable resume interrupt */ 818 uss820dci_wait_suspend(sc, 1); 819 event = 1; 820 } 821 } else if (ssr & USS820_SSR_SUSPEND) { 822 if (!sc->sc_flags.status_suspend) { 823 sc->sc_flags.status_suspend = 1; 824 sc->sc_flags.change_suspend = 1; 825 /* enable resume interrupt */ 826 uss820dci_wait_suspend(sc, 0); 827 event = 1; 828 } 829 } 830 if (event) { 831 DPRINTF("real bus interrupt 0x%02x\n", ssr); 832 833 /* complete root HUB interrupt endpoint */ 834 uss820dci_root_intr(sc); 835 } 836 } 837 /* acknowledge all SBI interrupts */ 838 uss820dci_update_shared_1(sc, USS820_SBI, 0, 0); 839 840 /* acknowledge all SBI1 interrupts */ 841 uss820dci_update_shared_1(sc, USS820_SBI1, 0, 0); 842 843 if (sc->sc_xfer_complete != 0) { 844 sc->sc_xfer_complete = 0; 845 846 /* complete FIFOs, if any */ 847 uss820dci_interrupt_complete_locked(sc); 848 } 849 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 850 USB_BUS_UNLOCK(&sc->sc_bus); 851 } 852 853 static void 854 uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp) 855 { 856 struct uss820dci_td *td; 857 858 /* get current Transfer Descriptor */ 859 td = temp->td_next; 860 temp->td = td; 861 862 /* prepare for next TD */ 863 temp->td_next = td->obj_next; 864 865 /* fill out the Transfer Descriptor */ 866 td->func = temp->func; 867 td->pc = temp->pc; 868 td->offset = temp->offset; 869 td->remainder = temp->len; 870 td->error = 0; 871 td->did_enable = 0; 872 td->did_stall = temp->did_stall; 873 td->short_pkt = temp->short_pkt; 874 td->alt_next = temp->setup_alt_next; 875 } 876 877 static void 878 uss820dci_setup_standard_chain(struct usb_xfer *xfer) 879 { 880 struct uss820_std_temp temp; 881 struct uss820dci_softc *sc; 882 struct uss820dci_td *td; 883 uint32_t x; 884 uint8_t ep_no; 885 886 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n", 887 xfer->address, UE_GET_ADDR(xfer->endpointno), 888 xfer->sumlen, usbd_get_speed(xfer->xroot->udev)); 889 890 temp.max_frame_size = xfer->max_frame_size; 891 892 td = xfer->td_start[0]; 893 xfer->td_transfer_first = td; 894 xfer->td_transfer_cache = td; 895 896 /* setup temp */ 897 898 temp.pc = NULL; 899 temp.td = NULL; 900 temp.td_next = xfer->td_start[0]; 901 temp.offset = 0; 902 temp.setup_alt_next = xfer->flags_int.short_frames_ok || 903 xfer->flags_int.isochronous_xfr; 904 temp.did_stall = !xfer->flags_int.control_stall; 905 906 sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 907 ep_no = (xfer->endpointno & UE_ADDR); 908 909 /* check if we should prepend a setup message */ 910 911 if (xfer->flags_int.control_xfr) { 912 if (xfer->flags_int.control_hdr) { 913 temp.func = &uss820dci_setup_rx; 914 temp.len = xfer->frlengths[0]; 915 temp.pc = xfer->frbuffers + 0; 916 temp.short_pkt = temp.len ? 1 : 0; 917 /* check for last frame */ 918 if (xfer->nframes == 1) { 919 /* no STATUS stage yet, SETUP is last */ 920 if (xfer->flags_int.control_act) 921 temp.setup_alt_next = 0; 922 } 923 924 uss820dci_setup_standard_chain_sub(&temp); 925 } 926 x = 1; 927 } else { 928 x = 0; 929 } 930 931 if (x != xfer->nframes) { 932 if (xfer->endpointno & UE_DIR_IN) { 933 temp.func = &uss820dci_data_tx; 934 } else { 935 temp.func = &uss820dci_data_rx; 936 } 937 938 /* setup "pc" pointer */ 939 temp.pc = xfer->frbuffers + x; 940 } 941 while (x != xfer->nframes) { 942 /* DATA0 / DATA1 message */ 943 944 temp.len = xfer->frlengths[x]; 945 946 x++; 947 948 if (x == xfer->nframes) { 949 if (xfer->flags_int.control_xfr) { 950 if (xfer->flags_int.control_act) { 951 temp.setup_alt_next = 0; 952 } 953 } else { 954 temp.setup_alt_next = 0; 955 } 956 } 957 if (temp.len == 0) { 958 /* make sure that we send an USB packet */ 959 960 temp.short_pkt = 0; 961 962 } else { 963 /* regular data transfer */ 964 965 temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1; 966 } 967 968 uss820dci_setup_standard_chain_sub(&temp); 969 970 if (xfer->flags_int.isochronous_xfr) { 971 temp.offset += temp.len; 972 } else { 973 /* get next Page Cache pointer */ 974 temp.pc = xfer->frbuffers + x; 975 } 976 } 977 978 /* check for control transfer */ 979 if (xfer->flags_int.control_xfr) { 980 uint8_t need_sync; 981 982 /* always setup a valid "pc" pointer for status and sync */ 983 temp.pc = xfer->frbuffers + 0; 984 temp.len = 0; 985 temp.short_pkt = 0; 986 temp.setup_alt_next = 0; 987 988 /* check if we should append a status stage */ 989 if (!xfer->flags_int.control_act) { 990 /* 991 * Send a DATA1 message and invert the current 992 * endpoint direction. 993 */ 994 if (xfer->endpointno & UE_DIR_IN) { 995 temp.func = &uss820dci_data_rx; 996 need_sync = 0; 997 } else { 998 temp.func = &uss820dci_data_tx; 999 need_sync = 1; 1000 } 1001 temp.len = 0; 1002 temp.short_pkt = 0; 1003 1004 uss820dci_setup_standard_chain_sub(&temp); 1005 if (need_sync) { 1006 /* we need a SYNC point after TX */ 1007 temp.func = &uss820dci_data_tx_sync; 1008 uss820dci_setup_standard_chain_sub(&temp); 1009 } 1010 } 1011 } 1012 /* must have at least one frame! */ 1013 td = temp.td; 1014 xfer->td_transfer_last = td; 1015 } 1016 1017 static void 1018 uss820dci_timeout(void *arg) 1019 { 1020 struct usb_xfer *xfer = arg; 1021 1022 DPRINTF("xfer=%p\n", xfer); 1023 1024 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED); 1025 1026 /* transfer is transferred */ 1027 uss820dci_device_done(xfer, USB_ERR_TIMEOUT); 1028 } 1029 1030 static void 1031 uss820dci_intr_set(struct usb_xfer *xfer, uint8_t set) 1032 { 1033 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 1034 uint8_t ep_no = (xfer->endpointno & UE_ADDR); 1035 uint8_t ep_reg; 1036 uint8_t temp; 1037 1038 DPRINTFN(15, "endpoint 0x%02x\n", xfer->endpointno); 1039 1040 if (ep_no > 3) { 1041 ep_reg = USS820_SBIE1; 1042 } else { 1043 ep_reg = USS820_SBIE; 1044 } 1045 1046 ep_no &= 3; 1047 ep_no = 1 << (2 * ep_no); 1048 1049 if (xfer->flags_int.control_xfr) { 1050 if (xfer->flags_int.control_hdr) { 1051 ep_no <<= 1; /* RX interrupt only */ 1052 } else { 1053 ep_no |= (ep_no << 1); /* RX and TX interrupt */ 1054 } 1055 } else { 1056 if (!(xfer->endpointno & UE_DIR_IN)) { 1057 ep_no <<= 1; 1058 } 1059 } 1060 temp = USS820_READ_1(sc, ep_reg); 1061 if (set) { 1062 temp |= ep_no; 1063 } else { 1064 temp &= ~ep_no; 1065 } 1066 USS820_WRITE_1(sc, ep_reg, temp); 1067 } 1068 1069 static void 1070 uss820dci_start_standard_chain(struct usb_xfer *xfer) 1071 { 1072 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 1073 1074 DPRINTFN(9, "\n"); 1075 1076 USB_BUS_SPIN_LOCK(&sc->sc_bus); 1077 1078 /* poll one time */ 1079 uss820dci_xfer_do_fifo(xfer); 1080 1081 if (uss820dci_xfer_do_complete(xfer) == 0) { 1082 /* 1083 * Only enable the endpoint interrupt when we are 1084 * actually waiting for data, hence we are dealing 1085 * with level triggered interrupts ! 1086 */ 1087 uss820dci_intr_set(xfer, 1); 1088 1089 /* put transfer on interrupt queue */ 1090 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer); 1091 1092 /* start timeout, if any */ 1093 if (xfer->timeout != 0) { 1094 usbd_transfer_timeout_ms(xfer, 1095 &uss820dci_timeout, xfer->timeout); 1096 } 1097 } 1098 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 1099 } 1100 1101 static void 1102 uss820dci_root_intr(struct uss820dci_softc *sc) 1103 { 1104 DPRINTFN(9, "\n"); 1105 1106 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED); 1107 1108 /* set port bit */ 1109 sc->sc_hub_idata[0] = 0x02; /* we only have one port */ 1110 1111 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata, 1112 sizeof(sc->sc_hub_idata)); 1113 } 1114 1115 static usb_error_t 1116 uss820dci_standard_done_sub(struct usb_xfer *xfer) 1117 { 1118 struct uss820dci_td *td; 1119 uint32_t len; 1120 uint8_t error; 1121 1122 DPRINTFN(9, "\n"); 1123 1124 td = xfer->td_transfer_cache; 1125 1126 do { 1127 len = td->remainder; 1128 1129 if (xfer->aframes != xfer->nframes) { 1130 /* 1131 * Verify the length and subtract 1132 * the remainder from "frlengths[]": 1133 */ 1134 if (len > xfer->frlengths[xfer->aframes]) { 1135 td->error = 1; 1136 } else { 1137 xfer->frlengths[xfer->aframes] -= len; 1138 } 1139 } 1140 /* Check for transfer error */ 1141 if (td->error) { 1142 /* the transfer is finished */ 1143 error = 1; 1144 td = NULL; 1145 break; 1146 } 1147 /* Check for short transfer */ 1148 if (len > 0) { 1149 if (xfer->flags_int.short_frames_ok || 1150 xfer->flags_int.isochronous_xfr) { 1151 /* follow alt next */ 1152 if (td->alt_next) { 1153 td = td->obj_next; 1154 } else { 1155 td = NULL; 1156 } 1157 } else { 1158 /* the transfer is finished */ 1159 td = NULL; 1160 } 1161 error = 0; 1162 break; 1163 } 1164 td = td->obj_next; 1165 1166 /* this USB frame is complete */ 1167 error = 0; 1168 break; 1169 1170 } while (0); 1171 1172 /* update transfer cache */ 1173 1174 xfer->td_transfer_cache = td; 1175 1176 return (error ? 1177 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION); 1178 } 1179 1180 static void 1181 uss820dci_standard_done(struct usb_xfer *xfer) 1182 { 1183 usb_error_t err = 0; 1184 1185 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n", 1186 xfer, xfer->endpoint); 1187 1188 /* reset scanner */ 1189 1190 xfer->td_transfer_cache = xfer->td_transfer_first; 1191 1192 if (xfer->flags_int.control_xfr) { 1193 if (xfer->flags_int.control_hdr) { 1194 err = uss820dci_standard_done_sub(xfer); 1195 } 1196 xfer->aframes = 1; 1197 1198 if (xfer->td_transfer_cache == NULL) { 1199 goto done; 1200 } 1201 } 1202 while (xfer->aframes != xfer->nframes) { 1203 err = uss820dci_standard_done_sub(xfer); 1204 xfer->aframes++; 1205 1206 if (xfer->td_transfer_cache == NULL) { 1207 goto done; 1208 } 1209 } 1210 1211 if (xfer->flags_int.control_xfr && 1212 !xfer->flags_int.control_act) { 1213 err = uss820dci_standard_done_sub(xfer); 1214 } 1215 done: 1216 uss820dci_device_done(xfer, err); 1217 } 1218 1219 /*------------------------------------------------------------------------* 1220 * uss820dci_device_done 1221 * 1222 * NOTE: this function can be called more than one time on the 1223 * same USB transfer! 1224 *------------------------------------------------------------------------*/ 1225 static void 1226 uss820dci_device_done(struct usb_xfer *xfer, usb_error_t error) 1227 { 1228 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 1229 1230 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED); 1231 1232 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n", 1233 xfer, xfer->endpoint, error); 1234 1235 USB_BUS_SPIN_LOCK(&sc->sc_bus); 1236 1237 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) { 1238 uss820dci_intr_set(xfer, 0); 1239 } 1240 /* dequeue transfer and start next transfer */ 1241 usbd_transfer_done(xfer, error); 1242 1243 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 1244 } 1245 1246 static void 1247 uss820dci_xfer_stall(struct usb_xfer *xfer) 1248 { 1249 uss820dci_device_done(xfer, USB_ERR_STALLED); 1250 } 1251 1252 static void 1253 uss820dci_set_stall(struct usb_device *udev, 1254 struct usb_endpoint *ep, uint8_t *did_stall) 1255 { 1256 struct uss820dci_softc *sc; 1257 uint8_t ep_no; 1258 uint8_t ep_type; 1259 uint8_t ep_dir; 1260 uint8_t temp; 1261 1262 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED); 1263 1264 DPRINTFN(5, "endpoint=%p\n", ep); 1265 1266 /* set FORCESTALL */ 1267 sc = USS820_DCI_BUS2SC(udev->bus); 1268 ep_no = (ep->edesc->bEndpointAddress & UE_ADDR); 1269 ep_dir = (ep->edesc->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)); 1270 ep_type = (ep->edesc->bmAttributes & UE_XFERTYPE); 1271 1272 if (ep_type == UE_CONTROL) { 1273 /* should not happen */ 1274 return; 1275 } 1276 USB_BUS_SPIN_LOCK(&sc->sc_bus); 1277 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no); 1278 1279 if (ep_dir == UE_DIR_IN) { 1280 temp = USS820_EPCON_TXSTL; 1281 } else { 1282 temp = USS820_EPCON_RXSTL; 1283 } 1284 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp); 1285 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 1286 } 1287 1288 static void 1289 uss820dci_clear_stall_sub(struct uss820dci_softc *sc, 1290 uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir) 1291 { 1292 uint8_t temp; 1293 1294 if (ep_type == UE_CONTROL) { 1295 /* clearing stall is not needed */ 1296 return; 1297 } 1298 USB_BUS_SPIN_LOCK(&sc->sc_bus); 1299 1300 /* select endpoint index */ 1301 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no); 1302 1303 /* clear stall and disable I/O transfers */ 1304 if (ep_dir == UE_DIR_IN) { 1305 temp = 0xFF ^ (USS820_EPCON_TXOE | 1306 USS820_EPCON_TXSTL); 1307 } else { 1308 temp = 0xFF ^ (USS820_EPCON_RXIE | 1309 USS820_EPCON_RXSTL); 1310 } 1311 uss820dci_update_shared_1(sc, USS820_EPCON, temp, 0); 1312 1313 if (ep_dir == UE_DIR_IN) { 1314 /* reset data toggle */ 1315 USS820_WRITE_1(sc, USS820_TXSTAT, 1316 USS820_TXSTAT_TXSOVW); 1317 1318 /* reset FIFO */ 1319 temp = USS820_READ_1(sc, USS820_TXCON); 1320 temp |= USS820_TXCON_TXCLR; 1321 USS820_WRITE_1(sc, USS820_TXCON, temp); 1322 temp &= ~USS820_TXCON_TXCLR; 1323 USS820_WRITE_1(sc, USS820_TXCON, temp); 1324 } else { 1325 /* reset data toggle */ 1326 uss820dci_update_shared_1(sc, USS820_RXSTAT, 1327 0, USS820_RXSTAT_RXSOVW); 1328 1329 /* reset FIFO */ 1330 temp = USS820_READ_1(sc, USS820_RXCON); 1331 temp |= USS820_RXCON_RXCLR; 1332 temp &= ~USS820_RXCON_RXFFRC; 1333 USS820_WRITE_1(sc, USS820_RXCON, temp); 1334 temp &= ~USS820_RXCON_RXCLR; 1335 USS820_WRITE_1(sc, USS820_RXCON, temp); 1336 } 1337 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 1338 } 1339 1340 static void 1341 uss820dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep) 1342 { 1343 struct uss820dci_softc *sc; 1344 struct usb_endpoint_descriptor *ed; 1345 1346 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED); 1347 1348 DPRINTFN(5, "endpoint=%p\n", ep); 1349 1350 /* check mode */ 1351 if (udev->flags.usb_mode != USB_MODE_DEVICE) { 1352 /* not supported */ 1353 return; 1354 } 1355 /* get softc */ 1356 sc = USS820_DCI_BUS2SC(udev->bus); 1357 1358 /* get endpoint descriptor */ 1359 ed = ep->edesc; 1360 1361 /* reset endpoint */ 1362 uss820dci_clear_stall_sub(sc, 1363 (ed->bEndpointAddress & UE_ADDR), 1364 (ed->bmAttributes & UE_XFERTYPE), 1365 (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT))); 1366 } 1367 1368 usb_error_t 1369 uss820dci_init(struct uss820dci_softc *sc) 1370 { 1371 const struct usb_hw_ep_profile *pf; 1372 uint8_t n; 1373 uint8_t temp; 1374 1375 DPRINTF("start\n"); 1376 1377 /* set up the bus structure */ 1378 sc->sc_bus.usbrev = USB_REV_1_1; 1379 sc->sc_bus.methods = &uss820dci_bus_methods; 1380 1381 USB_BUS_LOCK(&sc->sc_bus); 1382 1383 /* we always have VBUS */ 1384 sc->sc_flags.status_vbus = 1; 1385 1386 /* reset the chip */ 1387 USS820_WRITE_1(sc, USS820_SCR, USS820_SCR_SRESET); 1388 DELAY(100); 1389 USS820_WRITE_1(sc, USS820_SCR, 0); 1390 1391 /* wait for reset to complete */ 1392 for (n = 0;; n++) { 1393 temp = USS820_READ_1(sc, USS820_MCSR); 1394 1395 if (temp & USS820_MCSR_INIT) { 1396 break; 1397 } 1398 if (n == 100) { 1399 USB_BUS_UNLOCK(&sc->sc_bus); 1400 return (USB_ERR_INVAL); 1401 } 1402 /* wait a little for things to stabilise */ 1403 DELAY(100); 1404 } 1405 1406 /* do a pulldown */ 1407 uss820dci_pull_down(sc); 1408 1409 /* wait 10ms for pulldown to stabilise */ 1410 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100); 1411 1412 /* check hardware revision */ 1413 temp = USS820_READ_1(sc, USS820_REV); 1414 1415 if (temp < 0x13) { 1416 USB_BUS_UNLOCK(&sc->sc_bus); 1417 return (USB_ERR_INVAL); 1418 } 1419 /* enable interrupts */ 1420 USS820_WRITE_1(sc, USS820_SCR, 1421 USS820_SCR_T_IRQ | 1422 USS820_SCR_IE_RESET | 1423 /* USS820_SCR_RWUPE | */ 1424 USS820_SCR_IE_SUSP | 1425 USS820_SCR_IRQPOL); 1426 1427 /* enable interrupts */ 1428 USS820_WRITE_1(sc, USS820_SCRATCH, 1429 USS820_SCRATCH_IE_RESUME); 1430 1431 /* enable features */ 1432 USS820_WRITE_1(sc, USS820_MCSR, 1433 USS820_MCSR_BDFEAT | 1434 USS820_MCSR_FEAT); 1435 1436 sc->sc_flags.mcsr_feat = 1; 1437 1438 /* disable interrupts */ 1439 USS820_WRITE_1(sc, USS820_SBIE, 0); 1440 1441 /* disable interrupts */ 1442 USS820_WRITE_1(sc, USS820_SBIE1, 0); 1443 1444 /* disable all endpoints */ 1445 for (n = 0; n != USS820_EP_MAX; n++) { 1446 /* select endpoint */ 1447 USS820_WRITE_1(sc, USS820_EPINDEX, n); 1448 1449 /* disable endpoint */ 1450 uss820dci_update_shared_1(sc, USS820_EPCON, 0, 0); 1451 } 1452 1453 /* 1454 * Initialise default values for some registers that cannot be 1455 * changed during operation! 1456 */ 1457 for (n = 0; n != USS820_EP_MAX; n++) { 1458 uss820dci_get_hw_ep_profile(NULL, &pf, n); 1459 1460 /* the maximum frame sizes should be the same */ 1461 if (pf->max_in_frame_size != pf->max_out_frame_size) { 1462 DPRINTF("Max frame size mismatch %u != %u\n", 1463 pf->max_in_frame_size, pf->max_out_frame_size); 1464 } 1465 if (pf->support_isochronous) { 1466 if (pf->max_in_frame_size <= 64) { 1467 temp = (USS820_TXCON_FFSZ_16_64 | 1468 USS820_TXCON_TXISO | 1469 USS820_TXCON_ATM); 1470 } else if (pf->max_in_frame_size <= 256) { 1471 temp = (USS820_TXCON_FFSZ_64_256 | 1472 USS820_TXCON_TXISO | 1473 USS820_TXCON_ATM); 1474 } else if (pf->max_in_frame_size <= 512) { 1475 temp = (USS820_TXCON_FFSZ_8_512 | 1476 USS820_TXCON_TXISO | 1477 USS820_TXCON_ATM); 1478 } else { /* 1024 bytes */ 1479 temp = (USS820_TXCON_FFSZ_32_1024 | 1480 USS820_TXCON_TXISO | 1481 USS820_TXCON_ATM); 1482 } 1483 } else { 1484 if ((pf->max_in_frame_size <= 8) && 1485 (sc->sc_flags.mcsr_feat)) { 1486 temp = (USS820_TXCON_FFSZ_8_512 | 1487 USS820_TXCON_ATM); 1488 } else if (pf->max_in_frame_size <= 16) { 1489 temp = (USS820_TXCON_FFSZ_16_64 | 1490 USS820_TXCON_ATM); 1491 } else if ((pf->max_in_frame_size <= 32) && 1492 (sc->sc_flags.mcsr_feat)) { 1493 temp = (USS820_TXCON_FFSZ_32_1024 | 1494 USS820_TXCON_ATM); 1495 } else { /* 64 bytes */ 1496 temp = (USS820_TXCON_FFSZ_64_256 | 1497 USS820_TXCON_ATM); 1498 } 1499 } 1500 1501 /* need to configure the chip early */ 1502 1503 USS820_WRITE_1(sc, USS820_EPINDEX, n); 1504 USS820_WRITE_1(sc, USS820_TXCON, temp); 1505 USS820_WRITE_1(sc, USS820_RXCON, temp); 1506 1507 if (pf->support_control) { 1508 temp = USS820_EPCON_CTLEP | 1509 USS820_EPCON_RXSPM | 1510 USS820_EPCON_RXIE | 1511 USS820_EPCON_RXEPEN | 1512 USS820_EPCON_TXOE | 1513 USS820_EPCON_TXEPEN; 1514 } else { 1515 temp = USS820_EPCON_RXEPEN | USS820_EPCON_TXEPEN; 1516 } 1517 1518 uss820dci_update_shared_1(sc, USS820_EPCON, 0, temp); 1519 } 1520 1521 USB_BUS_UNLOCK(&sc->sc_bus); 1522 1523 /* catch any lost interrupts */ 1524 1525 uss820dci_do_poll(&sc->sc_bus); 1526 1527 return (0); /* success */ 1528 } 1529 1530 void 1531 uss820dci_uninit(struct uss820dci_softc *sc) 1532 { 1533 uint8_t temp; 1534 1535 USB_BUS_LOCK(&sc->sc_bus); 1536 1537 /* disable all interrupts */ 1538 temp = USS820_READ_1(sc, USS820_SCR); 1539 temp &= ~USS820_SCR_T_IRQ; 1540 USS820_WRITE_1(sc, USS820_SCR, temp); 1541 1542 sc->sc_flags.port_powered = 0; 1543 sc->sc_flags.status_vbus = 0; 1544 sc->sc_flags.status_bus_reset = 0; 1545 sc->sc_flags.status_suspend = 0; 1546 sc->sc_flags.change_suspend = 0; 1547 sc->sc_flags.change_connect = 1; 1548 1549 uss820dci_pull_down(sc); 1550 USB_BUS_UNLOCK(&sc->sc_bus); 1551 } 1552 1553 static void 1554 uss820dci_suspend(struct uss820dci_softc *sc) 1555 { 1556 /* TODO */ 1557 } 1558 1559 static void 1560 uss820dci_resume(struct uss820dci_softc *sc) 1561 { 1562 /* TODO */ 1563 } 1564 1565 static void 1566 uss820dci_do_poll(struct usb_bus *bus) 1567 { 1568 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus); 1569 1570 USB_BUS_LOCK(&sc->sc_bus); 1571 USB_BUS_SPIN_LOCK(&sc->sc_bus); 1572 uss820dci_interrupt_poll_locked(sc); 1573 uss820dci_interrupt_complete_locked(sc); 1574 USB_BUS_SPIN_UNLOCK(&sc->sc_bus); 1575 USB_BUS_UNLOCK(&sc->sc_bus); 1576 } 1577 1578 /*------------------------------------------------------------------------* 1579 * uss820dci bulk support 1580 *------------------------------------------------------------------------*/ 1581 static void 1582 uss820dci_device_bulk_open(struct usb_xfer *xfer) 1583 { 1584 return; 1585 } 1586 1587 static void 1588 uss820dci_device_bulk_close(struct usb_xfer *xfer) 1589 { 1590 uss820dci_device_done(xfer, USB_ERR_CANCELLED); 1591 } 1592 1593 static void 1594 uss820dci_device_bulk_enter(struct usb_xfer *xfer) 1595 { 1596 return; 1597 } 1598 1599 static void 1600 uss820dci_device_bulk_start(struct usb_xfer *xfer) 1601 { 1602 /* setup TDs */ 1603 uss820dci_setup_standard_chain(xfer); 1604 uss820dci_start_standard_chain(xfer); 1605 } 1606 1607 static const struct usb_pipe_methods uss820dci_device_bulk_methods = 1608 { 1609 .open = uss820dci_device_bulk_open, 1610 .close = uss820dci_device_bulk_close, 1611 .enter = uss820dci_device_bulk_enter, 1612 .start = uss820dci_device_bulk_start, 1613 }; 1614 1615 /*------------------------------------------------------------------------* 1616 * uss820dci control support 1617 *------------------------------------------------------------------------*/ 1618 static void 1619 uss820dci_device_ctrl_open(struct usb_xfer *xfer) 1620 { 1621 return; 1622 } 1623 1624 static void 1625 uss820dci_device_ctrl_close(struct usb_xfer *xfer) 1626 { 1627 uss820dci_device_done(xfer, USB_ERR_CANCELLED); 1628 } 1629 1630 static void 1631 uss820dci_device_ctrl_enter(struct usb_xfer *xfer) 1632 { 1633 return; 1634 } 1635 1636 static void 1637 uss820dci_device_ctrl_start(struct usb_xfer *xfer) 1638 { 1639 /* setup TDs */ 1640 uss820dci_setup_standard_chain(xfer); 1641 uss820dci_start_standard_chain(xfer); 1642 } 1643 1644 static const struct usb_pipe_methods uss820dci_device_ctrl_methods = 1645 { 1646 .open = uss820dci_device_ctrl_open, 1647 .close = uss820dci_device_ctrl_close, 1648 .enter = uss820dci_device_ctrl_enter, 1649 .start = uss820dci_device_ctrl_start, 1650 }; 1651 1652 /*------------------------------------------------------------------------* 1653 * uss820dci interrupt support 1654 *------------------------------------------------------------------------*/ 1655 static void 1656 uss820dci_device_intr_open(struct usb_xfer *xfer) 1657 { 1658 return; 1659 } 1660 1661 static void 1662 uss820dci_device_intr_close(struct usb_xfer *xfer) 1663 { 1664 uss820dci_device_done(xfer, USB_ERR_CANCELLED); 1665 } 1666 1667 static void 1668 uss820dci_device_intr_enter(struct usb_xfer *xfer) 1669 { 1670 return; 1671 } 1672 1673 static void 1674 uss820dci_device_intr_start(struct usb_xfer *xfer) 1675 { 1676 /* setup TDs */ 1677 uss820dci_setup_standard_chain(xfer); 1678 uss820dci_start_standard_chain(xfer); 1679 } 1680 1681 static const struct usb_pipe_methods uss820dci_device_intr_methods = 1682 { 1683 .open = uss820dci_device_intr_open, 1684 .close = uss820dci_device_intr_close, 1685 .enter = uss820dci_device_intr_enter, 1686 .start = uss820dci_device_intr_start, 1687 }; 1688 1689 /*------------------------------------------------------------------------* 1690 * uss820dci full speed isochronous support 1691 *------------------------------------------------------------------------*/ 1692 static void 1693 uss820dci_device_isoc_fs_open(struct usb_xfer *xfer) 1694 { 1695 return; 1696 } 1697 1698 static void 1699 uss820dci_device_isoc_fs_close(struct usb_xfer *xfer) 1700 { 1701 uss820dci_device_done(xfer, USB_ERR_CANCELLED); 1702 } 1703 1704 static void 1705 uss820dci_device_isoc_fs_enter(struct usb_xfer *xfer) 1706 { 1707 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus); 1708 uint32_t nframes; 1709 1710 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n", 1711 xfer, xfer->endpoint->isoc_next, xfer->nframes); 1712 1713 /* get the current frame index - we don't need the high bits */ 1714 1715 nframes = USS820_READ_1(sc, USS820_SOFL); 1716 1717 if (usbd_xfer_get_isochronous_start_frame( 1718 xfer, nframes, 0, 1, USS820_SOFL_MASK, NULL)) 1719 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next); 1720 1721 /* setup TDs */ 1722 uss820dci_setup_standard_chain(xfer); 1723 } 1724 1725 static void 1726 uss820dci_device_isoc_fs_start(struct usb_xfer *xfer) 1727 { 1728 /* start TD chain */ 1729 uss820dci_start_standard_chain(xfer); 1730 } 1731 1732 static const struct usb_pipe_methods uss820dci_device_isoc_fs_methods = 1733 { 1734 .open = uss820dci_device_isoc_fs_open, 1735 .close = uss820dci_device_isoc_fs_close, 1736 .enter = uss820dci_device_isoc_fs_enter, 1737 .start = uss820dci_device_isoc_fs_start, 1738 }; 1739 1740 /*------------------------------------------------------------------------* 1741 * uss820dci root control support 1742 *------------------------------------------------------------------------* 1743 * Simulate a hardware HUB by handling all the necessary requests. 1744 *------------------------------------------------------------------------*/ 1745 1746 static const struct usb_device_descriptor uss820dci_devd = { 1747 .bLength = sizeof(struct usb_device_descriptor), 1748 .bDescriptorType = UDESC_DEVICE, 1749 .bcdUSB = {0x00, 0x02}, 1750 .bDeviceClass = UDCLASS_HUB, 1751 .bDeviceSubClass = UDSUBCLASS_HUB, 1752 .bDeviceProtocol = UDPROTO_FSHUB, 1753 .bMaxPacketSize = 64, 1754 .bcdDevice = {0x00, 0x01}, 1755 .iManufacturer = 1, 1756 .iProduct = 2, 1757 .bNumConfigurations = 1, 1758 }; 1759 1760 static const struct usb_device_qualifier uss820dci_odevd = { 1761 .bLength = sizeof(struct usb_device_qualifier), 1762 .bDescriptorType = UDESC_DEVICE_QUALIFIER, 1763 .bcdUSB = {0x00, 0x02}, 1764 .bDeviceClass = UDCLASS_HUB, 1765 .bDeviceSubClass = UDSUBCLASS_HUB, 1766 .bDeviceProtocol = UDPROTO_FSHUB, 1767 .bMaxPacketSize0 = 0, 1768 .bNumConfigurations = 0, 1769 }; 1770 1771 static const struct uss820dci_config_desc uss820dci_confd = { 1772 .confd = { 1773 .bLength = sizeof(struct usb_config_descriptor), 1774 .bDescriptorType = UDESC_CONFIG, 1775 .wTotalLength[0] = sizeof(uss820dci_confd), 1776 .bNumInterface = 1, 1777 .bConfigurationValue = 1, 1778 .iConfiguration = 0, 1779 .bmAttributes = UC_SELF_POWERED, 1780 .bMaxPower = 0, 1781 }, 1782 .ifcd = { 1783 .bLength = sizeof(struct usb_interface_descriptor), 1784 .bDescriptorType = UDESC_INTERFACE, 1785 .bNumEndpoints = 1, 1786 .bInterfaceClass = UICLASS_HUB, 1787 .bInterfaceSubClass = UISUBCLASS_HUB, 1788 .bInterfaceProtocol = 0, 1789 }, 1790 1791 .endpd = { 1792 .bLength = sizeof(struct usb_endpoint_descriptor), 1793 .bDescriptorType = UDESC_ENDPOINT, 1794 .bEndpointAddress = (UE_DIR_IN | USS820_DCI_INTR_ENDPT), 1795 .bmAttributes = UE_INTERRUPT, 1796 .wMaxPacketSize[0] = 8, 1797 .bInterval = 255, 1798 }, 1799 }; 1800 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) } 1801 1802 static const struct usb_hub_descriptor_min uss820dci_hubd = { 1803 .bDescLength = sizeof(uss820dci_hubd), 1804 .bDescriptorType = UDESC_HUB, 1805 .bNbrPorts = 1, 1806 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)), 1807 .bPwrOn2PwrGood = 50, 1808 .bHubContrCurrent = 0, 1809 .DeviceRemovable = {0}, /* port is removable */ 1810 }; 1811 1812 #define STRING_VENDOR \ 1813 "A\0G\0E\0R\0E" 1814 1815 #define STRING_PRODUCT \ 1816 "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B" 1817 1818 USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor); 1819 USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product); 1820 1821 static usb_error_t 1822 uss820dci_roothub_exec(struct usb_device *udev, 1823 struct usb_device_request *req, const void **pptr, uint16_t *plength) 1824 { 1825 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus); 1826 const void *ptr; 1827 uint16_t len; 1828 uint16_t value; 1829 uint16_t index; 1830 usb_error_t err; 1831 1832 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED); 1833 1834 /* buffer reset */ 1835 ptr = (const void *)&sc->sc_hub_temp; 1836 len = 0; 1837 err = 0; 1838 1839 value = UGETW(req->wValue); 1840 index = UGETW(req->wIndex); 1841 1842 /* demultiplex the control request */ 1843 1844 switch (req->bmRequestType) { 1845 case UT_READ_DEVICE: 1846 switch (req->bRequest) { 1847 case UR_GET_DESCRIPTOR: 1848 goto tr_handle_get_descriptor; 1849 case UR_GET_CONFIG: 1850 goto tr_handle_get_config; 1851 case UR_GET_STATUS: 1852 goto tr_handle_get_status; 1853 default: 1854 goto tr_stalled; 1855 } 1856 break; 1857 1858 case UT_WRITE_DEVICE: 1859 switch (req->bRequest) { 1860 case UR_SET_ADDRESS: 1861 goto tr_handle_set_address; 1862 case UR_SET_CONFIG: 1863 goto tr_handle_set_config; 1864 case UR_CLEAR_FEATURE: 1865 goto tr_valid; /* nop */ 1866 case UR_SET_DESCRIPTOR: 1867 goto tr_valid; /* nop */ 1868 case UR_SET_FEATURE: 1869 default: 1870 goto tr_stalled; 1871 } 1872 break; 1873 1874 case UT_WRITE_ENDPOINT: 1875 switch (req->bRequest) { 1876 case UR_CLEAR_FEATURE: 1877 switch (UGETW(req->wValue)) { 1878 case UF_ENDPOINT_HALT: 1879 goto tr_handle_clear_halt; 1880 case UF_DEVICE_REMOTE_WAKEUP: 1881 goto tr_handle_clear_wakeup; 1882 default: 1883 goto tr_stalled; 1884 } 1885 break; 1886 case UR_SET_FEATURE: 1887 switch (UGETW(req->wValue)) { 1888 case UF_ENDPOINT_HALT: 1889 goto tr_handle_set_halt; 1890 case UF_DEVICE_REMOTE_WAKEUP: 1891 goto tr_handle_set_wakeup; 1892 default: 1893 goto tr_stalled; 1894 } 1895 break; 1896 case UR_SYNCH_FRAME: 1897 goto tr_valid; /* nop */ 1898 default: 1899 goto tr_stalled; 1900 } 1901 break; 1902 1903 case UT_READ_ENDPOINT: 1904 switch (req->bRequest) { 1905 case UR_GET_STATUS: 1906 goto tr_handle_get_ep_status; 1907 default: 1908 goto tr_stalled; 1909 } 1910 break; 1911 1912 case UT_WRITE_INTERFACE: 1913 switch (req->bRequest) { 1914 case UR_SET_INTERFACE: 1915 goto tr_handle_set_interface; 1916 case UR_CLEAR_FEATURE: 1917 goto tr_valid; /* nop */ 1918 case UR_SET_FEATURE: 1919 default: 1920 goto tr_stalled; 1921 } 1922 break; 1923 1924 case UT_READ_INTERFACE: 1925 switch (req->bRequest) { 1926 case UR_GET_INTERFACE: 1927 goto tr_handle_get_interface; 1928 case UR_GET_STATUS: 1929 goto tr_handle_get_iface_status; 1930 default: 1931 goto tr_stalled; 1932 } 1933 break; 1934 1935 case UT_WRITE_CLASS_INTERFACE: 1936 case UT_WRITE_VENDOR_INTERFACE: 1937 /* XXX forward */ 1938 break; 1939 1940 case UT_READ_CLASS_INTERFACE: 1941 case UT_READ_VENDOR_INTERFACE: 1942 /* XXX forward */ 1943 break; 1944 1945 case UT_WRITE_CLASS_DEVICE: 1946 switch (req->bRequest) { 1947 case UR_CLEAR_FEATURE: 1948 goto tr_valid; 1949 case UR_SET_DESCRIPTOR: 1950 case UR_SET_FEATURE: 1951 break; 1952 default: 1953 goto tr_stalled; 1954 } 1955 break; 1956 1957 case UT_WRITE_CLASS_OTHER: 1958 switch (req->bRequest) { 1959 case UR_CLEAR_FEATURE: 1960 goto tr_handle_clear_port_feature; 1961 case UR_SET_FEATURE: 1962 goto tr_handle_set_port_feature; 1963 case UR_CLEAR_TT_BUFFER: 1964 case UR_RESET_TT: 1965 case UR_STOP_TT: 1966 goto tr_valid; 1967 1968 default: 1969 goto tr_stalled; 1970 } 1971 break; 1972 1973 case UT_READ_CLASS_OTHER: 1974 switch (req->bRequest) { 1975 case UR_GET_TT_STATE: 1976 goto tr_handle_get_tt_state; 1977 case UR_GET_STATUS: 1978 goto tr_handle_get_port_status; 1979 default: 1980 goto tr_stalled; 1981 } 1982 break; 1983 1984 case UT_READ_CLASS_DEVICE: 1985 switch (req->bRequest) { 1986 case UR_GET_DESCRIPTOR: 1987 goto tr_handle_get_class_descriptor; 1988 case UR_GET_STATUS: 1989 goto tr_handle_get_class_status; 1990 1991 default: 1992 goto tr_stalled; 1993 } 1994 break; 1995 default: 1996 goto tr_stalled; 1997 } 1998 goto tr_valid; 1999 2000 tr_handle_get_descriptor: 2001 switch (value >> 8) { 2002 case UDESC_DEVICE: 2003 if (value & 0xff) { 2004 goto tr_stalled; 2005 } 2006 len = sizeof(uss820dci_devd); 2007 ptr = (const void *)&uss820dci_devd; 2008 goto tr_valid; 2009 case UDESC_DEVICE_QUALIFIER: 2010 if (value & 0xff) { 2011 goto tr_stalled; 2012 } 2013 len = sizeof(uss820dci_odevd); 2014 ptr = (const void *)&uss820dci_odevd; 2015 goto tr_valid; 2016 case UDESC_CONFIG: 2017 if (value & 0xff) { 2018 goto tr_stalled; 2019 } 2020 len = sizeof(uss820dci_confd); 2021 ptr = (const void *)&uss820dci_confd; 2022 goto tr_valid; 2023 case UDESC_STRING: 2024 switch (value & 0xff) { 2025 case 0: /* Language table */ 2026 len = sizeof(usb_string_lang_en); 2027 ptr = (const void *)&usb_string_lang_en; 2028 goto tr_valid; 2029 2030 case 1: /* Vendor */ 2031 len = sizeof(uss820dci_vendor); 2032 ptr = (const void *)&uss820dci_vendor; 2033 goto tr_valid; 2034 2035 case 2: /* Product */ 2036 len = sizeof(uss820dci_product); 2037 ptr = (const void *)&uss820dci_product; 2038 goto tr_valid; 2039 default: 2040 break; 2041 } 2042 break; 2043 default: 2044 goto tr_stalled; 2045 } 2046 goto tr_stalled; 2047 2048 tr_handle_get_config: 2049 len = 1; 2050 sc->sc_hub_temp.wValue[0] = sc->sc_conf; 2051 goto tr_valid; 2052 2053 tr_handle_get_status: 2054 len = 2; 2055 USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED); 2056 goto tr_valid; 2057 2058 tr_handle_set_address: 2059 if (value & 0xFF00) { 2060 goto tr_stalled; 2061 } 2062 sc->sc_rt_addr = value; 2063 goto tr_valid; 2064 2065 tr_handle_set_config: 2066 if (value >= 2) { 2067 goto tr_stalled; 2068 } 2069 sc->sc_conf = value; 2070 goto tr_valid; 2071 2072 tr_handle_get_interface: 2073 len = 1; 2074 sc->sc_hub_temp.wValue[0] = 0; 2075 goto tr_valid; 2076 2077 tr_handle_get_tt_state: 2078 tr_handle_get_class_status: 2079 tr_handle_get_iface_status: 2080 tr_handle_get_ep_status: 2081 len = 2; 2082 USETW(sc->sc_hub_temp.wValue, 0); 2083 goto tr_valid; 2084 2085 tr_handle_set_halt: 2086 tr_handle_set_interface: 2087 tr_handle_set_wakeup: 2088 tr_handle_clear_wakeup: 2089 tr_handle_clear_halt: 2090 goto tr_valid; 2091 2092 tr_handle_clear_port_feature: 2093 if (index != 1) { 2094 goto tr_stalled; 2095 } 2096 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index); 2097 2098 switch (value) { 2099 case UHF_PORT_SUSPEND: 2100 uss820dci_wakeup_peer(sc); 2101 break; 2102 2103 case UHF_PORT_ENABLE: 2104 sc->sc_flags.port_enabled = 0; 2105 break; 2106 2107 case UHF_PORT_TEST: 2108 case UHF_PORT_INDICATOR: 2109 case UHF_C_PORT_ENABLE: 2110 case UHF_C_PORT_OVER_CURRENT: 2111 case UHF_C_PORT_RESET: 2112 /* nops */ 2113 break; 2114 case UHF_PORT_POWER: 2115 sc->sc_flags.port_powered = 0; 2116 uss820dci_pull_down(sc); 2117 break; 2118 case UHF_C_PORT_CONNECTION: 2119 sc->sc_flags.change_connect = 0; 2120 break; 2121 case UHF_C_PORT_SUSPEND: 2122 sc->sc_flags.change_suspend = 0; 2123 break; 2124 default: 2125 err = USB_ERR_IOERROR; 2126 goto done; 2127 } 2128 goto tr_valid; 2129 2130 tr_handle_set_port_feature: 2131 if (index != 1) { 2132 goto tr_stalled; 2133 } 2134 DPRINTFN(9, "UR_SET_PORT_FEATURE\n"); 2135 2136 switch (value) { 2137 case UHF_PORT_ENABLE: 2138 sc->sc_flags.port_enabled = 1; 2139 break; 2140 case UHF_PORT_SUSPEND: 2141 case UHF_PORT_RESET: 2142 case UHF_PORT_TEST: 2143 case UHF_PORT_INDICATOR: 2144 /* nops */ 2145 break; 2146 case UHF_PORT_POWER: 2147 sc->sc_flags.port_powered = 1; 2148 break; 2149 default: 2150 err = USB_ERR_IOERROR; 2151 goto done; 2152 } 2153 goto tr_valid; 2154 2155 tr_handle_get_port_status: 2156 2157 DPRINTFN(9, "UR_GET_PORT_STATUS\n"); 2158 2159 if (index != 1) { 2160 goto tr_stalled; 2161 } 2162 if (sc->sc_flags.status_vbus) { 2163 uss820dci_pull_up(sc); 2164 } else { 2165 uss820dci_pull_down(sc); 2166 } 2167 2168 /* Select FULL-speed and Device Side Mode */ 2169 2170 value = UPS_PORT_MODE_DEVICE; 2171 2172 if (sc->sc_flags.port_powered) { 2173 value |= UPS_PORT_POWER; 2174 } 2175 if (sc->sc_flags.port_enabled) { 2176 value |= UPS_PORT_ENABLED; 2177 } 2178 if (sc->sc_flags.status_vbus && 2179 sc->sc_flags.status_bus_reset) { 2180 value |= UPS_CURRENT_CONNECT_STATUS; 2181 } 2182 if (sc->sc_flags.status_suspend) { 2183 value |= UPS_SUSPEND; 2184 } 2185 USETW(sc->sc_hub_temp.ps.wPortStatus, value); 2186 2187 value = 0; 2188 2189 if (sc->sc_flags.change_connect) { 2190 value |= UPS_C_CONNECT_STATUS; 2191 } 2192 if (sc->sc_flags.change_suspend) { 2193 value |= UPS_C_SUSPEND; 2194 } 2195 USETW(sc->sc_hub_temp.ps.wPortChange, value); 2196 len = sizeof(sc->sc_hub_temp.ps); 2197 goto tr_valid; 2198 2199 tr_handle_get_class_descriptor: 2200 if (value & 0xFF) { 2201 goto tr_stalled; 2202 } 2203 ptr = (const void *)&uss820dci_hubd; 2204 len = sizeof(uss820dci_hubd); 2205 goto tr_valid; 2206 2207 tr_stalled: 2208 err = USB_ERR_STALLED; 2209 tr_valid: 2210 done: 2211 *plength = len; 2212 *pptr = ptr; 2213 return (err); 2214 } 2215 2216 static void 2217 uss820dci_xfer_setup(struct usb_setup_params *parm) 2218 { 2219 const struct usb_hw_ep_profile *pf; 2220 struct uss820dci_softc *sc; 2221 struct usb_xfer *xfer; 2222 void *last_obj; 2223 uint32_t ntd; 2224 uint32_t n; 2225 uint8_t ep_no; 2226 2227 sc = USS820_DCI_BUS2SC(parm->udev->bus); 2228 xfer = parm->curr_xfer; 2229 2230 /* 2231 * NOTE: This driver does not use any of the parameters that 2232 * are computed from the following values. Just set some 2233 * reasonable dummies: 2234 */ 2235 parm->hc_max_packet_size = 0x500; 2236 parm->hc_max_packet_count = 1; 2237 parm->hc_max_frame_size = 0x500; 2238 2239 usbd_transfer_setup_sub(parm); 2240 2241 /* 2242 * compute maximum number of TDs 2243 */ 2244 if (parm->methods == &uss820dci_device_ctrl_methods) { 2245 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ; 2246 2247 } else if (parm->methods == &uss820dci_device_bulk_methods) { 2248 ntd = xfer->nframes + 1 /* SYNC */ ; 2249 2250 } else if (parm->methods == &uss820dci_device_intr_methods) { 2251 ntd = xfer->nframes + 1 /* SYNC */ ; 2252 2253 } else if (parm->methods == &uss820dci_device_isoc_fs_methods) { 2254 ntd = xfer->nframes + 1 /* SYNC */ ; 2255 2256 } else { 2257 ntd = 0; 2258 } 2259 2260 /* 2261 * check if "usbd_transfer_setup_sub" set an error 2262 */ 2263 if (parm->err) { 2264 return; 2265 } 2266 /* 2267 * allocate transfer descriptors 2268 */ 2269 last_obj = NULL; 2270 2271 /* 2272 * get profile stuff 2273 */ 2274 if (ntd) { 2275 ep_no = xfer->endpointno & UE_ADDR; 2276 uss820dci_get_hw_ep_profile(parm->udev, &pf, ep_no); 2277 2278 if (pf == NULL) { 2279 /* should not happen */ 2280 parm->err = USB_ERR_INVAL; 2281 return; 2282 } 2283 } else { 2284 ep_no = 0; 2285 pf = NULL; 2286 } 2287 2288 /* align data */ 2289 parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1)); 2290 2291 for (n = 0; n != ntd; n++) { 2292 struct uss820dci_td *td; 2293 2294 if (parm->buf) { 2295 td = USB_ADD_BYTES(parm->buf, parm->size[0]); 2296 2297 /* init TD */ 2298 td->max_packet_size = xfer->max_packet_size; 2299 td->ep_index = ep_no; 2300 if (pf->support_multi_buffer && 2301 (parm->methods != &uss820dci_device_ctrl_methods)) { 2302 td->support_multi_buffer = 1; 2303 } 2304 td->obj_next = last_obj; 2305 2306 last_obj = td; 2307 } 2308 parm->size[0] += sizeof(*td); 2309 } 2310 2311 xfer->td_start[0] = last_obj; 2312 } 2313 2314 static void 2315 uss820dci_xfer_unsetup(struct usb_xfer *xfer) 2316 { 2317 return; 2318 } 2319 2320 static void 2321 uss820dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc, 2322 struct usb_endpoint *ep) 2323 { 2324 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus); 2325 2326 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n", 2327 ep, udev->address, 2328 edesc->bEndpointAddress, udev->flags.usb_mode, 2329 sc->sc_rt_addr); 2330 2331 if (udev->device_index != sc->sc_rt_addr) { 2332 if (udev->speed != USB_SPEED_FULL) { 2333 /* not supported */ 2334 return; 2335 } 2336 switch (edesc->bmAttributes & UE_XFERTYPE) { 2337 case UE_CONTROL: 2338 ep->methods = &uss820dci_device_ctrl_methods; 2339 break; 2340 case UE_INTERRUPT: 2341 ep->methods = &uss820dci_device_intr_methods; 2342 break; 2343 case UE_ISOCHRONOUS: 2344 ep->methods = &uss820dci_device_isoc_fs_methods; 2345 break; 2346 case UE_BULK: 2347 ep->methods = &uss820dci_device_bulk_methods; 2348 break; 2349 default: 2350 /* do nothing */ 2351 break; 2352 } 2353 } 2354 } 2355 2356 static void 2357 uss820dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state) 2358 { 2359 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus); 2360 2361 switch (state) { 2362 case USB_HW_POWER_SUSPEND: 2363 uss820dci_suspend(sc); 2364 break; 2365 case USB_HW_POWER_SHUTDOWN: 2366 uss820dci_uninit(sc); 2367 break; 2368 case USB_HW_POWER_RESUME: 2369 uss820dci_resume(sc); 2370 break; 2371 default: 2372 break; 2373 } 2374 } 2375 2376 static const struct usb_bus_methods uss820dci_bus_methods = 2377 { 2378 .endpoint_init = &uss820dci_ep_init, 2379 .xfer_setup = &uss820dci_xfer_setup, 2380 .xfer_unsetup = &uss820dci_xfer_unsetup, 2381 .get_hw_ep_profile = &uss820dci_get_hw_ep_profile, 2382 .xfer_stall = &uss820dci_xfer_stall, 2383 .set_stall = &uss820dci_set_stall, 2384 .clear_stall = &uss820dci_clear_stall, 2385 .roothub_exec = &uss820dci_roothub_exec, 2386 .xfer_poll = &uss820dci_do_poll, 2387 .set_hw_power_sleep = uss820dci_set_hw_power_sleep, 2388 }; 2389