1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss@carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * USB Open Host Controller driver. 35 * 36 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 37 */ 38 39 /* The low level controller code for OHCI has been split into 40 * PCI probes and OHCI specific code. This was done to facilitate the 41 * sharing of code between *BSD's 42 */ 43 44 #include <sys/stdint.h> 45 #include <sys/stddef.h> 46 #include <sys/param.h> 47 #include <sys/queue.h> 48 #include <sys/types.h> 49 #include <sys/systm.h> 50 #include <sys/kernel.h> 51 #include <sys/bus.h> 52 #include <sys/module.h> 53 #include <sys/lock.h> 54 #include <sys/mutex.h> 55 #include <sys/condvar.h> 56 #include <sys/sysctl.h> 57 #include <sys/sx.h> 58 #include <sys/unistd.h> 59 #include <sys/callout.h> 60 #include <sys/malloc.h> 61 #include <sys/priv.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 66 #include <dev/usb/usb_core.h> 67 #include <dev/usb/usb_busdma.h> 68 #include <dev/usb/usb_process.h> 69 #include <dev/usb/usb_util.h> 70 71 #include <dev/usb/usb_controller.h> 72 #include <dev/usb/usb_bus.h> 73 #include <dev/usb/usb_pci.h> 74 #include <dev/usb/controller/ohci.h> 75 #include <dev/usb/controller/ohcireg.h> 76 #include "usb_if.h" 77 78 #define PCI_OHCI_VENDORID_ACERLABS 0x10b9 79 #define PCI_OHCI_VENDORID_AMD 0x1022 80 #define PCI_OHCI_VENDORID_APPLE 0x106b 81 #define PCI_OHCI_VENDORID_ATI 0x1002 82 #define PCI_OHCI_VENDORID_CMDTECH 0x1095 83 #define PCI_OHCI_VENDORID_HYGON 0x1d94 84 #define PCI_OHCI_VENDORID_NEC 0x1033 85 #define PCI_OHCI_VENDORID_NVIDIA 0x12D2 86 #define PCI_OHCI_VENDORID_NVIDIA2 0x10DE 87 #define PCI_OHCI_VENDORID_OPTI 0x1045 88 #define PCI_OHCI_VENDORID_SIS 0x1039 89 90 #define PCI_OHCI_BASE_REG 0x10 91 92 static device_probe_t ohci_pci_probe; 93 static device_attach_t ohci_pci_attach; 94 static device_detach_t ohci_pci_detach; 95 static usb_take_controller_t ohci_pci_take_controller; 96 97 static int 98 ohci_pci_take_controller(device_t self) 99 { 100 uint32_t reg; 101 uint32_t int_line; 102 103 if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) { 104 device_printf(self, "chip is in D%d mode " 105 "-- setting to D0\n", pci_get_powerstate(self)); 106 reg = pci_read_config(self, PCI_CBMEM, 4); 107 int_line = pci_read_config(self, PCIR_INTLINE, 4); 108 pci_set_powerstate(self, PCI_POWERSTATE_D0); 109 pci_write_config(self, PCI_CBMEM, reg, 4); 110 pci_write_config(self, PCIR_INTLINE, int_line, 4); 111 } 112 return (0); 113 } 114 115 static const char * 116 ohci_pci_match(device_t self) 117 { 118 uint32_t device_id = pci_get_devid(self); 119 120 switch (device_id) { 121 case 0x523710b9: 122 return ("AcerLabs M5237 (Aladdin-V) USB controller"); 123 124 case 0x740c1022: 125 return ("AMD-756 USB Controller"); 126 case 0x74141022: 127 return ("AMD-766 USB Controller"); 128 case 0x78071022: 129 return ("AMD FCH USB Controller"); 130 131 case 0x43741002: 132 return "ATI SB400 USB Controller"; 133 case 0x43751002: 134 return "ATI SB400 USB Controller"; 135 case 0x43971002: 136 return ("AMD SB7x0/SB8x0/SB9x0 USB controller"); 137 case 0x43981002: 138 return ("AMD SB7x0/SB8x0/SB9x0 USB controller"); 139 case 0x43991002: 140 return ("AMD SB7x0/SB8x0/SB9x0 USB controller"); 141 142 case 0x06701095: 143 return ("CMD Tech 670 (USB0670) USB controller"); 144 145 case 0x06731095: 146 return ("CMD Tech 673 (USB0673) USB controller"); 147 148 case 0xc8611045: 149 return ("OPTi 82C861 (FireLink) USB controller"); 150 151 case 0x00351033: 152 return ("NEC uPD 9210 USB controller"); 153 154 case 0x00d710de: 155 return ("nVidia nForce3 USB Controller"); 156 157 case 0x005a10de: 158 return ("nVidia nForce CK804 USB Controller"); 159 case 0x036c10de: 160 return ("nVidia nForce MCP55 USB Controller"); 161 case 0x03f110de: 162 return ("nVidia nForce MCP61 USB Controller"); 163 case 0x0aa510de: 164 return ("nVidia nForce MCP79 USB Controller"); 165 case 0x0aa710de: 166 return ("nVidia nForce MCP79 USB Controller"); 167 case 0x0aa810de: 168 return ("nVidia nForce MCP79 USB Controller"); 169 170 case 0x70011039: 171 return ("SiS 5571 USB controller"); 172 173 case 0x0019106b: 174 return ("Apple KeyLargo USB controller"); 175 case 0x003f106b: 176 return ("Apple KeyLargo/Intrepid USB controller"); 177 178 default: 179 break; 180 } 181 if ((pci_get_class(self) == PCIC_SERIALBUS) && 182 (pci_get_subclass(self) == PCIS_SERIALBUS_USB) && 183 (pci_get_progif(self) == PCI_INTERFACE_OHCI)) { 184 return ("OHCI (generic) USB controller"); 185 } 186 return (NULL); 187 } 188 189 static int 190 ohci_pci_probe(device_t self) 191 { 192 const char *desc = ohci_pci_match(self); 193 194 if (desc) { 195 device_set_desc(self, desc); 196 return (0); 197 } else { 198 return (ENXIO); 199 } 200 } 201 202 static int 203 ohci_pci_attach(device_t self) 204 { 205 ohci_softc_t *sc = device_get_softc(self); 206 int rid; 207 int err; 208 209 /* initialise some bus fields */ 210 sc->sc_bus.parent = self; 211 sc->sc_bus.devices = sc->sc_devices; 212 sc->sc_bus.devices_max = OHCI_MAX_DEVICES; 213 sc->sc_bus.dma_bits = 32; 214 215 /* get all DMA memory */ 216 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self), 217 &ohci_iterate_hw_softc)) { 218 return (ENOMEM); 219 } 220 sc->sc_dev = self; 221 222 pci_enable_busmaster(self); 223 224 rid = PCI_CBMEM; 225 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 226 RF_ACTIVE); 227 if (!sc->sc_io_res) { 228 device_printf(self, "Could not map memory\n"); 229 goto error; 230 } 231 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 232 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 233 sc->sc_io_size = rman_get_size(sc->sc_io_res); 234 235 rid = 0; 236 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 237 RF_SHAREABLE | RF_ACTIVE); 238 if (sc->sc_irq_res == NULL) { 239 device_printf(self, "Could not allocate irq\n"); 240 goto error; 241 } 242 sc->sc_bus.bdev = device_add_child(self, "usbus", DEVICE_UNIT_ANY); 243 if (!sc->sc_bus.bdev) { 244 device_printf(self, "Could not add USB device\n"); 245 goto error; 246 } 247 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 248 249 /* 250 * ohci_pci_match will never return NULL if ohci_pci_probe 251 * succeeded 252 */ 253 device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self)); 254 switch (pci_get_vendor(self)) { 255 case PCI_OHCI_VENDORID_ACERLABS: 256 sprintf(sc->sc_vendor, "AcerLabs"); 257 break; 258 case PCI_OHCI_VENDORID_AMD: 259 sprintf(sc->sc_vendor, "AMD"); 260 break; 261 case PCI_OHCI_VENDORID_APPLE: 262 sprintf(sc->sc_vendor, "Apple"); 263 break; 264 case PCI_OHCI_VENDORID_ATI: 265 sprintf(sc->sc_vendor, "ATI"); 266 break; 267 case PCI_OHCI_VENDORID_CMDTECH: 268 sprintf(sc->sc_vendor, "CMDTECH"); 269 break; 270 case PCI_OHCI_VENDORID_HYGON: 271 sprintf(sc->sc_vendor, "Hygon"); 272 break; 273 case PCI_OHCI_VENDORID_NEC: 274 sprintf(sc->sc_vendor, "NEC"); 275 break; 276 case PCI_OHCI_VENDORID_NVIDIA: 277 case PCI_OHCI_VENDORID_NVIDIA2: 278 sprintf(sc->sc_vendor, "nVidia"); 279 break; 280 case PCI_OHCI_VENDORID_OPTI: 281 sprintf(sc->sc_vendor, "OPTi"); 282 break; 283 case PCI_OHCI_VENDORID_SIS: 284 sprintf(sc->sc_vendor, "SiS"); 285 break; 286 default: 287 if (bootverbose) { 288 device_printf(self, "(New OHCI DeviceId=0x%08x)\n", 289 pci_get_devid(self)); 290 } 291 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 292 } 293 294 /* sc->sc_bus.usbrev; set by ohci_init() */ 295 296 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 297 NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl); 298 if (err) { 299 device_printf(self, "Could not setup irq, %d\n", err); 300 sc->sc_intr_hdl = NULL; 301 goto error; 302 } 303 err = ohci_init(sc); 304 if (!err) { 305 err = device_probe_and_attach(sc->sc_bus.bdev); 306 } 307 if (err) { 308 device_printf(self, "USB init failed\n"); 309 goto error; 310 } 311 return (0); 312 313 error: 314 ohci_pci_detach(self); 315 return (ENXIO); 316 } 317 318 static int 319 ohci_pci_detach(device_t self) 320 { 321 ohci_softc_t *sc = device_get_softc(self); 322 int error; 323 324 /* during module unload there are lots of children leftover */ 325 error = bus_generic_detach(self); 326 if (error != 0) 327 return (error); 328 329 pci_disable_busmaster(self); 330 331 if (sc->sc_irq_res && sc->sc_intr_hdl) { 332 /* 333 * only call ohci_detach() after ohci_init() 334 */ 335 ohci_detach(sc); 336 337 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 338 339 if (err) { 340 /* XXX or should we panic? */ 341 device_printf(self, "Could not tear down irq, %d\n", 342 err); 343 } 344 sc->sc_intr_hdl = NULL; 345 } 346 if (sc->sc_irq_res) { 347 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 348 sc->sc_irq_res = NULL; 349 } 350 if (sc->sc_io_res) { 351 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, 352 sc->sc_io_res); 353 sc->sc_io_res = NULL; 354 } 355 usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc); 356 357 return (0); 358 } 359 360 static device_method_t ohci_pci_methods[] = { 361 /* Device interface */ 362 DEVMETHOD(device_probe, ohci_pci_probe), 363 DEVMETHOD(device_attach, ohci_pci_attach), 364 DEVMETHOD(device_detach, ohci_pci_detach), 365 DEVMETHOD(device_suspend, bus_generic_suspend), 366 DEVMETHOD(device_resume, bus_generic_resume), 367 DEVMETHOD(device_shutdown, bus_generic_shutdown), 368 DEVMETHOD(usb_take_controller, ohci_pci_take_controller), 369 370 DEVMETHOD_END 371 }; 372 373 static driver_t ohci_driver = { 374 .name = "ohci", 375 .methods = ohci_pci_methods, 376 .size = sizeof(struct ohci_softc), 377 }; 378 379 DRIVER_MODULE(ohci, pci, ohci_driver, 0, 0); 380 MODULE_DEPEND(ohci, usb, 1, 1, 1); 381