1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss@carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 35 * 36 * The EHCI 1.0 spec can be found at 37 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 38 * and the USB 2.0 spec at 39 * http://www.usb.org/developers/docs/usb_20.zip 40 */ 41 42 /* The low level controller code for EHCI has been split into 43 * PCI probes and EHCI specific code. This was done to facilitate the 44 * sharing of code between *BSD's 45 */ 46 47 #include <sys/stdint.h> 48 #include <sys/stddef.h> 49 #include <sys/param.h> 50 #include <sys/queue.h> 51 #include <sys/types.h> 52 #include <sys/systm.h> 53 #include <sys/kernel.h> 54 #include <sys/bus.h> 55 #include <sys/module.h> 56 #include <sys/lock.h> 57 #include <sys/mutex.h> 58 #include <sys/condvar.h> 59 #include <sys/sysctl.h> 60 #include <sys/sx.h> 61 #include <sys/unistd.h> 62 #include <sys/callout.h> 63 #include <sys/malloc.h> 64 #include <sys/priv.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 69 #include <dev/usb/usb_core.h> 70 #include <dev/usb/usb_busdma.h> 71 #include <dev/usb/usb_process.h> 72 #include <dev/usb/usb_util.h> 73 74 #include <dev/usb/usb_controller.h> 75 #include <dev/usb/usb_bus.h> 76 #include <dev/usb/usb_pci.h> 77 #include <dev/usb/controller/ehci.h> 78 #include <dev/usb/controller/ehcireg.h> 79 #include "usb_if.h" 80 81 #define PCI_EHCI_VENDORID_ACERLABS 0x10b9 82 #define PCI_EHCI_VENDORID_AMD 0x1022 83 #define PCI_EHCI_VENDORID_APPLE 0x106b 84 #define PCI_EHCI_VENDORID_ATI 0x1002 85 #define PCI_EHCI_VENDORID_CMDTECH 0x1095 86 #define PCI_EHCI_VENDORID_HYGON 0x1d94 87 #define PCI_EHCI_VENDORID_INTEL 0x8086 88 #define PCI_EHCI_VENDORID_NEC 0x1033 89 #define PCI_EHCI_VENDORID_OPTI 0x1045 90 #define PCI_EHCI_VENDORID_PHILIPS 0x1131 91 #define PCI_EHCI_VENDORID_SIS 0x1039 92 #define PCI_EHCI_VENDORID_NVIDIA 0x12D2 93 #define PCI_EHCI_VENDORID_NVIDIA2 0x10DE 94 #define PCI_EHCI_VENDORID_VIA 0x1106 95 #define PCI_EHCI_VENDORID_VMWARE 0x15ad 96 #define PCI_EHCI_VENDORID_ZHAOXIN 0x1d17 97 98 static device_probe_t ehci_pci_probe; 99 static device_attach_t ehci_pci_attach; 100 static device_detach_t ehci_pci_detach; 101 static usb_take_controller_t ehci_pci_take_controller; 102 103 static const char * 104 ehci_pci_match(device_t self) 105 { 106 uint32_t device_id = pci_get_devid(self); 107 108 switch (device_id) { 109 case 0x523910b9: 110 return "ALi M5239 USB 2.0 controller"; 111 112 case 0x10227463: 113 return "AMD 8111 USB 2.0 controller"; 114 115 case 0x20951022: 116 return ("AMD CS5536 (Geode) USB 2.0 controller"); 117 case 0x78081022: 118 return ("AMD FCH USB 2.0 controller"); 119 case 0x79081022: 120 return ("AMD FCH USB 2.0 controller"); 121 122 case 0x43451002: 123 return "ATI SB200 USB 2.0 controller"; 124 case 0x43731002: 125 return "ATI SB400 USB 2.0 controller"; 126 case 0x43961002: 127 return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller"); 128 129 case 0x0f348086: 130 return ("Intel BayTrail USB 2.0 controller"); 131 case 0x1c268086: 132 return ("Intel Cougar Point USB 2.0 controller"); 133 case 0x1c2d8086: 134 return ("Intel Cougar Point USB 2.0 controller"); 135 case 0x1d268086: 136 return ("Intel Patsburg USB 2.0 controller"); 137 case 0x1d2d8086: 138 return ("Intel Patsburg USB 2.0 controller"); 139 case 0x1e268086: 140 return ("Intel Panther Point USB 2.0 controller"); 141 case 0x1e2d8086: 142 return ("Intel Panther Point USB 2.0 controller"); 143 case 0x1f2c8086: 144 return ("Intel Avoton USB 2.0 controller"); 145 case 0x25ad8086: 146 return "Intel 6300ESB USB 2.0 controller"; 147 case 0x24cd8086: 148 return "Intel 82801DB/L/M (ICH4) USB 2.0 controller"; 149 case 0x24dd8086: 150 return "Intel 82801EB/R (ICH5) USB 2.0 controller"; 151 case 0x265c8086: 152 return "Intel 82801FB (ICH6) USB 2.0 controller"; 153 case 0x268c8086: 154 return ("Intel 63XXESB USB 2.0 controller"); 155 case 0x27cc8086: 156 return "Intel 82801GB/R (ICH7) USB 2.0 controller"; 157 case 0x28368086: 158 return "Intel 82801H (ICH8) USB 2.0 controller USB2-A"; 159 case 0x283a8086: 160 return "Intel 82801H (ICH8) USB 2.0 controller USB2-B"; 161 case 0x293a8086: 162 return "Intel 82801I (ICH9) USB 2.0 controller"; 163 case 0x293c8086: 164 return "Intel 82801I (ICH9) USB 2.0 controller"; 165 case 0x3a3a8086: 166 return "Intel 82801JI (ICH10) USB 2.0 controller USB-A"; 167 case 0x3a3c8086: 168 return "Intel 82801JI (ICH10) USB 2.0 controller USB-B"; 169 case 0x3a6c8086: 170 return "Intel 82801JD (ICH10) USB 2.0 controller USB-A"; 171 case 0x3a6a8086: 172 return "Intel 82801JD (ICH10) USB 2.0 controller USB-B"; 173 case 0x3b348086: 174 return ("Intel PCH USB 2.0 controller USB-A"); 175 case 0x3b3c8086: 176 return ("Intel PCH USB 2.0 controller USB-B"); 177 case 0x8c268086: 178 return ("Intel Lynx Point USB 2.0 controller USB-A"); 179 case 0x8c2d8086: 180 return ("Intel Lynx Point USB 2.0 controller USB-B"); 181 case 0x8ca68086: 182 return ("Intel Wildcat Point USB 2.0 controller USB-A"); 183 case 0x8cad8086: 184 return ("Intel Wildcat Point USB 2.0 controller USB-B"); 185 case 0x8d268086: 186 return ("Intel Wellsburg USB 2.0 controller"); 187 case 0x8d2d8086: 188 return ("Intel Wellsburg USB 2.0 controller"); 189 case 0x9c268086: 190 return ("Intel Lynx Point-LP USB 2.0 controller"); 191 case 0x9ca68086: 192 return ("Intel Wildcat Point-LP USB 2.0 controller"); 193 194 case 0x00e01033: 195 return ("NEC uPD 72010x USB 2.0 controller"); 196 197 case 0x006810de: 198 return "NVIDIA nForce2 USB 2.0 controller"; 199 case 0x008810de: 200 return "NVIDIA nForce2 Ultra 400 USB 2.0 controller"; 201 case 0x00d810de: 202 return "NVIDIA nForce3 USB 2.0 controller"; 203 case 0x00e810de: 204 return "NVIDIA nForce3 250 USB 2.0 controller"; 205 case 0x005b10de: 206 return "NVIDIA nForce CK804 USB 2.0 controller"; 207 case 0x036d10de: 208 return "NVIDIA nForce MCP55 USB 2.0 controller"; 209 case 0x03f210de: 210 return "NVIDIA nForce MCP61 USB 2.0 controller"; 211 case 0x0aa610de: 212 return "NVIDIA nForce MCP79 USB 2.0 controller"; 213 case 0x0aa910de: 214 return "NVIDIA nForce MCP79 USB 2.0 controller"; 215 case 0x0aaa10de: 216 return "NVIDIA nForce MCP79 USB 2.0 controller"; 217 218 case 0x15621131: 219 return "Philips ISP156x USB 2.0 controller"; 220 221 case 0x70021039: 222 return "SiS 968 USB 2.0 controller"; 223 224 case 0x31041106: 225 return ("VIA VT6202 USB 2.0 controller"); 226 227 case 0x077015ad: 228 return ("VMware USB 2.0 controller"); 229 230 case 0x31041d17: 231 return ("Zhaoxin ZX-100/ZX-200/ZX-E USB 2.0 controller"); 232 233 default: 234 break; 235 } 236 237 if ((pci_get_class(self) == PCIC_SERIALBUS) 238 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 239 && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) { 240 return ("EHCI (generic) USB 2.0 controller"); 241 } 242 return (NULL); /* dunno */ 243 } 244 245 static int 246 ehci_pci_probe(device_t self) 247 { 248 const char *desc = ehci_pci_match(self); 249 250 if (desc) { 251 device_set_desc(self, desc); 252 return (BUS_PROBE_DEFAULT); 253 } else { 254 return (ENXIO); 255 } 256 } 257 258 static void 259 ehci_pci_ati_quirk(device_t self, uint8_t is_sb700) 260 { 261 device_t smbdev; 262 uint32_t val; 263 264 if (is_sb700) { 265 /* Lookup SMBUS PCI device */ 266 smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385); 267 if (smbdev == NULL) 268 return; 269 val = pci_get_revid(smbdev); 270 if (val != 0x3a && val != 0x3b) 271 return; 272 } 273 274 /* 275 * Note: this bit is described as reserved in SB700 276 * Register Reference Guide. 277 */ 278 val = pci_read_config(self, 0x53, 1); 279 if (!(val & 0x8)) { 280 val |= 0x8; 281 pci_write_config(self, 0x53, val, 1); 282 device_printf(self, "AMD SB600/700 quirk applied\n"); 283 } 284 } 285 286 static void 287 ehci_pci_via_quirk(device_t self) 288 { 289 uint32_t val; 290 291 if ((pci_get_device(self) == 0x3104) && 292 ((pci_get_revid(self) & 0xf0) == 0x60)) { 293 /* Correct schedule sleep time to 10us */ 294 val = pci_read_config(self, 0x4b, 1); 295 if (val & 0x20) 296 return; 297 val |= 0x20; 298 pci_write_config(self, 0x4b, val, 1); 299 device_printf(self, "VIA-quirk applied\n"); 300 } 301 } 302 303 static int 304 ehci_pci_attach(device_t self) 305 { 306 ehci_softc_t *sc = device_get_softc(self); 307 int err; 308 int rid; 309 310 /* initialise some bus fields */ 311 sc->sc_bus.parent = self; 312 sc->sc_bus.devices = sc->sc_devices; 313 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 314 sc->sc_bus.dma_bits = 32; 315 316 /* get all DMA memory */ 317 if (usb_bus_mem_alloc_all(&sc->sc_bus, 318 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 319 return (ENOMEM); 320 } 321 322 pci_enable_busmaster(self); 323 324 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) { 325 case PCI_USB_REV_PRE_1_0: 326 case PCI_USB_REV_1_0: 327 case PCI_USB_REV_1_1: 328 /* 329 * NOTE: some EHCI USB controllers have the wrong USB 330 * revision number. It appears those controllers are 331 * fully compliant so we just ignore this value in 332 * some common cases. 333 */ 334 device_printf(self, "pre-2.0 USB revision (ignored)\n"); 335 /* fallthrough */ 336 case PCI_USB_REV_2_0: 337 break; 338 default: 339 /* Quirk for Parallels Desktop 4.0 */ 340 device_printf(self, "USB revision is unknown. Assuming v2.0.\n"); 341 break; 342 } 343 344 rid = PCI_CBMEM; 345 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 346 RF_ACTIVE); 347 if (!sc->sc_io_res) { 348 device_printf(self, "Could not map memory\n"); 349 goto error; 350 } 351 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 352 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 353 sc->sc_io_size = rman_get_size(sc->sc_io_res); 354 355 rid = 0; 356 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 357 RF_SHAREABLE | RF_ACTIVE); 358 if (sc->sc_irq_res == NULL) { 359 device_printf(self, "Could not allocate irq\n"); 360 goto error; 361 } 362 sc->sc_bus.bdev = device_add_child(self, "usbus", DEVICE_UNIT_ANY); 363 if (!sc->sc_bus.bdev) { 364 device_printf(self, "Could not add USB device\n"); 365 goto error; 366 } 367 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 368 369 /* 370 * ehci_pci_match will never return NULL if ehci_pci_probe 371 * succeeded 372 */ 373 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self)); 374 switch (pci_get_vendor(self)) { 375 case PCI_EHCI_VENDORID_ACERLABS: 376 sprintf(sc->sc_vendor, "AcerLabs"); 377 break; 378 case PCI_EHCI_VENDORID_AMD: 379 sprintf(sc->sc_vendor, "AMD"); 380 break; 381 case PCI_EHCI_VENDORID_APPLE: 382 sprintf(sc->sc_vendor, "Apple"); 383 break; 384 case PCI_EHCI_VENDORID_ATI: 385 sprintf(sc->sc_vendor, "ATI"); 386 break; 387 case PCI_EHCI_VENDORID_CMDTECH: 388 sprintf(sc->sc_vendor, "CMDTECH"); 389 break; 390 case PCI_EHCI_VENDORID_HYGON: 391 sprintf(sc->sc_vendor, "Hygon"); 392 break; 393 case PCI_EHCI_VENDORID_INTEL: 394 sprintf(sc->sc_vendor, "Intel"); 395 break; 396 case PCI_EHCI_VENDORID_NEC: 397 sprintf(sc->sc_vendor, "NEC"); 398 break; 399 case PCI_EHCI_VENDORID_OPTI: 400 sprintf(sc->sc_vendor, "OPTi"); 401 break; 402 case PCI_EHCI_VENDORID_PHILIPS: 403 sprintf(sc->sc_vendor, "Philips"); 404 break; 405 case PCI_EHCI_VENDORID_SIS: 406 sprintf(sc->sc_vendor, "SiS"); 407 break; 408 case PCI_EHCI_VENDORID_NVIDIA: 409 case PCI_EHCI_VENDORID_NVIDIA2: 410 sprintf(sc->sc_vendor, "nVidia"); 411 break; 412 case PCI_EHCI_VENDORID_VIA: 413 sprintf(sc->sc_vendor, "VIA"); 414 break; 415 case PCI_EHCI_VENDORID_VMWARE: 416 sprintf(sc->sc_vendor, "VMware"); 417 break; 418 case PCI_EHCI_VENDORID_ZHAOXIN: 419 sprintf(sc->sc_vendor, "Zhaoxin"); 420 break; 421 default: 422 if (bootverbose) 423 device_printf(self, "(New EHCI DeviceId=0x%08x)\n", 424 pci_get_devid(self)); 425 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 426 } 427 428 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 429 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 430 if (err) { 431 device_printf(self, "Could not setup irq, %d\n", err); 432 sc->sc_intr_hdl = NULL; 433 goto error; 434 } 435 ehci_pci_take_controller(self); 436 437 /* Undocumented quirks taken from Linux */ 438 439 switch (pci_get_vendor(self)) { 440 case PCI_EHCI_VENDORID_ATI: 441 /* SB600 and SB700 EHCI quirk */ 442 switch (pci_get_device(self)) { 443 case 0x4386: 444 ehci_pci_ati_quirk(self, 0); 445 break; 446 case 0x4396: 447 ehci_pci_ati_quirk(self, 1); 448 break; 449 default: 450 break; 451 } 452 break; 453 454 case PCI_EHCI_VENDORID_VIA: 455 ehci_pci_via_quirk(self); 456 break; 457 458 default: 459 break; 460 } 461 462 /* Dropped interrupts workaround */ 463 switch (pci_get_vendor(self)) { 464 case PCI_EHCI_VENDORID_ATI: 465 case PCI_EHCI_VENDORID_VIA: 466 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG; 467 if (bootverbose) 468 device_printf(self, 469 "Dropped interrupts workaround enabled\n"); 470 break; 471 default: 472 break; 473 } 474 475 /* Doorbell feature workaround */ 476 switch (pci_get_vendor(self)) { 477 case PCI_EHCI_VENDORID_NVIDIA: 478 case PCI_EHCI_VENDORID_NVIDIA2: 479 sc->sc_flags |= EHCI_SCFLG_IAADBUG; 480 if (bootverbose) 481 device_printf(self, 482 "Doorbell workaround enabled\n"); 483 break; 484 default: 485 break; 486 } 487 488 err = ehci_init(sc); 489 if (!err) { 490 err = device_probe_and_attach(sc->sc_bus.bdev); 491 } 492 if (err) { 493 device_printf(self, "USB init failed err=%d\n", err); 494 goto error; 495 } 496 return (0); 497 498 error: 499 ehci_pci_detach(self); 500 return (ENXIO); 501 } 502 503 static int 504 ehci_pci_detach(device_t self) 505 { 506 ehci_softc_t *sc = device_get_softc(self); 507 int error; 508 509 /* during module unload there are lots of children leftover */ 510 error = bus_generic_detach(self); 511 if (error != 0) 512 return (error); 513 514 pci_disable_busmaster(self); 515 516 if (sc->sc_irq_res && sc->sc_intr_hdl) { 517 /* 518 * only call ehci_detach() after ehci_init() 519 */ 520 ehci_detach(sc); 521 522 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 523 524 if (err) 525 /* XXX or should we panic? */ 526 device_printf(self, "Could not tear down irq, %d\n", 527 err); 528 sc->sc_intr_hdl = NULL; 529 } 530 if (sc->sc_irq_res) { 531 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 532 sc->sc_irq_res = NULL; 533 } 534 if (sc->sc_io_res) { 535 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, 536 sc->sc_io_res); 537 sc->sc_io_res = NULL; 538 } 539 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 540 541 return (0); 542 } 543 544 static int 545 ehci_pci_take_controller(device_t self) 546 { 547 ehci_softc_t *sc = device_get_softc(self); 548 uint32_t cparams; 549 uint32_t eec; 550 uint16_t to; 551 uint8_t eecp; 552 uint8_t bios_sem; 553 554 cparams = EREAD4(sc, EHCI_HCCPARAMS); 555 556 /* Synchronise with the BIOS if it owns the controller. */ 557 for (eecp = EHCI_HCC_EECP(cparams); eecp != 0; 558 eecp = EHCI_EECP_NEXT(eec)) { 559 eec = pci_read_config(self, eecp, 4); 560 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) { 561 continue; 562 } 563 bios_sem = pci_read_config(self, eecp + 564 EHCI_LEGSUP_BIOS_SEM, 1); 565 if (bios_sem == 0) { 566 continue; 567 } 568 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 569 "to give up control\n"); 570 pci_write_config(self, eecp + 571 EHCI_LEGSUP_OS_SEM, 1, 1); 572 to = 500; 573 while (1) { 574 bios_sem = pci_read_config(self, eecp + 575 EHCI_LEGSUP_BIOS_SEM, 1); 576 if (bios_sem == 0) 577 break; 578 579 if (--to == 0) { 580 device_printf(sc->sc_bus.bdev, 581 "timed out waiting for BIOS\n"); 582 break; 583 } 584 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 585 } 586 } 587 return (0); 588 } 589 590 static device_method_t ehci_pci_methods[] = { 591 /* Device interface */ 592 DEVMETHOD(device_probe, ehci_pci_probe), 593 DEVMETHOD(device_attach, ehci_pci_attach), 594 DEVMETHOD(device_detach, ehci_pci_detach), 595 DEVMETHOD(device_suspend, bus_generic_suspend), 596 DEVMETHOD(device_resume, bus_generic_resume), 597 DEVMETHOD(device_shutdown, bus_generic_shutdown), 598 DEVMETHOD(usb_take_controller, ehci_pci_take_controller), 599 600 DEVMETHOD_END 601 }; 602 603 static driver_t ehci_driver = { 604 .name = "ehci", 605 .methods = ehci_pci_methods, 606 .size = sizeof(struct ehci_softc), 607 }; 608 609 DRIVER_MODULE(ehci, pci, ehci_driver, 0, 0); 610 MODULE_DEPEND(ehci, usb, 1, 1, 1); 611