1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss@carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 /* 35 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 36 * 37 * The EHCI 1.0 spec can be found at 38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 39 * and the USB 2.0 spec at 40 * http://www.usb.org/developers/docs/usb_20.zip 41 */ 42 43 /* The low level controller code for EHCI has been split into 44 * PCI probes and EHCI specific code. This was done to facilitate the 45 * sharing of code between *BSD's 46 */ 47 48 #include <sys/stdint.h> 49 #include <sys/stddef.h> 50 #include <sys/param.h> 51 #include <sys/queue.h> 52 #include <sys/types.h> 53 #include <sys/systm.h> 54 #include <sys/kernel.h> 55 #include <sys/bus.h> 56 #include <sys/module.h> 57 #include <sys/lock.h> 58 #include <sys/mutex.h> 59 #include <sys/condvar.h> 60 #include <sys/sysctl.h> 61 #include <sys/sx.h> 62 #include <sys/unistd.h> 63 #include <sys/callout.h> 64 #include <sys/malloc.h> 65 #include <sys/priv.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 70 #include <dev/usb/usb_core.h> 71 #include <dev/usb/usb_busdma.h> 72 #include <dev/usb/usb_process.h> 73 #include <dev/usb/usb_util.h> 74 75 #include <dev/usb/usb_controller.h> 76 #include <dev/usb/usb_bus.h> 77 #include <dev/usb/usb_pci.h> 78 #include <dev/usb/controller/ehci.h> 79 #include <dev/usb/controller/ehcireg.h> 80 #include "usb_if.h" 81 82 #define PCI_EHCI_VENDORID_ACERLABS 0x10b9 83 #define PCI_EHCI_VENDORID_AMD 0x1022 84 #define PCI_EHCI_VENDORID_APPLE 0x106b 85 #define PCI_EHCI_VENDORID_ATI 0x1002 86 #define PCI_EHCI_VENDORID_CMDTECH 0x1095 87 #define PCI_EHCI_VENDORID_HYGON 0x1d94 88 #define PCI_EHCI_VENDORID_INTEL 0x8086 89 #define PCI_EHCI_VENDORID_NEC 0x1033 90 #define PCI_EHCI_VENDORID_OPTI 0x1045 91 #define PCI_EHCI_VENDORID_PHILIPS 0x1131 92 #define PCI_EHCI_VENDORID_SIS 0x1039 93 #define PCI_EHCI_VENDORID_NVIDIA 0x12D2 94 #define PCI_EHCI_VENDORID_NVIDIA2 0x10DE 95 #define PCI_EHCI_VENDORID_VIA 0x1106 96 #define PCI_EHCI_VENDORID_VMWARE 0x15ad 97 #define PCI_EHCI_VENDORID_ZHAOXIN 0x1d17 98 99 static device_probe_t ehci_pci_probe; 100 static device_attach_t ehci_pci_attach; 101 static device_detach_t ehci_pci_detach; 102 static usb_take_controller_t ehci_pci_take_controller; 103 104 static const char * 105 ehci_pci_match(device_t self) 106 { 107 uint32_t device_id = pci_get_devid(self); 108 109 switch (device_id) { 110 case 0x523910b9: 111 return "ALi M5239 USB 2.0 controller"; 112 113 case 0x10227463: 114 return "AMD 8111 USB 2.0 controller"; 115 116 case 0x20951022: 117 return ("AMD CS5536 (Geode) USB 2.0 controller"); 118 case 0x78081022: 119 return ("AMD FCH USB 2.0 controller"); 120 case 0x79081022: 121 return ("AMD FCH USB 2.0 controller"); 122 123 case 0x43451002: 124 return "ATI SB200 USB 2.0 controller"; 125 case 0x43731002: 126 return "ATI SB400 USB 2.0 controller"; 127 case 0x43961002: 128 return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller"); 129 130 case 0x0f348086: 131 return ("Intel BayTrail USB 2.0 controller"); 132 case 0x1c268086: 133 return ("Intel Cougar Point USB 2.0 controller"); 134 case 0x1c2d8086: 135 return ("Intel Cougar Point USB 2.0 controller"); 136 case 0x1d268086: 137 return ("Intel Patsburg USB 2.0 controller"); 138 case 0x1d2d8086: 139 return ("Intel Patsburg USB 2.0 controller"); 140 case 0x1e268086: 141 return ("Intel Panther Point USB 2.0 controller"); 142 case 0x1e2d8086: 143 return ("Intel Panther Point USB 2.0 controller"); 144 case 0x1f2c8086: 145 return ("Intel Avoton USB 2.0 controller"); 146 case 0x25ad8086: 147 return "Intel 6300ESB USB 2.0 controller"; 148 case 0x24cd8086: 149 return "Intel 82801DB/L/M (ICH4) USB 2.0 controller"; 150 case 0x24dd8086: 151 return "Intel 82801EB/R (ICH5) USB 2.0 controller"; 152 case 0x265c8086: 153 return "Intel 82801FB (ICH6) USB 2.0 controller"; 154 case 0x268c8086: 155 return ("Intel 63XXESB USB 2.0 controller"); 156 case 0x27cc8086: 157 return "Intel 82801GB/R (ICH7) USB 2.0 controller"; 158 case 0x28368086: 159 return "Intel 82801H (ICH8) USB 2.0 controller USB2-A"; 160 case 0x283a8086: 161 return "Intel 82801H (ICH8) USB 2.0 controller USB2-B"; 162 case 0x293a8086: 163 return "Intel 82801I (ICH9) USB 2.0 controller"; 164 case 0x293c8086: 165 return "Intel 82801I (ICH9) USB 2.0 controller"; 166 case 0x3a3a8086: 167 return "Intel 82801JI (ICH10) USB 2.0 controller USB-A"; 168 case 0x3a3c8086: 169 return "Intel 82801JI (ICH10) USB 2.0 controller USB-B"; 170 case 0x3a6c8086: 171 return "Intel 82801JD (ICH10) USB 2.0 controller USB-A"; 172 case 0x3a6a8086: 173 return "Intel 82801JD (ICH10) USB 2.0 controller USB-B"; 174 case 0x3b348086: 175 return ("Intel PCH USB 2.0 controller USB-A"); 176 case 0x3b3c8086: 177 return ("Intel PCH USB 2.0 controller USB-B"); 178 case 0x8c268086: 179 return ("Intel Lynx Point USB 2.0 controller USB-A"); 180 case 0x8c2d8086: 181 return ("Intel Lynx Point USB 2.0 controller USB-B"); 182 case 0x8ca68086: 183 return ("Intel Wildcat Point USB 2.0 controller USB-A"); 184 case 0x8cad8086: 185 return ("Intel Wildcat Point USB 2.0 controller USB-B"); 186 case 0x8d268086: 187 return ("Intel Wellsburg USB 2.0 controller"); 188 case 0x8d2d8086: 189 return ("Intel Wellsburg USB 2.0 controller"); 190 case 0x9c268086: 191 return ("Intel Lynx Point-LP USB 2.0 controller"); 192 case 0x9ca68086: 193 return ("Intel Wildcat Point-LP USB 2.0 controller"); 194 195 case 0x00e01033: 196 return ("NEC uPD 72010x USB 2.0 controller"); 197 198 case 0x006810de: 199 return "NVIDIA nForce2 USB 2.0 controller"; 200 case 0x008810de: 201 return "NVIDIA nForce2 Ultra 400 USB 2.0 controller"; 202 case 0x00d810de: 203 return "NVIDIA nForce3 USB 2.0 controller"; 204 case 0x00e810de: 205 return "NVIDIA nForce3 250 USB 2.0 controller"; 206 case 0x005b10de: 207 return "NVIDIA nForce CK804 USB 2.0 controller"; 208 case 0x036d10de: 209 return "NVIDIA nForce MCP55 USB 2.0 controller"; 210 case 0x03f210de: 211 return "NVIDIA nForce MCP61 USB 2.0 controller"; 212 case 0x0aa610de: 213 return "NVIDIA nForce MCP79 USB 2.0 controller"; 214 case 0x0aa910de: 215 return "NVIDIA nForce MCP79 USB 2.0 controller"; 216 case 0x0aaa10de: 217 return "NVIDIA nForce MCP79 USB 2.0 controller"; 218 219 case 0x15621131: 220 return "Philips ISP156x USB 2.0 controller"; 221 222 case 0x70021039: 223 return "SiS 968 USB 2.0 controller"; 224 225 case 0x31041106: 226 return ("VIA VT6202 USB 2.0 controller"); 227 228 case 0x077015ad: 229 return ("VMware USB 2.0 controller"); 230 231 case 0x31041d17: 232 return ("Zhaoxin ZX-100/ZX-200/ZX-E USB 2.0 controller"); 233 234 default: 235 break; 236 } 237 238 if ((pci_get_class(self) == PCIC_SERIALBUS) 239 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB) 240 && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) { 241 return ("EHCI (generic) USB 2.0 controller"); 242 } 243 return (NULL); /* dunno */ 244 } 245 246 static int 247 ehci_pci_probe(device_t self) 248 { 249 const char *desc = ehci_pci_match(self); 250 251 if (desc) { 252 device_set_desc(self, desc); 253 return (BUS_PROBE_DEFAULT); 254 } else { 255 return (ENXIO); 256 } 257 } 258 259 static void 260 ehci_pci_ati_quirk(device_t self, uint8_t is_sb700) 261 { 262 device_t smbdev; 263 uint32_t val; 264 265 if (is_sb700) { 266 /* Lookup SMBUS PCI device */ 267 smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385); 268 if (smbdev == NULL) 269 return; 270 val = pci_get_revid(smbdev); 271 if (val != 0x3a && val != 0x3b) 272 return; 273 } 274 275 /* 276 * Note: this bit is described as reserved in SB700 277 * Register Reference Guide. 278 */ 279 val = pci_read_config(self, 0x53, 1); 280 if (!(val & 0x8)) { 281 val |= 0x8; 282 pci_write_config(self, 0x53, val, 1); 283 device_printf(self, "AMD SB600/700 quirk applied\n"); 284 } 285 } 286 287 static void 288 ehci_pci_via_quirk(device_t self) 289 { 290 uint32_t val; 291 292 if ((pci_get_device(self) == 0x3104) && 293 ((pci_get_revid(self) & 0xf0) == 0x60)) { 294 /* Correct schedule sleep time to 10us */ 295 val = pci_read_config(self, 0x4b, 1); 296 if (val & 0x20) 297 return; 298 val |= 0x20; 299 pci_write_config(self, 0x4b, val, 1); 300 device_printf(self, "VIA-quirk applied\n"); 301 } 302 } 303 304 static int 305 ehci_pci_attach(device_t self) 306 { 307 ehci_softc_t *sc = device_get_softc(self); 308 int err; 309 int rid; 310 311 /* initialise some bus fields */ 312 sc->sc_bus.parent = self; 313 sc->sc_bus.devices = sc->sc_devices; 314 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 315 sc->sc_bus.dma_bits = 32; 316 317 /* get all DMA memory */ 318 if (usb_bus_mem_alloc_all(&sc->sc_bus, 319 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 320 return (ENOMEM); 321 } 322 323 pci_enable_busmaster(self); 324 325 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) { 326 case PCI_USB_REV_PRE_1_0: 327 case PCI_USB_REV_1_0: 328 case PCI_USB_REV_1_1: 329 /* 330 * NOTE: some EHCI USB controllers have the wrong USB 331 * revision number. It appears those controllers are 332 * fully compliant so we just ignore this value in 333 * some common cases. 334 */ 335 device_printf(self, "pre-2.0 USB revision (ignored)\n"); 336 /* fallthrough */ 337 case PCI_USB_REV_2_0: 338 break; 339 default: 340 /* Quirk for Parallels Desktop 4.0 */ 341 device_printf(self, "USB revision is unknown. Assuming v2.0.\n"); 342 break; 343 } 344 345 rid = PCI_CBMEM; 346 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, 347 RF_ACTIVE); 348 if (!sc->sc_io_res) { 349 device_printf(self, "Could not map memory\n"); 350 goto error; 351 } 352 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 353 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 354 sc->sc_io_size = rman_get_size(sc->sc_io_res); 355 356 rid = 0; 357 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 358 RF_SHAREABLE | RF_ACTIVE); 359 if (sc->sc_irq_res == NULL) { 360 device_printf(self, "Could not allocate irq\n"); 361 goto error; 362 } 363 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 364 if (!sc->sc_bus.bdev) { 365 device_printf(self, "Could not add USB device\n"); 366 goto error; 367 } 368 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 369 370 /* 371 * ehci_pci_match will never return NULL if ehci_pci_probe 372 * succeeded 373 */ 374 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self)); 375 switch (pci_get_vendor(self)) { 376 case PCI_EHCI_VENDORID_ACERLABS: 377 sprintf(sc->sc_vendor, "AcerLabs"); 378 break; 379 case PCI_EHCI_VENDORID_AMD: 380 sprintf(sc->sc_vendor, "AMD"); 381 break; 382 case PCI_EHCI_VENDORID_APPLE: 383 sprintf(sc->sc_vendor, "Apple"); 384 break; 385 case PCI_EHCI_VENDORID_ATI: 386 sprintf(sc->sc_vendor, "ATI"); 387 break; 388 case PCI_EHCI_VENDORID_CMDTECH: 389 sprintf(sc->sc_vendor, "CMDTECH"); 390 break; 391 case PCI_EHCI_VENDORID_HYGON: 392 sprintf(sc->sc_vendor, "Hygon"); 393 break; 394 case PCI_EHCI_VENDORID_INTEL: 395 sprintf(sc->sc_vendor, "Intel"); 396 break; 397 case PCI_EHCI_VENDORID_NEC: 398 sprintf(sc->sc_vendor, "NEC"); 399 break; 400 case PCI_EHCI_VENDORID_OPTI: 401 sprintf(sc->sc_vendor, "OPTi"); 402 break; 403 case PCI_EHCI_VENDORID_PHILIPS: 404 sprintf(sc->sc_vendor, "Philips"); 405 break; 406 case PCI_EHCI_VENDORID_SIS: 407 sprintf(sc->sc_vendor, "SiS"); 408 break; 409 case PCI_EHCI_VENDORID_NVIDIA: 410 case PCI_EHCI_VENDORID_NVIDIA2: 411 sprintf(sc->sc_vendor, "nVidia"); 412 break; 413 case PCI_EHCI_VENDORID_VIA: 414 sprintf(sc->sc_vendor, "VIA"); 415 break; 416 case PCI_EHCI_VENDORID_VMWARE: 417 sprintf(sc->sc_vendor, "VMware"); 418 break; 419 case PCI_EHCI_VENDORID_ZHAOXIN: 420 sprintf(sc->sc_vendor, "Zhaoxin"); 421 break; 422 default: 423 if (bootverbose) 424 device_printf(self, "(New EHCI DeviceId=0x%08x)\n", 425 pci_get_devid(self)); 426 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self)); 427 } 428 429 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 430 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 431 if (err) { 432 device_printf(self, "Could not setup irq, %d\n", err); 433 sc->sc_intr_hdl = NULL; 434 goto error; 435 } 436 ehci_pci_take_controller(self); 437 438 /* Undocumented quirks taken from Linux */ 439 440 switch (pci_get_vendor(self)) { 441 case PCI_EHCI_VENDORID_ATI: 442 /* SB600 and SB700 EHCI quirk */ 443 switch (pci_get_device(self)) { 444 case 0x4386: 445 ehci_pci_ati_quirk(self, 0); 446 break; 447 case 0x4396: 448 ehci_pci_ati_quirk(self, 1); 449 break; 450 default: 451 break; 452 } 453 break; 454 455 case PCI_EHCI_VENDORID_VIA: 456 ehci_pci_via_quirk(self); 457 break; 458 459 default: 460 break; 461 } 462 463 /* Dropped interrupts workaround */ 464 switch (pci_get_vendor(self)) { 465 case PCI_EHCI_VENDORID_ATI: 466 case PCI_EHCI_VENDORID_VIA: 467 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG; 468 if (bootverbose) 469 device_printf(self, 470 "Dropped interrupts workaround enabled\n"); 471 break; 472 default: 473 break; 474 } 475 476 /* Doorbell feature workaround */ 477 switch (pci_get_vendor(self)) { 478 case PCI_EHCI_VENDORID_NVIDIA: 479 case PCI_EHCI_VENDORID_NVIDIA2: 480 sc->sc_flags |= EHCI_SCFLG_IAADBUG; 481 if (bootverbose) 482 device_printf(self, 483 "Doorbell workaround enabled\n"); 484 break; 485 default: 486 break; 487 } 488 489 err = ehci_init(sc); 490 if (!err) { 491 err = device_probe_and_attach(sc->sc_bus.bdev); 492 } 493 if (err) { 494 device_printf(self, "USB init failed err=%d\n", err); 495 goto error; 496 } 497 return (0); 498 499 error: 500 ehci_pci_detach(self); 501 return (ENXIO); 502 } 503 504 static int 505 ehci_pci_detach(device_t self) 506 { 507 ehci_softc_t *sc = device_get_softc(self); 508 509 /* during module unload there are lots of children leftover */ 510 device_delete_children(self); 511 512 pci_disable_busmaster(self); 513 514 if (sc->sc_irq_res && sc->sc_intr_hdl) { 515 /* 516 * only call ehci_detach() after ehci_init() 517 */ 518 ehci_detach(sc); 519 520 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 521 522 if (err) 523 /* XXX or should we panic? */ 524 device_printf(self, "Could not tear down irq, %d\n", 525 err); 526 sc->sc_intr_hdl = NULL; 527 } 528 if (sc->sc_irq_res) { 529 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 530 sc->sc_irq_res = NULL; 531 } 532 if (sc->sc_io_res) { 533 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, 534 sc->sc_io_res); 535 sc->sc_io_res = NULL; 536 } 537 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 538 539 return (0); 540 } 541 542 static int 543 ehci_pci_take_controller(device_t self) 544 { 545 ehci_softc_t *sc = device_get_softc(self); 546 uint32_t cparams; 547 uint32_t eec; 548 uint16_t to; 549 uint8_t eecp; 550 uint8_t bios_sem; 551 552 cparams = EREAD4(sc, EHCI_HCCPARAMS); 553 554 /* Synchronise with the BIOS if it owns the controller. */ 555 for (eecp = EHCI_HCC_EECP(cparams); eecp != 0; 556 eecp = EHCI_EECP_NEXT(eec)) { 557 eec = pci_read_config(self, eecp, 4); 558 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) { 559 continue; 560 } 561 bios_sem = pci_read_config(self, eecp + 562 EHCI_LEGSUP_BIOS_SEM, 1); 563 if (bios_sem == 0) { 564 continue; 565 } 566 device_printf(sc->sc_bus.bdev, "waiting for BIOS " 567 "to give up control\n"); 568 pci_write_config(self, eecp + 569 EHCI_LEGSUP_OS_SEM, 1, 1); 570 to = 500; 571 while (1) { 572 bios_sem = pci_read_config(self, eecp + 573 EHCI_LEGSUP_BIOS_SEM, 1); 574 if (bios_sem == 0) 575 break; 576 577 if (--to == 0) { 578 device_printf(sc->sc_bus.bdev, 579 "timed out waiting for BIOS\n"); 580 break; 581 } 582 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */ 583 } 584 } 585 return (0); 586 } 587 588 static device_method_t ehci_pci_methods[] = { 589 /* Device interface */ 590 DEVMETHOD(device_probe, ehci_pci_probe), 591 DEVMETHOD(device_attach, ehci_pci_attach), 592 DEVMETHOD(device_detach, ehci_pci_detach), 593 DEVMETHOD(device_suspend, bus_generic_suspend), 594 DEVMETHOD(device_resume, bus_generic_resume), 595 DEVMETHOD(device_shutdown, bus_generic_shutdown), 596 DEVMETHOD(usb_take_controller, ehci_pci_take_controller), 597 598 DEVMETHOD_END 599 }; 600 601 static driver_t ehci_driver = { 602 .name = "ehci", 603 .methods = ehci_pci_methods, 604 .size = sizeof(struct ehci_softc), 605 }; 606 607 DRIVER_MODULE(ehci, pci, ehci_driver, 0, 0); 608 MODULE_DEPEND(ehci, usb, 1, 1, 1); 609