1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. 5 * All rights reserved. 6 * 7 * Developed by Semihalf. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of MARVELL nor the names of contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* 35 * FDT attachment driver for the USB Enhanced Host Controller. 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 #include "opt_bus.h" 42 43 #include <sys/stdint.h> 44 #include <sys/stddef.h> 45 #include <sys/param.h> 46 #include <sys/queue.h> 47 #include <sys/types.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/bus.h> 51 #include <sys/module.h> 52 #include <sys/lock.h> 53 #include <sys/mutex.h> 54 #include <sys/condvar.h> 55 #include <sys/sysctl.h> 56 #include <sys/sx.h> 57 #include <sys/unistd.h> 58 #include <sys/callout.h> 59 #include <sys/malloc.h> 60 #include <sys/priv.h> 61 62 #include <dev/ofw/ofw_bus.h> 63 #include <dev/ofw/ofw_bus_subr.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 68 #include <dev/usb/usb_core.h> 69 #include <dev/usb/usb_busdma.h> 70 #include <dev/usb/usb_process.h> 71 #include <dev/usb/usb_util.h> 72 73 #include <dev/usb/usb_controller.h> 74 #include <dev/usb/usb_bus.h> 75 #include <dev/usb/controller/ehci.h> 76 #include <dev/usb/controller/ehcireg.h> 77 78 #if !defined(__aarch64__) 79 #include <arm/mv/mvreg.h> 80 #endif 81 #include <arm/mv/mvvar.h> 82 83 #define EHCI_VENDORID_MRVL 0x1286 84 #define EHCI_HC_DEVSTR "Marvell Integrated USB 2.0 controller" 85 86 static device_attach_t mv_ehci_attach; 87 static device_detach_t mv_ehci_detach; 88 89 static int err_intr(void *arg); 90 91 static struct resource *irq_err; 92 static void *ih_err; 93 94 /* EHCI HC regs start at this offset within USB range */ 95 #define MV_USB_HOST_OFST 0x0100 96 97 #define USB_BRIDGE_INTR_CAUSE 0x210 98 #define USB_BRIDGE_INTR_MASK 0x214 99 #define USB_BRIDGE_ERR_ADDR 0x21C 100 101 #define MV_USB_ADDR_DECODE_ERR (1 << 0) 102 #define MV_USB_HOST_UNDERFLOW (1 << 1) 103 #define MV_USB_HOST_OVERFLOW (1 << 2) 104 #define MV_USB_DEVICE_UNDERFLOW (1 << 3) 105 106 enum mv_ehci_hwtype { 107 HWTYPE_NONE = 0, 108 HWTYPE_MV_EHCI_V1, 109 HWTYPE_MV_EHCI_V2, 110 }; 111 112 static struct ofw_compat_data compat_data[] = { 113 {"mrvl,usb-ehci", HWTYPE_MV_EHCI_V1}, 114 {"marvell,orion-ehci", HWTYPE_MV_EHCI_V2}, 115 {"marvell,armada-3700-ehci", HWTYPE_MV_EHCI_V2}, 116 {NULL, HWTYPE_NONE} 117 }; 118 119 static void 120 mv_ehci_post_reset(struct ehci_softc *ehci_softc) 121 { 122 uint32_t usbmode; 123 124 /* Force HOST mode */ 125 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 126 usbmode &= ~EHCI_UM_CM; 127 usbmode |= EHCI_UM_CM_HOST; 128 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 129 } 130 131 static int 132 mv_ehci_probe(device_t self) 133 { 134 135 if (!ofw_bus_status_okay(self)) 136 return (ENXIO); 137 138 if (!ofw_bus_search_compatible(self, compat_data)->ocd_data) 139 return (ENXIO); 140 141 device_set_desc(self, EHCI_HC_DEVSTR); 142 143 return (BUS_PROBE_DEFAULT); 144 } 145 146 static int 147 mv_ehci_attach(device_t self) 148 { 149 ehci_softc_t *sc = device_get_softc(self); 150 enum mv_ehci_hwtype hwtype; 151 bus_space_handle_t bsh; 152 int err; 153 int rid; 154 155 /* initialise some bus fields */ 156 sc->sc_bus.parent = self; 157 sc->sc_bus.devices = sc->sc_devices; 158 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 159 sc->sc_bus.dma_bits = 32; 160 161 hwtype = ofw_bus_search_compatible(self, compat_data)->ocd_data; 162 if (hwtype == HWTYPE_NONE) { 163 device_printf(self, "Wrong HW type flag detected\n"); 164 return (ENXIO); 165 } 166 167 /* get all DMA memory */ 168 if (usb_bus_mem_alloc_all(&sc->sc_bus, 169 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 170 return (ENOMEM); 171 } 172 173 rid = 0; 174 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 175 if (!sc->sc_io_res) { 176 device_printf(self, "Could not map memory\n"); 177 goto error; 178 } 179 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 180 bsh = rman_get_bushandle(sc->sc_io_res); 181 sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST; 182 183 /* 184 * Marvell EHCI host controller registers start at certain offset 185 * within the whole USB registers range, so create a subregion for the 186 * host mode configuration purposes. 187 */ 188 189 if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST, 190 sc->sc_io_size, &sc->sc_io_hdl) != 0) 191 panic("%s: unable to subregion USB host registers", 192 device_get_name(self)); 193 194 rid = 0; 195 if (hwtype == HWTYPE_MV_EHCI_V1) { 196 irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 197 RF_SHAREABLE | RF_ACTIVE); 198 if (irq_err == NULL) { 199 device_printf(self, "Could not allocate error irq\n"); 200 mv_ehci_detach(self); 201 return (ENXIO); 202 } 203 rid = 1; 204 } 205 206 /* 207 * Notice: Marvell EHCI controller has TWO interrupt lines, so make 208 * sure to use the correct rid for the main one (controller interrupt) 209 * -- refer to DTS for the right resource number to use here. 210 */ 211 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 212 RF_SHAREABLE | RF_ACTIVE); 213 if (sc->sc_irq_res == NULL) { 214 device_printf(self, "Could not allocate irq\n"); 215 goto error; 216 } 217 218 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 219 if (!sc->sc_bus.bdev) { 220 device_printf(self, "Could not add USB device\n"); 221 goto error; 222 } 223 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 224 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 225 226 sprintf(sc->sc_vendor, "Marvell"); 227 228 if (hwtype == HWTYPE_MV_EHCI_V1) { 229 err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO, 230 err_intr, NULL, sc, &ih_err); 231 if (err) { 232 device_printf(self, "Could not setup error irq, %d\n", err); 233 ih_err = NULL; 234 goto error; 235 } 236 } 237 238 EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR | 239 MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW | 240 MV_USB_DEVICE_UNDERFLOW); 241 242 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 243 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 244 if (err) { 245 device_printf(self, "Could not setup irq, %d\n", err); 246 sc->sc_intr_hdl = NULL; 247 goto error; 248 } 249 250 /* 251 * Workaround for Marvell integrated EHCI controller: reset of 252 * the EHCI core clears the USBMODE register, which sets the core in 253 * an undefined state (neither host nor agent), so it needs to be set 254 * again for proper operation. 255 * 256 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for 257 * details. 258 */ 259 sc->sc_vendor_post_reset = mv_ehci_post_reset; 260 if (bootverbose) 261 device_printf(self, "5.24 GL USB-2 workaround enabled\n"); 262 263 /* XXX all MV chips need it? */ 264 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 265 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 266 err = ehci_init(sc); 267 if (!err) { 268 err = device_probe_and_attach(sc->sc_bus.bdev); 269 } 270 if (err) { 271 device_printf(self, "USB init failed err=%d\n", err); 272 goto error; 273 } 274 return (0); 275 276 error: 277 mv_ehci_detach(self); 278 return (ENXIO); 279 } 280 281 static int 282 mv_ehci_detach(device_t self) 283 { 284 ehci_softc_t *sc = device_get_softc(self); 285 int err; 286 287 /* during module unload there are lots of children leftover */ 288 device_delete_children(self); 289 290 /* 291 * disable interrupts that might have been switched on in mv_ehci_attach 292 */ 293 if (sc->sc_io_res) { 294 EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0); 295 } 296 if (sc->sc_irq_res && sc->sc_intr_hdl) { 297 /* 298 * only call ehci_detach() after ehci_init() 299 */ 300 ehci_detach(sc); 301 302 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 303 304 if (err) 305 /* XXX or should we panic? */ 306 device_printf(self, "Could not tear down irq, %d\n", 307 err); 308 sc->sc_intr_hdl = NULL; 309 } 310 if (irq_err && ih_err) { 311 err = bus_teardown_intr(self, irq_err, ih_err); 312 313 if (err) 314 device_printf(self, "Could not tear down irq, %d\n", 315 err); 316 ih_err = NULL; 317 } 318 if (irq_err) { 319 bus_release_resource(self, SYS_RES_IRQ, 0, irq_err); 320 irq_err = NULL; 321 } 322 if (sc->sc_irq_res) { 323 bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res); 324 sc->sc_irq_res = NULL; 325 } 326 if (sc->sc_io_res) { 327 bus_release_resource(self, SYS_RES_MEMORY, 0, 328 sc->sc_io_res); 329 sc->sc_io_res = NULL; 330 } 331 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 332 333 return (0); 334 } 335 336 static int 337 err_intr(void *arg) 338 { 339 ehci_softc_t *sc = arg; 340 unsigned int cause; 341 342 cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE); 343 if (cause) { 344 printf("USB error: "); 345 if (cause & MV_USB_ADDR_DECODE_ERR) { 346 uint32_t addr; 347 348 addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR); 349 printf("address decoding error (addr=%#x)\n", addr); 350 } 351 if (cause & MV_USB_HOST_UNDERFLOW) 352 printf("host underflow\n"); 353 if (cause & MV_USB_HOST_OVERFLOW) 354 printf("host overflow\n"); 355 if (cause & MV_USB_DEVICE_UNDERFLOW) 356 printf("device underflow\n"); 357 if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW | 358 MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW)) 359 printf("unknown cause (cause=%#x)\n", cause); 360 361 EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0); 362 } 363 return (FILTER_HANDLED); 364 } 365 366 static device_method_t ehci_methods[] = { 367 /* Device interface */ 368 DEVMETHOD(device_probe, mv_ehci_probe), 369 DEVMETHOD(device_attach, mv_ehci_attach), 370 DEVMETHOD(device_detach, mv_ehci_detach), 371 DEVMETHOD(device_suspend, bus_generic_suspend), 372 DEVMETHOD(device_resume, bus_generic_resume), 373 DEVMETHOD(device_shutdown, bus_generic_shutdown), 374 375 DEVMETHOD_END 376 }; 377 378 static driver_t ehci_driver = { 379 "ehci", 380 ehci_methods, 381 sizeof(ehci_softc_t), 382 }; 383 384 static devclass_t ehci_devclass; 385 386 DRIVER_MODULE(ehci_mv, simplebus, ehci_driver, ehci_devclass, 0, 0); 387 MODULE_DEPEND(ehci_mv, usb, 1, 1, 1); 388