xref: /freebsd/sys/dev/usb/controller/ehci_mv.c (revision 49b49cda41feabe3439f7318e8bf40e3896c7bf4)
1 /*-
2  * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3  * All rights reserved.
4  *
5  * Developed by Semihalf.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of MARVELL nor the names of contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 /*
33  * FDT attachment driver for the USB Enhanced Host Controller.
34  */
35 
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
38 
39 #include "opt_bus.h"
40 
41 #include <sys/stdint.h>
42 #include <sys/stddef.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/bus.h>
49 #include <sys/module.h>
50 #include <sys/lock.h>
51 #include <sys/mutex.h>
52 #include <sys/condvar.h>
53 #include <sys/sysctl.h>
54 #include <sys/sx.h>
55 #include <sys/unistd.h>
56 #include <sys/callout.h>
57 #include <sys/malloc.h>
58 #include <sys/priv.h>
59 
60 #include <dev/ofw/ofw_bus.h>
61 #include <dev/ofw/ofw_bus_subr.h>
62 
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 
66 #include <dev/usb/usb_core.h>
67 #include <dev/usb/usb_busdma.h>
68 #include <dev/usb/usb_process.h>
69 #include <dev/usb/usb_util.h>
70 
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ehci.h>
74 #include <dev/usb/controller/ehcireg.h>
75 
76 #include <arm/mv/mvreg.h>
77 #include <arm/mv/mvvar.h>
78 
79 #define	EHCI_VENDORID_MRVL	0x1286
80 #define	EHCI_HC_DEVSTR		"Marvell Integrated USB 2.0 controller"
81 
82 static device_attach_t mv_ehci_attach;
83 static device_detach_t mv_ehci_detach;
84 
85 static int err_intr(void *arg);
86 
87 static struct resource *irq_err;
88 static void *ih_err;
89 
90 /* EHCI HC regs start at this offset within USB range */
91 #define	MV_USB_HOST_OFST	0x0100
92 
93 #define	USB_BRIDGE_INTR_CAUSE	0x210
94 #define	USB_BRIDGE_INTR_MASK	0x214
95 #define	USB_BRIDGE_ERR_ADDR	0x21C
96 
97 #define	MV_USB_ADDR_DECODE_ERR (1 << 0)
98 #define	MV_USB_HOST_UNDERFLOW  (1 << 1)
99 #define	MV_USB_HOST_OVERFLOW   (1 << 2)
100 #define	MV_USB_DEVICE_UNDERFLOW (1 << 3)
101 
102 static struct ofw_compat_data compat_data[] = {
103 	{"mrvl,usb-ehci",	true},
104 	{"marvell,orion-ehci",	true},
105 	{NULL,			false}
106 };
107 
108 static int
109 mv_ehci_probe(device_t self)
110 {
111 
112 	if (!ofw_bus_status_okay(self))
113 		return (ENXIO);
114 
115 	if (!ofw_bus_search_compatible(self, compat_data)->ocd_data)
116 		return (ENXIO);
117 
118 	device_set_desc(self, EHCI_HC_DEVSTR);
119 
120 	return (BUS_PROBE_DEFAULT);
121 }
122 
123 static int
124 mv_ehci_attach(device_t self)
125 {
126 	ehci_softc_t *sc = device_get_softc(self);
127 	bus_space_handle_t bsh;
128 	int err;
129 	int rid;
130 
131 	/* initialise some bus fields */
132 	sc->sc_bus.parent = self;
133 	sc->sc_bus.devices = sc->sc_devices;
134 	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
135 	sc->sc_bus.dma_bits = 32;
136 
137 	/* get all DMA memory */
138 	if (usb_bus_mem_alloc_all(&sc->sc_bus,
139 	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
140 		return (ENOMEM);
141 	}
142 
143 	rid = 0;
144 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
145 	if (!sc->sc_io_res) {
146 		device_printf(self, "Could not map memory\n");
147 		goto error;
148 	}
149 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
150 	bsh = rman_get_bushandle(sc->sc_io_res);
151 	sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST;
152 
153 	/*
154 	 * Marvell EHCI host controller registers start at certain offset
155 	 * within the whole USB registers range, so create a subregion for the
156 	 * host mode configuration purposes.
157 	 */
158 
159 	if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST,
160 	    sc->sc_io_size, &sc->sc_io_hdl) != 0)
161 		panic("%s: unable to subregion USB host registers",
162 		    device_get_name(self));
163 
164 	rid = 0;
165 	if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) {
166 		irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
167 		    RF_SHAREABLE | RF_ACTIVE);
168 		if (irq_err == NULL) {
169 			device_printf(self, "Could not allocate error irq\n");
170 			mv_ehci_detach(self);
171 			return (ENXIO);
172 		}
173 		rid = 1;
174 	}
175 
176 	/*
177 	 * Notice: Marvell EHCI controller has TWO interrupt lines, so make
178 	 * sure to use the correct rid for the main one (controller interrupt)
179 	 * -- refer to DTS for the right resource number to use here.
180 	 */
181 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
182 	    RF_SHAREABLE | RF_ACTIVE);
183 	if (sc->sc_irq_res == NULL) {
184 		device_printf(self, "Could not allocate irq\n");
185 		goto error;
186 	}
187 
188 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
189 	if (!sc->sc_bus.bdev) {
190 		device_printf(self, "Could not add USB device\n");
191 		goto error;
192 	}
193 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
194 	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
195 
196 	sprintf(sc->sc_vendor, "Marvell");
197 
198 	if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) {
199 		err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO,
200 		    err_intr, NULL, sc, &ih_err);
201 		if (err) {
202 			device_printf(self, "Could not setup error irq, %d\n", err);
203 			ih_err = NULL;
204 			goto error;
205 		}
206 	}
207 
208 	EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR |
209 	    MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW |
210 	    MV_USB_DEVICE_UNDERFLOW);
211 
212 	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
213 	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
214 	if (err) {
215 		device_printf(self, "Could not setup irq, %d\n", err);
216 		sc->sc_intr_hdl = NULL;
217 		goto error;
218 	}
219 
220 	/*
221 	 * Workaround for Marvell integrated EHCI controller: reset of
222 	 * the EHCI core clears the USBMODE register, which sets the core in
223 	 * an undefined state (neither host nor agent), so it needs to be set
224 	 * again for proper operation.
225 	 *
226 	 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for
227 	 * details.
228 	 */
229 	sc->sc_flags |= EHCI_SCFLG_SETMODE;
230 	if (bootverbose)
231 		device_printf(self, "5.24 GL USB-2 workaround enabled\n");
232 
233 	/* XXX all MV chips need it? */
234 	sc->sc_flags |= EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_NORESTERM;
235 
236 	err = ehci_init(sc);
237 	if (!err) {
238 		err = device_probe_and_attach(sc->sc_bus.bdev);
239 	}
240 	if (err) {
241 		device_printf(self, "USB init failed err=%d\n", err);
242 		goto error;
243 	}
244 	return (0);
245 
246 error:
247 	mv_ehci_detach(self);
248 	return (ENXIO);
249 }
250 
251 static int
252 mv_ehci_detach(device_t self)
253 {
254 	ehci_softc_t *sc = device_get_softc(self);
255 	device_t bdev;
256 	int err;
257 
258 	if (sc->sc_bus.bdev) {
259 		bdev = sc->sc_bus.bdev;
260 		device_detach(bdev);
261 		device_delete_child(self, bdev);
262 	}
263 	/* during module unload there are lots of children leftover */
264 	device_delete_children(self);
265 
266 	/*
267 	 * disable interrupts that might have been switched on in mv_ehci_attach
268 	 */
269 	if (sc->sc_io_res) {
270 		EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0);
271 	}
272 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
273 		/*
274 		 * only call ehci_detach() after ehci_init()
275 		 */
276 		ehci_detach(sc);
277 
278 		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
279 
280 		if (err)
281 			/* XXX or should we panic? */
282 			device_printf(self, "Could not tear down irq, %d\n",
283 			    err);
284 		sc->sc_intr_hdl = NULL;
285 	}
286 	if (irq_err && ih_err) {
287 		err = bus_teardown_intr(self, irq_err, ih_err);
288 
289 		if (err)
290 			device_printf(self, "Could not tear down irq, %d\n",
291 			    err);
292 		ih_err = NULL;
293 	}
294 	if (irq_err) {
295 		bus_release_resource(self, SYS_RES_IRQ, 0, irq_err);
296 		irq_err = NULL;
297 	}
298 	if (sc->sc_irq_res) {
299 		bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res);
300 		sc->sc_irq_res = NULL;
301 	}
302 	if (sc->sc_io_res) {
303 		bus_release_resource(self, SYS_RES_MEMORY, 0,
304 		    sc->sc_io_res);
305 		sc->sc_io_res = NULL;
306 	}
307 	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
308 
309 	return (0);
310 }
311 
312 static int
313 err_intr(void *arg)
314 {
315 	ehci_softc_t *sc = arg;
316 	unsigned int cause;
317 
318 	cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE);
319 	if (cause) {
320 		printf("USB error: ");
321 		if (cause & MV_USB_ADDR_DECODE_ERR) {
322 			uint32_t addr;
323 
324 			addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR);
325 			printf("address decoding error (addr=%#x)\n", addr);
326 		}
327 		if (cause & MV_USB_HOST_UNDERFLOW)
328 			printf("host underflow\n");
329 		if (cause & MV_USB_HOST_OVERFLOW)
330 			printf("host overflow\n");
331 		if (cause & MV_USB_DEVICE_UNDERFLOW)
332 			printf("device underflow\n");
333 		if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW |
334 		    MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW))
335 			printf("unknown cause (cause=%#x)\n", cause);
336 
337 		EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0);
338 	}
339 	return (FILTER_HANDLED);
340 }
341 
342 static device_method_t ehci_methods[] = {
343 	/* Device interface */
344 	DEVMETHOD(device_probe, mv_ehci_probe),
345 	DEVMETHOD(device_attach, mv_ehci_attach),
346 	DEVMETHOD(device_detach, mv_ehci_detach),
347 	DEVMETHOD(device_suspend, bus_generic_suspend),
348 	DEVMETHOD(device_resume, bus_generic_resume),
349 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
350 
351 	DEVMETHOD_END
352 };
353 
354 static driver_t ehci_driver = {
355 	"ehci",
356 	ehci_methods,
357 	sizeof(ehci_softc_t),
358 };
359 
360 static devclass_t ehci_devclass;
361 
362 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
363 MODULE_DEPEND(ehci, usb, 1, 1, 1);
364