1 /*- 2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of MARVELL nor the names of contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * FDT attachment driver for the USB Enhanced Host Controller. 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 #include "opt_bus.h" 40 41 #include <sys/stdint.h> 42 #include <sys/stddef.h> 43 #include <sys/param.h> 44 #include <sys/queue.h> 45 #include <sys/types.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/bus.h> 49 #include <sys/module.h> 50 #include <sys/lock.h> 51 #include <sys/mutex.h> 52 #include <sys/condvar.h> 53 #include <sys/sysctl.h> 54 #include <sys/sx.h> 55 #include <sys/unistd.h> 56 #include <sys/callout.h> 57 #include <sys/malloc.h> 58 #include <sys/priv.h> 59 60 #include <dev/ofw/ofw_bus.h> 61 #include <dev/ofw/ofw_bus_subr.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 66 #include <dev/usb/usb_core.h> 67 #include <dev/usb/usb_busdma.h> 68 #include <dev/usb/usb_process.h> 69 #include <dev/usb/usb_util.h> 70 71 #include <dev/usb/usb_controller.h> 72 #include <dev/usb/usb_bus.h> 73 #include <dev/usb/controller/ehci.h> 74 #include <dev/usb/controller/ehcireg.h> 75 76 #include <arm/mv/mvreg.h> 77 #include <arm/mv/mvvar.h> 78 79 #define EHCI_VENDORID_MRVL 0x1286 80 #define EHCI_HC_DEVSTR "Marvell Integrated USB 2.0 controller" 81 82 static device_attach_t mv_ehci_attach; 83 static device_detach_t mv_ehci_detach; 84 85 static int err_intr(void *arg); 86 87 static struct resource *irq_err; 88 static void *ih_err; 89 90 /* EHCI HC regs start at this offset within USB range */ 91 #define MV_USB_HOST_OFST 0x0100 92 93 #define USB_BRIDGE_INTR_CAUSE 0x210 94 #define USB_BRIDGE_INTR_MASK 0x214 95 #define USB_BRIDGE_ERR_ADDR 0x21C 96 97 #define MV_USB_ADDR_DECODE_ERR (1 << 0) 98 #define MV_USB_HOST_UNDERFLOW (1 << 1) 99 #define MV_USB_HOST_OVERFLOW (1 << 2) 100 #define MV_USB_DEVICE_UNDERFLOW (1 << 3) 101 102 static struct ofw_compat_data compat_data[] = { 103 {"mrvl,usb-ehci", true}, 104 {"marvell,orion-ehci", true}, 105 {NULL, false} 106 }; 107 108 static void 109 mv_ehci_post_reset(struct ehci_softc *ehci_softc) 110 { 111 uint32_t usbmode; 112 113 /* Force HOST mode */ 114 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 115 usbmode &= ~EHCI_UM_CM; 116 usbmode |= EHCI_UM_CM_HOST; 117 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 118 } 119 120 static int 121 mv_ehci_probe(device_t self) 122 { 123 124 if (!ofw_bus_status_okay(self)) 125 return (ENXIO); 126 127 if (!ofw_bus_search_compatible(self, compat_data)->ocd_data) 128 return (ENXIO); 129 130 device_set_desc(self, EHCI_HC_DEVSTR); 131 132 return (BUS_PROBE_DEFAULT); 133 } 134 135 static int 136 mv_ehci_attach(device_t self) 137 { 138 ehci_softc_t *sc = device_get_softc(self); 139 bus_space_handle_t bsh; 140 int err; 141 int rid; 142 143 /* initialise some bus fields */ 144 sc->sc_bus.parent = self; 145 sc->sc_bus.devices = sc->sc_devices; 146 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 147 sc->sc_bus.dma_bits = 32; 148 149 /* get all DMA memory */ 150 if (usb_bus_mem_alloc_all(&sc->sc_bus, 151 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 152 return (ENOMEM); 153 } 154 155 rid = 0; 156 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 157 if (!sc->sc_io_res) { 158 device_printf(self, "Could not map memory\n"); 159 goto error; 160 } 161 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 162 bsh = rman_get_bushandle(sc->sc_io_res); 163 sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST; 164 165 /* 166 * Marvell EHCI host controller registers start at certain offset 167 * within the whole USB registers range, so create a subregion for the 168 * host mode configuration purposes. 169 */ 170 171 if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST, 172 sc->sc_io_size, &sc->sc_io_hdl) != 0) 173 panic("%s: unable to subregion USB host registers", 174 device_get_name(self)); 175 176 rid = 0; 177 if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) { 178 irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 179 RF_SHAREABLE | RF_ACTIVE); 180 if (irq_err == NULL) { 181 device_printf(self, "Could not allocate error irq\n"); 182 mv_ehci_detach(self); 183 return (ENXIO); 184 } 185 rid = 1; 186 } 187 188 /* 189 * Notice: Marvell EHCI controller has TWO interrupt lines, so make 190 * sure to use the correct rid for the main one (controller interrupt) 191 * -- refer to DTS for the right resource number to use here. 192 */ 193 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 194 RF_SHAREABLE | RF_ACTIVE); 195 if (sc->sc_irq_res == NULL) { 196 device_printf(self, "Could not allocate irq\n"); 197 goto error; 198 } 199 200 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 201 if (!sc->sc_bus.bdev) { 202 device_printf(self, "Could not add USB device\n"); 203 goto error; 204 } 205 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 206 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 207 208 sprintf(sc->sc_vendor, "Marvell"); 209 210 if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) { 211 err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO, 212 err_intr, NULL, sc, &ih_err); 213 if (err) { 214 device_printf(self, "Could not setup error irq, %d\n", err); 215 ih_err = NULL; 216 goto error; 217 } 218 } 219 220 EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR | 221 MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW | 222 MV_USB_DEVICE_UNDERFLOW); 223 224 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 225 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 226 if (err) { 227 device_printf(self, "Could not setup irq, %d\n", err); 228 sc->sc_intr_hdl = NULL; 229 goto error; 230 } 231 232 /* 233 * Workaround for Marvell integrated EHCI controller: reset of 234 * the EHCI core clears the USBMODE register, which sets the core in 235 * an undefined state (neither host nor agent), so it needs to be set 236 * again for proper operation. 237 * 238 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for 239 * details. 240 */ 241 sc->sc_vendor_post_reset = mv_ehci_post_reset; 242 if (bootverbose) 243 device_printf(self, "5.24 GL USB-2 workaround enabled\n"); 244 245 /* XXX all MV chips need it? */ 246 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 247 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 248 err = ehci_init(sc); 249 if (!err) { 250 err = device_probe_and_attach(sc->sc_bus.bdev); 251 } 252 if (err) { 253 device_printf(self, "USB init failed err=%d\n", err); 254 goto error; 255 } 256 return (0); 257 258 error: 259 mv_ehci_detach(self); 260 return (ENXIO); 261 } 262 263 static int 264 mv_ehci_detach(device_t self) 265 { 266 ehci_softc_t *sc = device_get_softc(self); 267 device_t bdev; 268 int err; 269 270 if (sc->sc_bus.bdev) { 271 bdev = sc->sc_bus.bdev; 272 device_detach(bdev); 273 device_delete_child(self, bdev); 274 } 275 /* during module unload there are lots of children leftover */ 276 device_delete_children(self); 277 278 /* 279 * disable interrupts that might have been switched on in mv_ehci_attach 280 */ 281 if (sc->sc_io_res) { 282 EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0); 283 } 284 if (sc->sc_irq_res && sc->sc_intr_hdl) { 285 /* 286 * only call ehci_detach() after ehci_init() 287 */ 288 ehci_detach(sc); 289 290 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 291 292 if (err) 293 /* XXX or should we panic? */ 294 device_printf(self, "Could not tear down irq, %d\n", 295 err); 296 sc->sc_intr_hdl = NULL; 297 } 298 if (irq_err && ih_err) { 299 err = bus_teardown_intr(self, irq_err, ih_err); 300 301 if (err) 302 device_printf(self, "Could not tear down irq, %d\n", 303 err); 304 ih_err = NULL; 305 } 306 if (irq_err) { 307 bus_release_resource(self, SYS_RES_IRQ, 0, irq_err); 308 irq_err = NULL; 309 } 310 if (sc->sc_irq_res) { 311 bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res); 312 sc->sc_irq_res = NULL; 313 } 314 if (sc->sc_io_res) { 315 bus_release_resource(self, SYS_RES_MEMORY, 0, 316 sc->sc_io_res); 317 sc->sc_io_res = NULL; 318 } 319 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 320 321 return (0); 322 } 323 324 static int 325 err_intr(void *arg) 326 { 327 ehci_softc_t *sc = arg; 328 unsigned int cause; 329 330 cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE); 331 if (cause) { 332 printf("USB error: "); 333 if (cause & MV_USB_ADDR_DECODE_ERR) { 334 uint32_t addr; 335 336 addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR); 337 printf("address decoding error (addr=%#x)\n", addr); 338 } 339 if (cause & MV_USB_HOST_UNDERFLOW) 340 printf("host underflow\n"); 341 if (cause & MV_USB_HOST_OVERFLOW) 342 printf("host overflow\n"); 343 if (cause & MV_USB_DEVICE_UNDERFLOW) 344 printf("device underflow\n"); 345 if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW | 346 MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW)) 347 printf("unknown cause (cause=%#x)\n", cause); 348 349 EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0); 350 } 351 return (FILTER_HANDLED); 352 } 353 354 static device_method_t ehci_methods[] = { 355 /* Device interface */ 356 DEVMETHOD(device_probe, mv_ehci_probe), 357 DEVMETHOD(device_attach, mv_ehci_attach), 358 DEVMETHOD(device_detach, mv_ehci_detach), 359 DEVMETHOD(device_suspend, bus_generic_suspend), 360 DEVMETHOD(device_resume, bus_generic_resume), 361 DEVMETHOD(device_shutdown, bus_generic_shutdown), 362 363 DEVMETHOD_END 364 }; 365 366 static driver_t ehci_driver = { 367 "ehci", 368 ehci_methods, 369 sizeof(ehci_softc_t), 370 }; 371 372 static devclass_t ehci_devclass; 373 374 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 375 MODULE_DEPEND(ehci, usb, 1, 1, 1); 376