1 /*- 2 * Copyright (c) 2010-2012 Semihalf 3 * Copyright (c) 2012 The FreeBSD Foundation 4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 5 * All rights reserved. 6 * 7 * Portions of this software were developed by Oleksandr Rybalko 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * EHCI driver for Freescale i.MX SoCs which incorporate the USBOH3 controller. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/module.h> 43 #include <sys/bus.h> 44 #include <sys/condvar.h> 45 #include <sys/rman.h> 46 47 #include <dev/ofw/ofw_bus.h> 48 #include <dev/ofw/ofw_bus_subr.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 #include <dev/usb/usb_busdma.h> 53 #include <dev/usb/usb_process.h> 54 #include <dev/usb/usb_controller.h> 55 #include <dev/usb/usb_bus.h> 56 #include <dev/usb/controller/ehci.h> 57 #include <dev/usb/controller/ehcireg.h> 58 #include "usbdevs.h" 59 60 #include <machine/bus.h> 61 #include <machine/resource.h> 62 63 #include <arm/freescale/imx/imx_ccmvar.h> 64 65 #include "opt_platform.h" 66 67 /* 68 * Notes on the hardware and related FDT data seen in the wild. 69 * 70 * There are two sets of registers in the USBOH3 implementation; documentation 71 * refers to them as "core" and "non-core" registers. A set of core register 72 * exists for each OTG or EHCI device. There is a single set of non-core 73 * registers per USBOH3, and they control aspects of operation not directly 74 * related to the USB specs, such as whether interrupts from each of the core 75 * devices are able to generate a SoC wakeup event. 76 * 77 * In the FreeBSD universe we might be inclined to describe the core and 78 * non-core registers by using a pair of resource address/size values (two 79 * entries in the reg property for each core). However, we have to work with 80 * existing FDT data (which mostly comes from the linux universe), and the way 81 * they've chosen to represent this is with an entry for a "usbmisc" device 82 * whose reg property describes the non-core registers. The way we handle FDT 83 * data, this means that the resources (memory-mapped register range) for the 84 * non-core registers belongs to a device other than the echi devices. 85 * 86 * At the moment we have no need to access the non-core registers, so all of 87 * this amounts to documenting what's known. The following compat strings have 88 * been seen in existing FDT data: 89 * - "fsl,imx25-usbmisc" 90 * - "fsl,imx51-usbmisc"; 91 * - "fsl,imx6q-usbmisc"; 92 * 93 * In addition to the single usbmisc device, the existing FDT data defines a 94 * separate device for each of the OTG or EHCI cores within the USBOH3. Each of 95 * those devices has a set of core registers described by the reg property. 96 * 97 * The core registers for each of the four cores in the USBOH3 are divided into 98 * two parts: a set of imx-specific registers at an offset of 0 from the 99 * beginning of the register range, and the standard USB (EHCI or OTG) registers 100 * at an offset of 0x100 from the beginning of the register range. The FreeBSD 101 * way of dealing with this might be to map out two ranges in the reg property, 102 * but that's not what the alternate universe has done. To work with existing 103 * FDT data, we acquire the resource that maps all the core registers, then use 104 * bus_space_subregion() to create another resource that maps just the standard 105 * USB registers, which we provide to the standard USB code in the ehci_softc. 106 * 107 * The following compat strings have been seen for the OTG and EHCI cores. The 108 * FDT compat table in this driver contains all these strings, but as of this 109 * writing, not all of these SoCs have been tested with the driver. The fact 110 * that imx27 is common to all of them gives some hope that the driver will work 111 * on all these SoCs. 112 * - "fsl,imx23-usb", "fsl,imx27-usb"; 113 * - "fsl,imx25-usb", "fsl,imx27-usb"; 114 * - "fsl,imx28-usb", "fsl,imx27-usb"; 115 * - "fsl,imx51-usb", "fsl,imx27-usb"; 116 * - "fsl,imx53-usb", "fsl,imx27-usb"; 117 * - "fsl,imx6q-usb", "fsl,imx27-usb"; 118 * 119 * The FDT data for some SoCs contains the following properties, which we don't 120 * currently do anything with: 121 * - fsl,usbmisc = <&usbmisc 0>; 122 * - fsl,usbphy = <&usbphy0>; 123 * 124 * Some imx SoCs have FDT data related to USB PHY, some don't. We have separate 125 * usbphy drivers where needed; this data is mentioned here just to keep all the 126 * imx-FDT-usb-related info in one place. Here are the usbphy compat strings 127 * known to exist: 128 * - "nop-usbphy" 129 * - "usb-nop-xceiv"; 130 * - "fsl,imx23-usbphy" 131 * - "fsl,imx28-usbphy", "fsl,imx23-usbphy"; 132 * - "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 133 * 134 */ 135 136 static struct ofw_compat_data compat_data[] = { 137 {"fsl,imx6q-usb", 1}, 138 {"fsl,imx53-usb", 1}, 139 {"fsl,imx51-usb", 1}, 140 {"fsl,imx28-usb", 1}, 141 {"fsl,imx27-usb", 1}, 142 {"fsl,imx25-usb", 1}, 143 {"fsl,imx23-usb", 1}, 144 {NULL, 0}, 145 }; 146 147 /* 148 * Each EHCI device in the SoC has some SoC-specific per-device registers at an 149 * offset of 0, then the standard EHCI registers begin at an offset of 0x100. 150 */ 151 #define IMX_EHCI_REG_OFF 0x100 152 #define IMX_EHCI_REG_SIZE 0x100 153 154 struct imx_ehci_softc { 155 ehci_softc_t ehci_softc; 156 struct resource *ehci_mem_res; /* EHCI core regs. */ 157 struct resource *ehci_irq_res; /* EHCI core IRQ. */ 158 }; 159 160 static void 161 imx_ehci_post_reset(struct ehci_softc *ehci_softc) 162 { 163 uint32_t usbmode; 164 165 /* Force HOST mode */ 166 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 167 usbmode &= ~EHCI_UM_CM; 168 usbmode |= EHCI_UM_CM_HOST; 169 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 170 } 171 172 static int 173 imx_ehci_probe(device_t dev) 174 { 175 176 if (!ofw_bus_status_okay(dev)) 177 return (ENXIO); 178 179 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) { 180 device_set_desc(dev, "Freescale i.MX integrated USB controller"); 181 return (BUS_PROBE_DEFAULT); 182 } 183 return (ENXIO); 184 } 185 186 static int 187 imx_ehci_detach(device_t dev) 188 { 189 struct imx_ehci_softc *sc; 190 ehci_softc_t *esc; 191 192 sc = device_get_softc(dev); 193 194 esc = &sc->ehci_softc; 195 196 if (esc->sc_bus.bdev != NULL) 197 device_delete_child(dev, esc->sc_bus.bdev); 198 if (esc->sc_flags & EHCI_SCFLG_DONEINIT) 199 ehci_detach(esc); 200 if (esc->sc_intr_hdl != NULL) 201 bus_teardown_intr(dev, esc->sc_irq_res, 202 esc->sc_intr_hdl); 203 if (sc->ehci_irq_res != NULL) 204 bus_release_resource(dev, SYS_RES_IRQ, 0, 205 sc->ehci_irq_res); 206 if (sc->ehci_mem_res != NULL) 207 bus_release_resource(dev, SYS_RES_MEMORY, 0, 208 sc->ehci_mem_res); 209 210 usb_bus_mem_free_all(&esc->sc_bus, &ehci_iterate_hw_softc); 211 212 /* During module unload there are lots of children leftover */ 213 device_delete_children(dev); 214 215 return (0); 216 } 217 218 static int 219 imx_ehci_attach(device_t dev) 220 { 221 struct imx_ehci_softc *sc; 222 ehci_softc_t *esc; 223 int err, rid; 224 225 sc = device_get_softc(dev); 226 esc = &sc->ehci_softc; 227 err = 0; 228 229 /* Allocate bus_space resources. */ 230 rid = 0; 231 sc->ehci_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 232 RF_ACTIVE); 233 if (sc->ehci_mem_res == NULL) { 234 device_printf(dev, "Cannot allocate memory resources\n"); 235 err = ENXIO; 236 goto out; 237 } 238 239 rid = 0; 240 sc->ehci_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 241 RF_ACTIVE); 242 if (sc->ehci_irq_res == NULL) { 243 device_printf(dev, "Cannot allocate IRQ resources\n"); 244 err = ENXIO; 245 goto out; 246 } 247 248 esc->sc_io_tag = rman_get_bustag(sc->ehci_mem_res); 249 esc->sc_bus.parent = dev; 250 esc->sc_bus.devices = esc->sc_devices; 251 esc->sc_bus.devices_max = EHCI_MAX_DEVICES; 252 esc->sc_bus.dma_bits = 32; 253 254 /* allocate all DMA memory */ 255 if (usb_bus_mem_alloc_all(&esc->sc_bus, USB_GET_DMA_TAG(dev), 256 &ehci_iterate_hw_softc) != 0) { 257 device_printf(dev, "usb_bus_mem_alloc_all() failed\n"); 258 err = ENOMEM; 259 goto out; 260 } 261 262 /* 263 * Set handle to USB related registers subregion used by 264 * generic EHCI driver. 265 */ 266 err = bus_space_subregion(esc->sc_io_tag, 267 rman_get_bushandle(sc->ehci_mem_res), 268 IMX_EHCI_REG_OFF, IMX_EHCI_REG_SIZE, &esc->sc_io_hdl); 269 if (err != 0) { 270 device_printf(dev, "bus_space_subregion() failed\n"); 271 err = ENXIO; 272 goto out; 273 } 274 275 /* Setup interrupt handler. */ 276 err = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 277 NULL, (driver_intr_t *)ehci_interrupt, esc, &esc->sc_intr_hdl); 278 if (err != 0) { 279 device_printf(dev, "Could not setup IRQ\n"); 280 goto out; 281 } 282 283 /* Turn on clocks. */ 284 imx_ccm_usb_enable(dev); 285 286 /* Add USB bus device. */ 287 esc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 288 if (esc->sc_bus.bdev == NULL) { 289 device_printf(dev, "Could not add USB device\n"); 290 goto out; 291 } 292 device_set_ivars(esc->sc_bus.bdev, &esc->sc_bus); 293 294 esc->sc_id_vendor = USB_VENDOR_FREESCALE; 295 strlcpy(esc->sc_vendor, "Freescale", sizeof(esc->sc_vendor)); 296 297 /* 298 * Set flags that affect ehci_init() behavior, and hook our post-reset 299 * code into the standard controller code. 300 */ 301 esc->sc_flags |= EHCI_SCFLG_NORESTERM | EHCI_SCFLG_TT; 302 esc->sc_vendor_post_reset = imx_ehci_post_reset; 303 esc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 304 305 err = ehci_init(esc); 306 if (err != 0) { 307 device_printf(dev, "USB init failed, usb_err_t=%d\n", 308 err); 309 goto out; 310 } 311 esc->sc_flags |= EHCI_SCFLG_DONEINIT; 312 313 /* Probe the bus. */ 314 err = device_probe_and_attach(esc->sc_bus.bdev); 315 if (err != 0) { 316 device_printf(dev, 317 "device_probe_and_attach() failed\n"); 318 goto out; 319 } 320 321 err = 0; 322 323 out: 324 325 if (err != 0) 326 imx_ehci_detach(dev); 327 328 return (err); 329 } 330 331 static device_method_t ehci_methods[] = { 332 /* Device interface */ 333 DEVMETHOD(device_probe, imx_ehci_probe), 334 DEVMETHOD(device_attach, imx_ehci_attach), 335 DEVMETHOD(device_detach, imx_ehci_detach), 336 DEVMETHOD(device_suspend, bus_generic_suspend), 337 DEVMETHOD(device_resume, bus_generic_resume), 338 DEVMETHOD(device_shutdown, bus_generic_shutdown), 339 340 /* Bus interface */ 341 DEVMETHOD(bus_print_child, bus_generic_print_child), 342 343 DEVMETHOD_END 344 }; 345 346 static driver_t ehci_driver = { 347 "ehci", 348 ehci_methods, 349 sizeof(struct imx_ehci_softc) 350 }; 351 352 static devclass_t ehci_devclass; 353 354 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 355 MODULE_DEPEND(ehci, usb, 1, 1, 1); 356