1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Lennart Augustsson (lennart@augustsson.net). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _EHCI_H_ 39 #define _EHCI_H_ 40 41 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 42 43 /* 44 * Alignment NOTE: structures must be aligned so that the hardware can index 45 * without performing addition. 46 */ 47 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */ 48 #define EHCI_FRAMELIST_COUNT 1024 /* units */ 49 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */ 50 51 #if ((8*EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER) 52 #error "maximum number of high-speed isochronous frames is higher than supported!" 53 #endif 54 55 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 56 #error "maximum number of full-speed isochronous frames is higher than supported!" 57 #endif 58 59 /* Link types */ 60 #define EHCI_LINK_TERMINATE 0x00000001 61 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006) 62 #define EHCI_LINK_ITD 0x0 63 #define EHCI_LINK_QH 0x2 64 #define EHCI_LINK_SITD 0x4 65 #define EHCI_LINK_FSTN 0x6 66 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f) 67 68 /* Structures alignment (bytes) */ 69 #define EHCI_ITD_ALIGN 128 70 #define EHCI_SITD_ALIGN 64 71 #define EHCI_QTD_ALIGN 64 72 #define EHCI_QH_ALIGN 128 73 #define EHCI_FSTN_ALIGN 32 74 /* Data buffers are divided into one or more pages */ 75 #define EHCI_PAGE_SIZE 0x1000 76 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \ 77 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \ 78 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \ 79 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \ 80 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \ 81 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0)) 82 #error "Invalid USB page size!" 83 #endif 84 85 86 /* 87 * Isochronous Transfer Descriptor. This descriptor is used for high speed 88 * transfers only. 89 */ 90 struct ehci_itd { 91 volatile uint32_t itd_next; 92 volatile uint32_t itd_status[8]; 93 #define EHCI_ITD_SET_LEN(x) ((x) << 16) 94 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF) 95 #define EHCI_ITD_IOC (1 << 15) 96 #define EHCI_ITD_SET_PG(x) ((x) << 12) 97 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7) 98 #define EHCI_ITD_SET_OFFS(x) (x) 99 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF) 100 #define EHCI_ITD_ACTIVE (1 << 31) 101 #define EHCI_ITD_DATABUFERR (1 << 30) 102 #define EHCI_ITD_BABBLE (1 << 29) 103 #define EHCI_ITD_XACTERR (1 << 28) 104 volatile uint32_t itd_bp[7]; 105 /* itd_bp[0] */ 106 #define EHCI_ITD_SET_ADDR(x) (x) 107 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F) 108 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8) 109 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 110 /* itd_bp[1] */ 111 #define EHCI_ITD_SET_DIR_IN (1 << 11) 112 #define EHCI_ITD_SET_DIR_OUT (0 << 11) 113 #define EHCI_ITD_SET_MPL(x) (x) 114 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF) 115 volatile uint32_t itd_bp_hi[7]; 116 /* 117 * Extra information needed: 118 */ 119 uint32_t itd_self; 120 struct ehci_itd *next; 121 struct ehci_itd *prev; 122 struct ehci_itd *obj_next; 123 struct usb_page_cache *page_cache; 124 } __aligned(EHCI_ITD_ALIGN); 125 126 typedef struct ehci_itd ehci_itd_t; 127 128 /* 129 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used 130 * for full speed transfers only. 131 */ 132 struct ehci_sitd { 133 volatile uint32_t sitd_next; 134 volatile uint32_t sitd_portaddr; 135 #define EHCI_SITD_SET_DIR_OUT (0 << 31) 136 #define EHCI_SITD_SET_DIR_IN (1 << 31) 137 #define EHCI_SITD_SET_ADDR(x) (x) 138 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F) 139 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8) 140 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF) 141 #define EHCI_SITD_GET_DIR(x) ((x) >> 31) 142 #define EHCI_SITD_SET_PORT(x) ((x) << 24) 143 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F) 144 #define EHCI_SITD_SET_HUBA(x) ((x) << 16) 145 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F) 146 volatile uint32_t sitd_mask; 147 #define EHCI_SITD_SET_SMASK(x) (x) 148 #define EHCI_SITD_SET_CMASK(x) ((x) << 8) 149 volatile uint32_t sitd_status; 150 #define EHCI_SITD_COMPLETE_SPLIT (1<<1) 151 #define EHCI_SITD_START_SPLIT (0<<1) 152 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2) 153 #define EHCI_SITD_XACTERR (1<<3) 154 #define EHCI_SITD_BABBLE (1<<4) 155 #define EHCI_SITD_DATABUFERR (1<<5) 156 #define EHCI_SITD_ERROR (1<<6) 157 #define EHCI_SITD_ACTIVE (1<<7) 158 #define EHCI_SITD_IOC (1<<31) 159 #define EHCI_SITD_SET_LEN(len) ((len)<<16) 160 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF) 161 volatile uint32_t sitd_bp[2]; 162 volatile uint32_t sitd_back; 163 volatile uint32_t sitd_bp_hi[2]; 164 /* 165 * Extra information needed: 166 */ 167 uint32_t sitd_self; 168 struct ehci_sitd *next; 169 struct ehci_sitd *prev; 170 struct ehci_sitd *obj_next; 171 struct usb_page_cache *page_cache; 172 } __aligned(EHCI_SITD_ALIGN); 173 174 typedef struct ehci_sitd ehci_sitd_t; 175 176 /* Queue Element Transfer Descriptor */ 177 struct ehci_qtd { 178 volatile uint32_t qtd_next; 179 volatile uint32_t qtd_altnext; 180 volatile uint32_t qtd_status; 181 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff) 182 #define EHCI_QTD_SET_STATUS(x) ((x) << 0) 183 #define EHCI_QTD_ACTIVE 0x80 184 #define EHCI_QTD_HALTED 0x40 185 #define EHCI_QTD_BUFERR 0x20 186 #define EHCI_QTD_BABBLE 0x10 187 #define EHCI_QTD_XACTERR 0x08 188 #define EHCI_QTD_MISSEDMICRO 0x04 189 #define EHCI_QTD_SPLITXSTATE 0x02 190 #define EHCI_QTD_PINGSTATE 0x01 191 #define EHCI_QTD_STATERRS 0x74 192 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3) 193 #define EHCI_QTD_SET_PID(x) ((x) << 8) 194 #define EHCI_QTD_PID_OUT 0x0 195 #define EHCI_QTD_PID_IN 0x1 196 #define EHCI_QTD_PID_SETUP 0x2 197 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3) 198 #define EHCI_QTD_SET_CERR(x) ((x) << 10) 199 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7) 200 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12) 201 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1) 202 #define EHCI_QTD_IOC 0x00008000 203 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff) 204 #define EHCI_QTD_SET_BYTES(x) ((x) << 16) 205 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1) 206 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31) 207 #define EHCI_QTD_TOGGLE_MASK 0x80000000 208 #define EHCI_QTD_NBUFFERS 5 209 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE) 210 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 211 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 212 /* 213 * Extra information needed: 214 */ 215 struct ehci_qtd *alt_next; 216 struct ehci_qtd *obj_next; 217 struct usb_page_cache *page_cache; 218 uint32_t qtd_self; 219 uint16_t len; 220 } __aligned(EHCI_QTD_ALIGN); 221 222 typedef struct ehci_qtd ehci_qtd_t; 223 224 /* Queue Head Sub Structure */ 225 struct ehci_qh_sub { 226 volatile uint32_t qtd_next; 227 volatile uint32_t qtd_altnext; 228 volatile uint32_t qtd_status; 229 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; 230 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; 231 } __aligned(4); 232 233 /* Queue Head */ 234 struct ehci_qh { 235 volatile uint32_t qh_link; 236 volatile uint32_t qh_endp; 237 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */ 238 #define EHCI_QH_SET_ADDR(x) (x) 239 #define EHCI_QH_ADDRMASK 0x0000007f 240 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */ 241 #define EHCI_QH_INACT 0x00000080 242 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */ 243 #define EHCI_QH_SET_ENDPT(x) ((x) << 8) 244 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */ 245 #define EHCI_QH_SET_EPS(x) ((x) << 12) 246 #define EHCI_QH_SPEED_FULL 0x0 247 #define EHCI_QH_SPEED_LOW 0x1 248 #define EHCI_QH_SPEED_HIGH 0x2 249 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */ 250 #define EHCI_QH_DTC 0x00004000 251 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */ 252 #define EHCI_QH_HRECL 0x00008000 253 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */ 254 #define EHCI_QH_SET_MPL(x) ((x) << 16) 255 #define EHCI_QH_MPLMASK 0x07ff0000 256 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */ 257 #define EHCI_QH_CTL 0x08000000 258 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */ 259 #define EHCI_QH_SET_NRL(x) ((x) << 28) 260 volatile uint32_t qh_endphub; 261 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */ 262 #define EHCI_QH_SET_SMASK(x) ((x) << 0) 263 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */ 264 #define EHCI_QH_SET_CMASK(x) ((x) << 8) 265 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */ 266 #define EHCI_QH_SET_HUBA(x) ((x) << 16) 267 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */ 268 #define EHCI_QH_SET_PORT(x) ((x) << 23) 269 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */ 270 #define EHCI_QH_SET_MULT(x) ((x) << 30) 271 volatile uint32_t qh_curqtd; 272 struct ehci_qh_sub qh_qtd; 273 /* 274 * Extra information needed: 275 */ 276 struct ehci_qh *next; 277 struct ehci_qh *prev; 278 struct ehci_qh *obj_next; 279 struct usb_page_cache *page_cache; 280 uint32_t qh_self; 281 } __aligned(EHCI_QH_ALIGN); 282 283 typedef struct ehci_qh ehci_qh_t; 284 285 /* Periodic Frame Span Traversal Node */ 286 struct ehci_fstn { 287 volatile uint32_t fstn_link; 288 volatile uint32_t fstn_back; 289 } __aligned(EHCI_FSTN_ALIGN); 290 291 typedef struct ehci_fstn ehci_fstn_t; 292 293 struct ehci_hw_softc { 294 struct usb_page_cache pframes_pc; 295 struct usb_page_cache async_start_pc; 296 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 297 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 298 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]; 299 300 struct usb_page pframes_pg; 301 struct usb_page async_start_pg; 302 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 303 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 304 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]; 305 }; 306 307 struct ehci_config_desc { 308 struct usb_config_descriptor confd; 309 struct usb_interface_descriptor ifcd; 310 struct usb_endpoint_descriptor endpd; 311 } __packed; 312 313 union ehci_hub_desc { 314 struct usb_status stat; 315 struct usb_port_status ps; 316 struct usb_hub_descriptor hubd; 317 uint8_t temp[128]; 318 }; 319 320 typedef struct ehci_softc { 321 struct ehci_hw_softc sc_hw; 322 struct usb_bus sc_bus; /* base device */ 323 struct usb_callout sc_tmo_pcd; 324 struct usb_callout sc_tmo_poll; 325 union ehci_hub_desc sc_hub_desc; 326 327 struct usb_device *sc_devices[EHCI_MAX_DEVICES]; 328 struct resource *sc_io_res; 329 struct resource *sc_irq_res; 330 struct ehci_qh *sc_async_p_last; 331 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 332 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 333 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]; 334 void *sc_intr_hdl; 335 bus_size_t sc_io_size; 336 bus_space_tag_t sc_io_tag; 337 bus_space_handle_t sc_io_hdl; 338 339 uint32_t sc_eintrs; 340 uint32_t sc_cmd; /* shadow of cmd register during 341 * suspend */ 342 343 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT]; 344 uint16_t sc_id_vendor; /* vendor ID for root hub */ 345 uint16_t sc_flags; /* chip specific flags */ 346 #define EHCI_SCFLG_SETMODE 0x0001 /* set bridge mode again after init */ 347 #define EHCI_SCFLG_FORCESPEED 0x0002 /* force speed */ 348 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */ 349 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */ 350 #define EHCI_SCFLG_BIGEMMIO 0x0010 /* big-endian byte order MMIO */ 351 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */ 352 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */ 353 354 uint8_t sc_offs; /* offset to operational registers */ 355 uint8_t sc_doorbell_disable; /* set on doorbell failure */ 356 uint8_t sc_noport; 357 uint8_t sc_addr; /* device address */ 358 uint8_t sc_conf; /* device configuration */ 359 uint8_t sc_isreset; 360 uint8_t sc_hub_idata[8]; 361 362 char sc_vendor[16]; /* vendor string for root hub */ 363 364 } ehci_softc_t; 365 366 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 367 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 368 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a)) 369 #define EWRITE1(sc, a, x) \ 370 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 371 #define EWRITE2(sc, a, x) \ 372 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 373 #define EWRITE4(sc, a, x) \ 374 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x)) 375 #define EOREAD1(sc, a) \ 376 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 377 #define EOREAD2(sc, a) \ 378 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 379 #define EOREAD4(sc, a) \ 380 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a)) 381 #define EOWRITE1(sc, a, x) \ 382 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 383 #define EOWRITE2(sc, a, x) \ 384 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 385 #define EOWRITE4(sc, a, x) \ 386 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x)) 387 388 #ifdef USB_EHCI_BIG_ENDIAN_DESC 389 /* 390 * Handle byte order conversion between host and ``host controller''. 391 * Typically the latter is little-endian but some controllers require 392 * big-endian in which case we may need to manually swap. 393 */ 394 static __inline uint32_t 395 htohc32(const struct ehci_softc *sc, const uint32_t v) 396 { 397 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v); 398 } 399 400 static __inline uint16_t 401 htohc16(const struct ehci_softc *sc, const uint16_t v) 402 { 403 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v); 404 } 405 406 static __inline uint32_t 407 hc32toh(const struct ehci_softc *sc, const uint32_t v) 408 { 409 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v); 410 } 411 412 static __inline uint16_t 413 hc16toh(const struct ehci_softc *sc, const uint16_t v) 414 { 415 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v); 416 } 417 #else 418 /* 419 * Normal little-endian only conversion routines. 420 */ 421 static __inline uint32_t 422 htohc32(const struct ehci_softc *sc, const uint32_t v) 423 { 424 return htole32(v); 425 } 426 427 static __inline uint16_t 428 htohc16(const struct ehci_softc *sc, const uint16_t v) 429 { 430 return htole16(v); 431 } 432 433 static __inline uint32_t 434 hc32toh(const struct ehci_softc *sc, const uint32_t v) 435 { 436 return le32toh(v); 437 } 438 439 static __inline uint16_t 440 hc16toh(const struct ehci_softc *sc, const uint16_t v) 441 { 442 return le16toh(v); 443 } 444 #endif 445 446 usb_bus_mem_cb_t ehci_iterate_hw_softc; 447 448 usb_error_t ehci_reset(ehci_softc_t *sc); 449 usb_error_t ehci_init(ehci_softc_t *sc); 450 void ehci_detach(struct ehci_softc *sc); 451 void ehci_suspend(struct ehci_softc *sc); 452 void ehci_resume(struct ehci_softc *sc); 453 void ehci_shutdown(ehci_softc_t *sc); 454 void ehci_interrupt(ehci_softc_t *sc); 455 456 #endif /* _EHCI_H_ */ 457