xref: /freebsd/sys/dev/usb/controller/ehci.h (revision 911f0260390e18cf85f3dbf2c719b593efdc1e3c)
1 /* $FreeBSD$ */
2 /*-
3  * SPDX-License-Identifier: BSD-2-Clause
4  *
5  * Copyright (c) 2001 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net).
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _EHCI_H_
34 #define	_EHCI_H_
35 
36 #define	EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
37 
38 /*
39  * Alignment NOTE: structures must be aligned so that the hardware can index
40  * without performing addition.
41  */
42 #define	EHCI_FRAMELIST_ALIGN          0x1000	/* bytes */
43 #define	EHCI_FRAMELIST_COUNT            1024	/* units */
44 #define	EHCI_VIRTUAL_FRAMELIST_COUNT     128	/* units */
45 
46 #if ((8*EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER)
47 #error "maximum number of high-speed isochronous frames is higher than supported!"
48 #endif
49 
50 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
51 #error "maximum number of full-speed isochronous frames is higher than supported!"
52 #endif
53 
54 /* Link types */
55 #define	EHCI_LINK_TERMINATE	0x00000001
56 #define	EHCI_LINK_TYPE(x)	((x) & 0x00000006)
57 #define	EHCI_LINK_ITD		0x0
58 #define	EHCI_LINK_QH		0x2
59 #define	EHCI_LINK_SITD		0x4
60 #define	EHCI_LINK_FSTN		0x6
61 #define	EHCI_LINK_ADDR(x)	((x) &~ 0x1f)
62 
63 /* Structures alignment (bytes) */
64 #define	EHCI_ITD_ALIGN	128
65 #define	EHCI_SITD_ALIGN	64
66 #define	EHCI_QTD_ALIGN	64
67 #define	EHCI_QH_ALIGN	128
68 #define	EHCI_FSTN_ALIGN	32
69 /* Data buffers are divided into one or more pages */
70 #define	EHCI_PAGE_SIZE	0x1000
71 #if	((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) ||	\
72 	(USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) ||	\
73 	(USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) ||	\
74 	(USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) ||	\
75 	(USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) ||	\
76 	(USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0))
77 #error	"Invalid USB page size!"
78 #endif
79 
80 /*
81  * Isochronous Transfer Descriptor.  This descriptor is used for high speed
82  * transfers only.
83  */
84 struct ehci_itd {
85 	volatile uint32_t itd_next;
86 	volatile uint32_t itd_status[8];
87 #define	EHCI_ITD_SET_LEN(x)	((x) << 16)
88 #define	EHCI_ITD_GET_LEN(x)	(((x) >> 16) & 0xFFF)
89 #define	EHCI_ITD_IOC		(1 << 15)
90 #define	EHCI_ITD_SET_PG(x)	((x) << 12)
91 #define	EHCI_ITD_GET_PG(x)	(((x) >> 12) & 0x7)
92 #define	EHCI_ITD_SET_OFFS(x)	(x)
93 #define	EHCI_ITD_GET_OFFS(x)	(((x) >> 0) & 0xFFF)
94 #define	EHCI_ITD_ACTIVE		(1U << 31)
95 #define	EHCI_ITD_DATABUFERR	(1 << 30)
96 #define	EHCI_ITD_BABBLE		(1 << 29)
97 #define	EHCI_ITD_XACTERR	(1 << 28)
98 	volatile uint32_t itd_bp[7];
99 	/* itd_bp[0] */
100 #define	EHCI_ITD_SET_ADDR(x)	(x)
101 #define	EHCI_ITD_GET_ADDR(x)	(((x) >> 0) & 0x7F)
102 #define	EHCI_ITD_SET_ENDPT(x)	((x) << 8)
103 #define	EHCI_ITD_GET_ENDPT(x)	(((x) >> 8) & 0xF)
104 	/* itd_bp[1] */
105 #define	EHCI_ITD_SET_DIR_IN	(1 << 11)
106 #define	EHCI_ITD_SET_DIR_OUT	(0 << 11)
107 #define	EHCI_ITD_SET_MPL(x)	(x)
108 #define	EHCI_ITD_GET_MPL(x)	(((x) >> 0) & 0x7FF)
109 	volatile uint32_t itd_bp_hi[7];
110 /*
111  * Extra information needed:
112  */
113 	uint32_t itd_self;
114 	struct ehci_itd *next;
115 	struct ehci_itd *prev;
116 	struct ehci_itd *obj_next;
117 	struct usb_page_cache *page_cache;
118 } __aligned(EHCI_ITD_ALIGN);
119 
120 typedef struct ehci_itd ehci_itd_t;
121 
122 /*
123  * Split Transaction Isochronous Transfer Descriptor.  This descriptor is used
124  * for full speed transfers only.
125  */
126 struct ehci_sitd {
127 	volatile uint32_t sitd_next;
128 	volatile uint32_t sitd_portaddr;
129 #define	EHCI_SITD_SET_DIR_OUT	(0 << 31)
130 #define	EHCI_SITD_SET_DIR_IN	(1U << 31)
131 #define	EHCI_SITD_SET_ADDR(x)	(x)
132 #define	EHCI_SITD_GET_ADDR(x)	((x) & 0x7F)
133 #define	EHCI_SITD_SET_ENDPT(x)	((x) << 8)
134 #define	EHCI_SITD_GET_ENDPT(x)	(((x) >> 8) & 0xF)
135 #define	EHCI_SITD_GET_DIR(x)	((x) >> 31)
136 #define	EHCI_SITD_SET_PORT(x)	((x) << 24)
137 #define	EHCI_SITD_GET_PORT(x)	(((x) >> 24) & 0x7F)
138 #define	EHCI_SITD_SET_HUBA(x)	((x) << 16)
139 #define	EHCI_SITD_GET_HUBA(x)	(((x) >> 16) & 0x7F)
140 	volatile uint32_t sitd_mask;
141 #define	EHCI_SITD_SET_SMASK(x)	(x)
142 #define	EHCI_SITD_SET_CMASK(x)	((x) << 8)
143 	volatile uint32_t sitd_status;
144 #define	EHCI_SITD_COMPLETE_SPLIT	(1<<1)
145 #define	EHCI_SITD_START_SPLIT		(0<<1)
146 #define	EHCI_SITD_MISSED_MICRO_FRAME	(1<<2)
147 #define	EHCI_SITD_XACTERR		(1<<3)
148 #define	EHCI_SITD_BABBLE		(1<<4)
149 #define	EHCI_SITD_DATABUFERR		(1<<5)
150 #define	EHCI_SITD_ERROR			(1<<6)
151 #define	EHCI_SITD_ACTIVE		(1<<7)
152 #define	EHCI_SITD_IOC			(1<<31)
153 #define	EHCI_SITD_SET_LEN(len)		((len)<<16)
154 #define	EHCI_SITD_GET_LEN(x)		(((x)>>16) & 0x3FF)
155 	volatile uint32_t sitd_bp[2];
156 	volatile uint32_t sitd_back;
157 	volatile uint32_t sitd_bp_hi[2];
158 /*
159  * Extra information needed:
160  */
161 	uint32_t sitd_self;
162 	struct ehci_sitd *next;
163 	struct ehci_sitd *prev;
164 	struct ehci_sitd *obj_next;
165 	struct usb_page_cache *page_cache;
166 } __aligned(EHCI_SITD_ALIGN);
167 
168 typedef struct ehci_sitd ehci_sitd_t;
169 
170 /* Queue Element Transfer Descriptor */
171 struct ehci_qtd {
172 	volatile uint32_t qtd_next;
173 	volatile uint32_t qtd_altnext;
174 	volatile uint32_t qtd_status;
175 #define	EHCI_QTD_GET_STATUS(x)	(((x) >>  0) & 0xff)
176 #define	EHCI_QTD_SET_STATUS(x)  ((x) << 0)
177 #define	EHCI_QTD_ACTIVE		0x80
178 #define	EHCI_QTD_HALTED		0x40
179 #define	EHCI_QTD_BUFERR		0x20
180 #define	EHCI_QTD_BABBLE		0x10
181 #define	EHCI_QTD_XACTERR	0x08
182 #define	EHCI_QTD_MISSEDMICRO	0x04
183 #define	EHCI_QTD_SPLITXSTATE	0x02
184 #define	EHCI_QTD_PINGSTATE	0x01
185 #define	EHCI_QTD_STATERRS	0x74
186 #define	EHCI_QTD_GET_PID(x)	(((x) >>  8) & 0x3)
187 #define	EHCI_QTD_SET_PID(x)	((x) <<  8)
188 #define	EHCI_QTD_PID_OUT	0x0
189 #define	EHCI_QTD_PID_IN		0x1
190 #define	EHCI_QTD_PID_SETUP	0x2
191 #define	EHCI_QTD_GET_CERR(x)	(((x) >> 10) &  0x3)
192 #define	EHCI_QTD_SET_CERR(x)	((x) << 10)
193 #define	EHCI_QTD_GET_C_PAGE(x)	(((x) >> 12) &  0x7)
194 #define	EHCI_QTD_SET_C_PAGE(x)	((x) << 12)
195 #define	EHCI_QTD_GET_IOC(x)	(((x) >> 15) &  0x1)
196 #define	EHCI_QTD_IOC		0x00008000
197 #define	EHCI_QTD_GET_BYTES(x)	(((x) >> 16) &  0x7fff)
198 #define	EHCI_QTD_SET_BYTES(x)	((x) << 16)
199 #define	EHCI_QTD_GET_TOGGLE(x)	(((x) >> 31) &  0x1)
200 #define	EHCI_QTD_SET_TOGGLE(x)	((x) << 31)
201 #define	EHCI_QTD_TOGGLE_MASK	0x80000000
202 #define	EHCI_QTD_NBUFFERS	5
203 #define	EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE)
204 	volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
205 	volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
206 /*
207  * Extra information needed:
208  */
209 	struct ehci_qtd *alt_next;
210 	struct ehci_qtd *obj_next;
211 	struct usb_page_cache *page_cache;
212 	uint32_t qtd_self;
213 	uint16_t len;
214 } __aligned(EHCI_QTD_ALIGN);
215 
216 typedef struct ehci_qtd ehci_qtd_t;
217 
218 /* Queue Head Sub Structure */
219 struct ehci_qh_sub {
220 	volatile uint32_t qtd_next;
221 	volatile uint32_t qtd_altnext;
222 	volatile uint32_t qtd_status;
223 	volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
224 	volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
225 } __aligned(4);
226 
227 /* Queue Head */
228 struct ehci_qh {
229 	volatile uint32_t qh_link;
230 	volatile uint32_t qh_endp;
231 #define	EHCI_QH_GET_ADDR(x)	(((x) >>  0) & 0x7f)	/* endpoint addr */
232 #define	EHCI_QH_SET_ADDR(x)	(x)
233 #define	EHCI_QH_ADDRMASK	0x0000007f
234 #define	EHCI_QH_GET_INACT(x)	(((x) >>  7) & 0x01)	/* inactivate on next */
235 #define	EHCI_QH_INACT		0x00000080
236 #define	EHCI_QH_GET_ENDPT(x)	(((x) >>  8) & 0x0f)	/* endpoint no */
237 #define	EHCI_QH_SET_ENDPT(x)	((x) <<  8)
238 #define	EHCI_QH_GET_EPS(x)	(((x) >> 12) & 0x03)	/* endpoint speed */
239 #define	EHCI_QH_SET_EPS(x)	((x) << 12)
240 #define	EHCI_QH_SPEED_FULL	0x0
241 #define	EHCI_QH_SPEED_LOW	0x1
242 #define	EHCI_QH_SPEED_HIGH	0x2
243 #define	EHCI_QH_GET_DTC(x)	(((x) >> 14) & 0x01)	/* data toggle control */
244 #define	EHCI_QH_DTC		0x00004000
245 #define	EHCI_QH_GET_HRECL(x)	(((x) >> 15) & 0x01)	/* head of reclamation */
246 #define	EHCI_QH_HRECL		0x00008000
247 #define	EHCI_QH_GET_MPL(x)	(((x) >> 16) & 0x7ff)	/* max packet len */
248 #define	EHCI_QH_SET_MPL(x)	((x) << 16)
249 #define	EHCI_QH_MPLMASK		0x07ff0000
250 #define	EHCI_QH_GET_CTL(x)	(((x) >> 27) & 0x01)	/* control endpoint */
251 #define	EHCI_QH_CTL		0x08000000
252 #define	EHCI_QH_GET_NRL(x)	(((x) >> 28) & 0x0f)	/* NAK reload */
253 #define	EHCI_QH_SET_NRL(x)	((x) << 28)
254 	volatile uint32_t qh_endphub;
255 #define	EHCI_QH_GET_SMASK(x)	(((x) >>  0) & 0xff)	/* intr sched mask */
256 #define	EHCI_QH_SET_SMASK(x)	((x) <<  0)
257 #define	EHCI_QH_GET_CMASK(x)	(((x) >>  8) & 0xff)	/* split completion mask */
258 #define	EHCI_QH_SET_CMASK(x)	((x) <<  8)
259 #define	EHCI_QH_GET_HUBA(x)	(((x) >> 16) & 0x7f)	/* hub address */
260 #define	EHCI_QH_SET_HUBA(x)	((x) << 16)
261 #define	EHCI_QH_GET_PORT(x)	(((x) >> 23) & 0x7f)	/* hub port */
262 #define	EHCI_QH_SET_PORT(x)	((x) << 23)
263 #define	EHCI_QH_GET_MULT(x)	(((x) >> 30) & 0x03)	/* pipe multiplier */
264 #define	EHCI_QH_SET_MULT(x)	((x) << 30)
265 	volatile uint32_t qh_curqtd;
266 	struct ehci_qh_sub qh_qtd;
267 /*
268  * Extra information needed:
269  */
270 	struct ehci_qh *next;
271 	struct ehci_qh *prev;
272 	struct ehci_qh *obj_next;
273 	struct usb_page_cache *page_cache;
274 	uint32_t qh_self;
275 } __aligned(EHCI_QH_ALIGN);
276 
277 typedef struct ehci_qh ehci_qh_t;
278 
279 /* Periodic Frame Span Traversal Node */
280 struct ehci_fstn {
281 	volatile uint32_t fstn_link;
282 	volatile uint32_t fstn_back;
283 } __aligned(EHCI_FSTN_ALIGN);
284 
285 typedef struct ehci_fstn ehci_fstn_t;
286 
287 struct ehci_hw_softc {
288 	struct usb_page_cache pframes_pc;
289 	struct usb_page_cache terminate_pc;
290 	struct usb_page_cache async_start_pc;
291 	struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
292 	struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
293 	struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
294 
295 	struct usb_page pframes_pg;
296 	struct usb_page terminate_pg;
297 	struct usb_page async_start_pg;
298 	struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
299 	struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
300 	struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
301 };
302 
303 struct ehci_config_desc {
304 	struct usb_config_descriptor confd;
305 	struct usb_interface_descriptor ifcd;
306 	struct usb_endpoint_descriptor endpd;
307 } __packed;
308 
309 union ehci_hub_desc {
310 	struct usb_status stat;
311 	struct usb_port_status ps;
312 	struct usb_hub_descriptor hubd;
313 	uint8_t	temp[128];
314 };
315 
316 typedef struct ehci_softc {
317 	struct ehci_hw_softc sc_hw;
318 	struct usb_bus sc_bus;		/* base device */
319 	struct usb_callout sc_tmo_pcd;
320 	struct usb_callout sc_tmo_poll;
321 	union ehci_hub_desc sc_hub_desc;
322 
323 	struct usb_device *sc_devices[EHCI_MAX_DEVICES];
324 	struct resource *sc_io_res;
325 	struct resource *sc_irq_res;
326 	struct ehci_qh *sc_async_p_last;
327 	struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
328 	struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
329 	struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
330 	void   *sc_intr_hdl;
331 	bus_size_t sc_io_size;
332 	bus_space_tag_t sc_io_tag;
333 	bus_space_handle_t sc_io_hdl;
334 
335 	uint32_t sc_terminate_self;	/* TD short packet termination pointer */
336 	uint32_t sc_eintrs;
337 
338 	uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT];
339 	uint16_t sc_id_vendor;		/* vendor ID for root hub */
340 	uint16_t sc_flags;		/* chip specific flags */
341 #define	EHCI_SCFLG_NORESTERM	0x0004	/* don't terminate reset sequence */
342 #define	EHCI_SCFLG_BIGEDESC	0x0008	/* big-endian byte order descriptors */
343 #define	EHCI_SCFLG_TT		0x0020	/* transaction translator present */
344 #define	EHCI_SCFLG_LOSTINTRBUG	0x0040	/* workaround for VIA / ATI chipsets */
345 #define	EHCI_SCFLG_IAADBUG	0x0080	/* workaround for nVidia chipsets */
346 #define	EHCI_SCFLG_DONTRESET	0x0100	/* don't reset ctrl. in ehci_init() */
347 #define	EHCI_SCFLG_DONEINIT	0x1000	/* ehci_init() has been called. */
348 
349 	uint8_t	sc_offs;		/* offset to operational registers */
350 	uint8_t	sc_doorbell_disable;	/* set on doorbell failure */
351 	uint8_t	sc_noport;
352 	uint8_t	sc_addr;		/* device address */
353 	uint8_t	sc_conf;		/* device configuration */
354 	uint8_t	sc_isreset;
355 	uint8_t	sc_hub_idata[8];
356 
357 	char	sc_vendor[16];		/* vendor string for root hub */
358 
359 	void	(*sc_vendor_post_reset)(struct ehci_softc *sc);
360 	uint16_t (*sc_vendor_get_port_speed)(struct ehci_softc *sc,
361 	    uint16_t index);
362 
363 } ehci_softc_t;
364 
365 #define	EREAD1(sc, a)	bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
366 #define	EREAD2(sc, a)	bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
367 #define	EREAD4(sc, a)	bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
368 #define	EWRITE1(sc, a, x)						\
369 	    bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
370 #define	EWRITE2(sc, a, x)						\
371 	    bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
372 #define	EWRITE4(sc, a, x)						\
373 	    bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
374 #define	EOREAD1(sc, a)							\
375 	    bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
376 #define	EOREAD2(sc, a)							\
377 	    bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
378 #define	EOREAD4(sc, a)							\
379 	    bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
380 #define	EOWRITE1(sc, a, x)						\
381 	    bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
382 #define	EOWRITE2(sc, a, x)						\
383 	    bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
384 #define	EOWRITE4(sc, a, x)						\
385 	    bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
386 
387 #ifdef USB_EHCI_BIG_ENDIAN_DESC
388 /*
389  * Handle byte order conversion between host and ``host controller''.
390  * Typically the latter is little-endian but some controllers require
391  * big-endian in which case we may need to manually swap.
392  */
393 static __inline uint32_t
394 htohc32(const struct ehci_softc *sc, const uint32_t v)
395 {
396 	return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v);
397 }
398 
399 static __inline uint16_t
400 htohc16(const struct ehci_softc *sc, const uint16_t v)
401 {
402 	return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v);
403 }
404 
405 static __inline uint32_t
406 hc32toh(const struct ehci_softc *sc, const uint32_t v)
407 {
408 	return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v);
409 }
410 
411 static __inline uint16_t
412 hc16toh(const struct ehci_softc *sc, const uint16_t v)
413 {
414 	return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v);
415 }
416 #else
417 /*
418  * Normal little-endian only conversion routines.
419  */
420 static __inline uint32_t
421 htohc32(const struct ehci_softc *sc, const uint32_t v)
422 {
423 	return htole32(v);
424 }
425 
426 static __inline uint16_t
427 htohc16(const struct ehci_softc *sc, const uint16_t v)
428 {
429 	return htole16(v);
430 }
431 
432 static __inline uint32_t
433 hc32toh(const struct ehci_softc *sc, const uint32_t v)
434 {
435 	return le32toh(v);
436 }
437 
438 static __inline uint16_t
439 hc16toh(const struct ehci_softc *sc, const uint16_t v)
440 {
441 	return le16toh(v);
442 }
443 #endif
444 
445 usb_bus_mem_cb_t ehci_iterate_hw_softc;
446 
447 usb_error_t ehci_reset(ehci_softc_t *sc);
448 usb_error_t ehci_init(ehci_softc_t *sc);
449 void	ehci_detach(struct ehci_softc *sc);
450 void	ehci_interrupt(ehci_softc_t *sc);
451 uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index);
452 uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index);
453 
454 #endif					/* _EHCI_H_ */
455